Input Bias & Input-Referred Noise for INAs
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Stable readings come from designing around two dominant chains: bias/leakage × source impedance (mean drift) and input-referred noise × bandwidth/window (jitter). This page shows how to model, measure, and set pass criteria so high-Rs sensors and real wiring stay accurate in the field.
Definition & Boundary: Input Bias Current vs Input-Referred Noise
Stable INA readings are governed by two separable chains: a bias/leakage (DC & slow) chain that creates offset and drift, and a noise (random) chain that creates RMS jitter and limits resolution. This page stays inside those two chains and treats source impedance (Requiv) and effective bandwidth (BWeff) as the only “multipliers” that turn tiny currents and densities into visible errors.
- Input bias current (Ib): average input current required by the input stage. Direction matters (into vs out of the pin) because it sets the sign of the error through resistances.
- Input offset current (Ios): mismatch between the two input bias currents. Even with perfectly matched wiring, Ios behaves like a differential error source.
- Input-referred noise: modeled as en (V/√Hz) and in (A/√Hz). At high source impedance, in·R becomes dominant; at low source impedance, en dominates.
- Leakage: unintended current paths from PCB surface films, connectors/cables, input protection parts (ESD/TVS/clamps), and flux residues. In high-R designs, leakage often exceeds “typical Ib”.
- Requiv (effective source resistance seen by each input): not only the sensor’s Rs. It also includes series protection resistors, input RC networks, and any parallel leakage paths that shift the input node bias.
- BWeff (effective noise bandwidth): set by the analog front-end + sampling/decimation + any digital averaging window. BWeff is the conversion between density (V/√Hz) and RMS jitter (Vrms).
Bias/leakage currents flowing through Requiv create a differential error voltage:
Verr ≈ I × Requiv.
This appears as offset, drift, humidity sensitivity, or “touch/move the cable → reading changes”.
Input-referred noise densities become RMS output jitter once integrated over BWeff. Source impedance sets which term dominates:
en
vs
in·Requiv.
This appears as reading jitter, “averaging does not converge fast enough”, or “resolution is lower than expected”.
- Noise theory and 0.1–10 Hz interpretation are not derived here (only decision-ready usage).
- CMRR/PSRR mechanisms are not explained here (only bias/leakage artifacts that can look like “CMRR problems”).
- System-level EMI hardening and ADC drive/anti-alias details are not expanded here (only how they change Requiv and BWeff).
Why “Tiny” Bias Current Creates Big Real Errors
“pA/nA” looks harmless until it is multiplied by Requiv and distorted by real-world leakage. Many field failures are not caused by the INA core, but by added resistors, protection parts, connectors, and PCB surface films that silently push Requiv higher and introduce temperature/humidity dependence.
Sensor resistance, series protection resistors, input RC networks, and any “safety” resistors all add into Requiv. Bias/leakage errors scale approximately linearly with Requiv:
Verr ∝ Requiv.
PCB surface films (humidity + residues), connector insulation, cable dielectric absorption, and protection-part leakage can create input currents far above “typical Ib”. Leakage also varies strongly with temperature and humidity, which turns a clean DC error into drift.
ESD diodes, TVS, clamps, and series resistors create voltage-dependent and temperature-dependent leakage. Even when protection is required, the architecture must preserve a predictable DC path and keep leakage away from the measurement node (layout + guarding + part choice).
“Touch the cable → reading changes” is often a leakage/insulation issue, not a gain or CMRR issue. Motion changes capacitance and surface charge; humidity changes insulation; both modulate leakage and bias currents through Requiv.
- Looks like CMRR collapsed → often a differential leakage path or Ios interacting with unequal Requiv on the two inputs.
- Looks like “offset drift” → often temperature/humidity dependence of protection leakage or PCB surface films, not the INA’s intrinsic offset drift.
- Looks like “noise” → often slow bias drift plus an averaging window that is too short to reveal the slow component (the mean moves during the average).
- Quantify leakage sensitivity: compare dry/clean vs humid/handled conditions; if the mean shifts, leakage/bias dominates.
- Check scaling with Requiv: add or remove a known series R; a proportional change strongly indicates bias/leakage conversion.
- Only after DC paths are controlled, tune BWeff and averaging to hit the jitter target; otherwise filtering can mask drift and create false confidence.
Error Model: How Ib/Ios Convert into Offset and Drift
A practical INA error model treats the input pins as current-driven nodes (bias + leakage) sitting on top of a real impedance network (sensor Rs, series protection, RC filters, and clamp leakage). The measured error is not “mystical drift”; it is the predictable result of currents flowing through effective resistance and of voltage- and environment-dependent leakage paths.
- Ib+, Ib−: input bias currents (direction matters; sign sets whether the node is pulled up or down through R paths).
- Ios: mismatch component (
Ios = Ib+ − Ib−), directly creates differential error even with matched wiring. - Ileak+, Ileak−: leakage currents from PCB surface, connectors/cables, input clamps/ESD/TVS, and flux residues (often temperature/humidity dependent).
Each input node sees an effective impedance made of sensor resistance (Rs), series protection resistors (Rser), and any RC/filter network. Currents at that node create a node-voltage shift:
Vnode ≈ Inode × Requiv.
The INA measures the difference between the two nodes, so any imbalance between the two sides becomes a differential offset.
When Rs+ and Rs− are not equal, the same bias/leakage current creates different voltage drops on the two inputs. The measured offset then tracks wiring changes that modify the two sides differently (lead resistance, connector contact, contamination).
Clamp diodes/TVS/ESD structures often have leakage that changes with input voltage. As the common-mode or differential input moves, leakage changes, and the error becomes range-dependent (worse near certain voltages).
Repeatable mean error under stable temperature/humidity and unchanged wiring. Typically dominated by steady Ib/Ios through a fixed Requiv.
Mean shifts with humidity, contamination, handling, airflow, or temperature ramps. Usually dominated by leakage paths and by temperature-dependent clamp currents.
Error changes when the input common-mode or differential level is swept. Often indicates voltage-dependent leakage (clamps/ESD/TVS) or a bias path that changes state across a voltage boundary.
Boundary note: this model explains current-to-voltage conversion through external impedances. Frequency-domain CMRR behavior and full accuracy budgeting are handled in their dedicated pages.
Source Impedance Matching: When Rs Dominates Everything
Source impedance determines which term dominates: voltage noise (en), current noise (in·R), or bias/leakage conversion (I·R). The correct first move is different in each Rs regime, so this section uses a zone model that maps dominant term → design focus → quick check. This stays inside the Ib/noise boundary and does not explain frequency-domain CMRR mechanisms.
Treat Requiv as the actual zone input. Protection resistors and input RC networks can push Requiv far above the sensor’s nominal Rs, and leakage paths can effectively create unequal Requiv on the two inputs.
- Dominant term: en and bandwidth/settling effects typically dominate; in·R is small.
- Design focus: avoid unnecessary series R; manage BWeff and any RC that changes settling or noise bandwidth.
- Quick check: change BW/averaging; RMS jitter should scale with BWeff if noise dominates.
- Dominant term: bias/leakage conversion (I·R) becomes visible; in·R may start to rise.
- Design focus: match Rs on both inputs; place series R and RC symmetrically; control leakage near the input nodes.
- Quick check: add a known series R equally; mean offset scaling with R strongly indicates bias/leakage conversion.
- Dominant term: leakage and surface contamination dominate; “typical Ib” is often not the limiting current.
- Design focus: guarding, cleaning, materials, and protection leakage specifications; minimize exposed high-impedance surfaces.
- Quick check: humidity/cleanliness A/B test; if mean shifts with environment, leakage dominates.
Leakage Paths in the Real World: PCB, Connectors, Protection Parts
In high-impedance front-ends, leakage is an unintended DC current path from the input node to nearby conductors (planes, rails, shields, chassis). Because the input node typically sits on a large effective resistance, even tiny leakage currents can shift the mean reading and create humidity/handling sensitivity. The fastest way to stabilize measurements is to identify the path, then remove it, move it, or guard it.
- Surface conduction: contamination + humidity forms a conductive film across solder mask, flux residues, and exposed pads.
- Component leakage: TVS/ESD/clamps, analog switches/MUXes, and protection networks introduce temperature- and voltage-dependent leakage.
- Connector/cable insulation: absorption, dirt, and aging reduce insulation resistance; shield and shell provide convenient return nodes.
High-impedance nodes near exposed solder mask openings and residues are sensitive to moisture. Fix direction: keepout + guard + cleanliness to prevent a surface film from bridging input copper to nearby planes.
TVS/ESD/clamps and some MUX/switch inputs can leak in a way that depends on temperature and input voltage. Fix direction: keep the highest-leakage parts away from the measurement node, and keep symmetry between IN+ and IN−.
Cable/connector insulation resistance can drop with humidity and contamination. Shield/shell often becomes a “hidden return”. Fix direction: define shield/shell strategy and isolate the high-Z node with guarded routing and controlled reference.
- Reduce leakage sources: clean residues, minimize exposed high-Z copper, avoid hygroscopic materials near the input node.
- Move the return: keep planes/rails/chassis away from the input pad neighborhood; keep high-Z traces short and separated.
- Guard the node: surround the input node with a guard conductor at similar potential to suppress surface currents.
- Make it symmetric: match protection networks and routing on IN+ and IN− to prevent differential conversion from unequal leakage.
- Humidity A/B: dry vs humid conditions; mean shift indicates leakage dominance.
- Clean/No-clean A/B: cleaning or bake-out changes mean/drift slope; surface film is dominant.
- Guard A/B: enabling a guard ring reduces touch sensitivity; confirms surface leakage path.
Boundary note: this section focuses on DC/low-frequency leakage paths that move the mean reading; EMI/RFI hardening and IEC surge design are handled elsewhere.
Datasheet Traps: Ib vs Common-Mode, Temperature, Input Voltage
Input bias current is not a single number; it is a condition-dependent function. Many “typ looks great, worst-case fails” situations come from missing the test conditions: temperature, input common-mode, differential level, supply headroom, input voltage proximity to rails, and operating mode. Reliable designs use max over temperature plus a condition matrix to map bias current into the system’s Requiv and leakage budget.
- Start with max specs over the target temperature range (not typical).
- Locate test conditions: Vcm, Vdiff, Vsupply, and whether inputs are near rails.
- Use curves if available: Ib vs temperature and Ib vs Vcm show regime changes.
- Check mode interactions: chopper/auto-zero and protection structures can change effective input current behavior.
Bias and leakage currents often increase strongly with temperature; worst-case drift must be evaluated at the temperature extremes and during ramps.
Input stage operating points shift with common-mode; Ib magnitude and direction can change across the valid Vcm range.
Near-rail conditions and protection structures can introduce voltage-dependent leakage; errors may become range-dependent even if the mid-range looks fine.
Single-supply vs dual-supply and headroom constraints can move input stage behavior, changing effective bias current and clamp interaction.
Chopper/auto-zero may deliver excellent DC offset performance, but input switching behavior and protection networks can introduce secondary effects that must be validated under system conditions.
- Low Requiv: Ib conversion is often small; prioritize bandwidth/settling and en behavior.
- Mid Requiv: Ib/Ios conversion becomes visible; check Ib vs Vcm and over temperature, and keep protection symmetry.
- High Requiv: system leakage typically dominates; enforce guarding and verify with humidity/cleanliness A/B tests.
Boundary note: this section teaches how to read bias-current conditions; detailed architecture noise mechanisms and frequency-domain CMRR are covered in their dedicated pages.
Input-Referred Noise Fundamentals (en, in, 1/f, chopper artifacts)
Input-referred noise is best handled as a set of components that are later combined with source impedance and bandwidth. This section defines the practical meaning of en (voltage noise density), in (current noise density), the 1/f region, and chopper artifacts so the next section can map them into a system decision.
- en (V/√Hz): an input-referred voltage noise density that tends to dominate when the source impedance is low.
- in (A/√Hz): an input-referred current noise density that turns into voltage noise through source impedance (later treated as in×R).
- 1/f region: low-frequency rise where “longer averaging” may not produce proportional improvement in stability.
- Chopper artifacts: switching-related ripple/spurs that can appear as visible ripple or become a mixing/alias risk in sampled systems.
en and bandwidth are often the first-order limit; in×R is typically small. Noise improves when bandwidth is reduced or averaging is increased (within dynamic requirements).
in×R becomes significant and may dominate. High-impedance inputs also become more sensitive to leakage paths, which can look like drift rather than random noise.
The 1/f region can limit the stability of long averaging windows. Improvement may saturate if the noise rises toward DC or if the system adds leakage-driven drift.
DC offset can be excellent while switching artifacts create visible ripple or sampled-system interaction. Treat these as deterministic components that require filtering and validation.
- Noise vs bandwidth: random noise should generally scale with the effective bandwidth and averaging strategy.
- Noise vs source impedance: if noise increases strongly with added series resistance, in×R is likely involved.
- Ripple vs noise: a stable periodic pattern indicates artifacts/spurs; it should not be treated as random noise.
Boundary note: this section defines noise components for design decisions; detailed low-frequency 0.1–10 Hz noise budgeting is handled in the dedicated low-frequency noise page.
Noise vs Source Impedance: The Rs Crossover You Must Design Around
The key design question is which term dominates at the input node: en or in×R. The crossover depends on the effective source impedance at the INA pins, not just the sensor’s nominal resistance. Once the dominant density is identified, bandwidth and averaging determine the total RMS. This section provides the decision framework without requiring precise numeric curves.
- Include sensor resistance, lead resistance, and any series protection resistor.
- Keep IN+ and IN− symmetry; mismatch turns common behavior into differential error.
- Remember that adding input RC/protection can push Requiv into a different dominance zone.
Treat in as a current that becomes voltage through the node impedance. If in×Requiv exceeds en, high-impedance sources are penalized and the design should reduce Requiv or use a lower-current-noise input type.
Lower Requiv pushes the system toward en dominance; bandwidth control and low en selection become the primary levers.
Higher Requiv amplifies current noise; reducing series resistance and managing leakage/guarding can improve both noise and stability.
- Once the dominant density is known, total RMS depends on the effective bandwidth and averaging.
- Analog filtering controls what reaches the ADC; digital filtering controls reported noise and response time.
- Do not reduce bandwidth below dynamic requirements; validate step response and settling.
- Series protection resistors increase Requiv and can move the design into the in×R-dominated region.
- Higher Requiv also increases sensitivity to bias and leakage conversion, which may look like drift.
- Use symmetry and guarding so protection does not become the dominant error source.
- in×R dominates: reduce Requiv, choose lower in input, tighten leakage control.
- en dominates: reduce BWeff or choose lower en, while meeting settling and stability needs.
- Low-frequency rise dominates: adjust measurement window/averaging strategy and validate stability across time.
Boundary note: this section provides the Rs crossover decision framework; detailed filter design and 0.1–10 Hz noise budgeting are covered in their dedicated pages.
From Noise Density to Real Resolution: Bandwidth, Filtering, Sampling Window
Noise density (V/√Hz or A/√Hz) becomes a real output number only after the system defines an effective bandwidth and a sampling window. In practice, analog filtering, digital filtering/averaging, and the output update window jointly determine how much noise energy is reported as jitter (σ), peak-to-peak variation, and usable resolution.
- Analog filtering limits what reaches the sampler/ADC and reduces out-of-band energy that can fold into the passband.
- Sampling window (Twin) and update rate define how much data contributes to each reported output value.
- Digital filtering/averaging reshapes the passband and trades noise reduction for response time and correlation between outputs.
Practical rule: BWeff is a system property, not a single cutoff frequency number.
Best for budgeting and comparing settings because it is less sensitive to record length. Use σ to translate noise into repeatability and resolution.
Matches user experience and alarm threshold concerns, but depends strongly on record length and bandwidth. Always report the time window and filtering used.
Comparison rule: p-p values are only comparable when BWeff and record length are the same.
- Lock BWeff, update rate, and the sampling window definition.
- Apply a fixed averaging policy (N samples or Twin window) and compute output σ.
- Pass when σ reaches the target and the mean does not drift beyond the allowed slope over the specified observation period.
Debug rule: if mean shifts with touch/humidity, leakage dominates and more averaging will not create true stability.
- Correlated outputs: heavy digital filtering reduces σ but increases lag; adjacent updates are not independent.
- Low-frequency rise: longer windows saturate improvement when 1/f and drift-like effects dominate.
- Spurs/ripple: periodic artifacts are not random noise; averaging can reveal patterns rather than remove them.
- Measurement setup: probes/fixtures can change bandwidth and leakage, making results non-repeatable.
Boundary note: this section maps density to stability via BWeff and windowing; detailed filter topology design and low-frequency noise budgeting are handled in dedicated pages.
Measurement & Debug Playbook: How to Separate Ib, Leakage, and Noise
Field failures often look similar: drift, touch sensitivity, or “too much noise”. The fastest path to a fix is to separate the problem into three buckets: bias conversion (Ib-related mean error), leakage paths (environment- and layout-dependent mean shift), and random noise (σ that follows bandwidth and window settings). This section provides low-cost A/B experiments and signatures that do not require specialized instruments.
- Ib-driven: mean shifts with Requiv in a repeatable way; humidity/touch has weak impact when the board is clean and guarded.
- Leakage-driven: mean/drift changes strongly with humidity, cleaning, touching, or guard enable; symptoms can look like “drift” more than random noise.
- Noise-driven: σ responds predictably to bandwidth and averaging; mean is comparatively stable across environment changes.
- R sweep: switch between known effective resistances and measure mean shift. A stable slope indicates bias conversion through Requiv.
- Short vs open: short inputs to a defined potential for baseline; open inputs reveal whether the node is floating and susceptible to leakage-dominated behavior.
- Rs compare: keep BWeff fixed and compare outputs across different Rs; mean tracking with Rs suggests Ib/leakage involvement.
- Humidity A/B: compare dry vs humid conditions; large mean shift indicates leakage dominance.
- Clean / bake A/B: cleaning or bake-out that changes mean/drift strongly implicates surface films and residues.
- Guard on/off: enabling guard should reduce touch sensitivity and humidity sensitivity if surface leakage is the driver.
- Path change: temporarily isolate suspected regions (keepouts, nearby copper, connector shell) to identify the return node.
- Short-input baseline: establish σ floor and look for periodic patterns that indicate spurs/ripple.
- Bandwidth sweep: change analog/digital filtering and verify σ follows BWeff and window policy as expected.
- Rs sweep: with BW fixed, evaluate σ vs Rs trend to distinguish en dominance from in×R dominance.
- Probes/fixtures can add leakage to high-impedance nodes.
- Cable motion can change shield return paths and create “false leakage” signatures.
- p-p requires a fixed record length; otherwise it is not comparable across runs.
Boundary note: this playbook separates bias, leakage, and random noise; compliance-level EMI/ESD qualification is handled in the protection pages.
Engineering Checklist (Design Review + Bench Tests + Pass Criteria)
This checklist turns bias conversion, leakage sensitivity, and noise stability into a reviewable design package and a repeatable bench validation plan. Each item is written as a testable field so production and debugging can converge on the same criteria.
Keep IN+ and IN− environments matched (routing, adjacency, copper proximity) so leakage and series resistance do not convert into differential error.
Guard high-impedance nodes and sensitive surfaces to control humidity/touch sensitivity and to keep leakage paths from dominating mean error.
Define the cleaning and bake-out process as part of the electrical spec, because surface films can create leakage-driven drift and touch sensitivity.
Treat clamps/TVS/ESD networks as part of the bias/leakage model; their leakage can vary with temperature and node voltage and become an “effective bias” path.
Place and size Rser to avoid pushing Requiv into a worse noise/bias region; keep symmetry so Rser does not create differential conversion.
Switch Req (R1/R2/R3) with fixed BWeff and window policy; log mean and σ trends to identify bias conversion and in×R effects.
Compare dry vs humid conditions; large mean shift or drift slope change indicates leakage dominance.
Short inputs to establish a baseline; open inputs reveal floating-node behavior and leakage sensitivity that can look like drift.
Use a repeatable touch/move action on cable/connector; log mean step and recovery time to distinguish leakage paths from random jitter.
Measure drift slope after a defined soak; avoid mixing warm-up transients into drift acceptance.
Acceptance must always include BW_eff, window policy, record length, and environment condition so results remain comparable across benches and production.
Applications (Bounded): Patterns by Rs & Leakage Sensitivity
These patterns are organized only by source impedance, leakage sensitivity, and noise dominance (en vs in×R). The goal is to identify typical failure signatures and the smallest countermeasure set, without expanding into full application system design.
Leakage → mean drift
Humidity and touch create large mean steps and long recovery.
Humidity A/B + guard on/off; compare mean shift and drift slope.
Guard + clean/bake + keepout
Leakage + Ib conversion
Mean appears temperature-sensitive even when the sensor is stable.
Clean/bake A/B; compare drift slope before and after.
Guard + isolate input node
Leakage path to shield/ground
Touching/moving the cable changes the mean and “stability”.
Swap cable/connector; compare touch step and recovery time.
Guard at connector + cleanliness
Charge + leakage + R_equiv
Previous channel influences the next channel mean; settling depends on history.
Change channel order; insert a discharge window; compare mean convergence.
Reduce R_equiv + bleed path
Boundary note: patterns are classified only by Rs and leakage/noise dominance; full application system design is handled in dedicated application pages.
IC Selection Logic (Bias Current + Input-Referred Noise + Leakage)
This selection flow stays strictly within this page boundary: Ib/Ios/leakage paths that move the mean (offset/drift/nonlinearity) and en/in paths that set jitter and real resolution. The output is a practical shortlist and a vendor inquiry template that forces conditions and worst-case into the decision.
A) Inputs (fill these before comparing parts)
Choose one: Low-Rs (Ω–kΩ), Mid-Rs (kΩ–100kΩ), High-Rs (≥100kΩ up to MΩ/GΩ). This determines whether Ib×Rs and in×Rs become dominant.
Classify the board-level risk: Clean & dry, typical production, or high-risk (humidity/contamination/touchable connectors/long cables/high temperature). High-risk pushes selection toward ultra-low-bias inputs and guard-friendly solutions.
Define how fast a stable reading must be achieved (settling window) and what bandwidth is actually used (analog filtering + digital averaging + sampling window). This anchors noise comparison to a real output metric (σ / p-p).
State whether clamp/TVS/ESD/series-R/input RC is mandatory. These parts can add leakage and increase R_equiv, shifting both bias and noise outcomes.
B) Datasheet fields (only what matters for Ib/noise/leakage decisions)
Compare numbers only when the test conditions match the application (temperature, Vcm range, input voltage, gain, bandwidth, and any input protection state).
- Ib(max over temp) and the stated conditions (Vcm, Vin, supply, gain).
- Ios(max) for Rs+ / Rs− mismatch conversion risk.
- Ib vs Vcm / Vin dependency (avoid “typ looks great, worst-case fails”).
- Input return-path requirement (high-R sources often need a defined bias return).
- en (midband voltage-noise density) for low-Rs and wider BW_eff cases.
- in (current-noise density) for high-Rs cases (in×Rs becomes dominant).
- 1/f corner or low-frequency noise metric (used only to flag stability risk).
- Switching artifacts indicator for auto-zero/chopper families (treat as a risk flag, not a marketing number).
- Input type label: FET/JFET, bipolar, zero-drift (used for initial filtering only).
- Input protection hints: internal clamps, input mux/switches, and any “input current” notes.
- Recommended guard guidance or layout notes for high-impedance use.
C) Decision rules (dominant mechanism first)
If humidity or touch/moving a cable changes the mean, leakage and surface paths are dominating. Prioritize ultra-low bias inputs, guard-friendly topology, and a leakage-aware protection network.
High-Rs → bias/leakage and in×Rs can dominate; compare Ib(max), Ib dependencies, and in. Low-Rs → en and usable bandwidth/window dominate; filter first by en and stability time.
Mandatory series-R and clamps can raise R_equiv and add temperature-dependent leakage. Re-run the decision using the effective input network, not the bare sensor Rs.
Output of these rules: input type family + shortlist bucket, then validate with an Rs sweep and humidity A/B bench test before committing to production.
D) Concrete shortlist (by mechanism bucket)
Part numbers are provided as starting points for datasheet comparison. Always compare worst-case with matching conditions (temperature, Vcm range, Vin, gain, BW_eff, and protection state).
Use when leakage paths and handling/humidity signatures dominate. Selection must be paired with guard strategy and cleanliness control.
Use when long-term DC stability and drift control are the main goals, and switching-family artifacts are treated as a verification item.
Use when the sensor is low impedance and output jitter/resolution is driven by voltage-noise density and the implemented bandwidth/window.
Use as a stable baseline for mid-Rs systems; then validate bias/leakage/noise with Rs sweep and humidity A/B before locking production.
E) Vendor inquiry template (forces conditions + worst-case + guardband)
Ask for the following in one response. Any number without conditions is not actionable for production sign-off.
• Ios(max): ____ (include measurement setup and source impedance assumption)
• Ib dependency: Ib vs Vcm range ____ and Ib vs Vin ____ (provide curve/table if available)
• en density and condition: ____ (gain, bandwidth, frequency point)
• in density and condition: ____ (gain, bandwidth, frequency point)
• Low-frequency noise metric: ____ (definition + test method)
• Input structure notes: ____ (internal clamps, mux/switching behavior, return-path requirement)
• Recommended guardband for production humidity/contamination: ____
• Suggested validation test: Rs sweep + humidity A/B + short/open signatures (confirm applicability)
FAQs (Bias Current, Leakage, and Input-Referred Noise)
Answers use a fixed 4-line structure: Likely cause / Quick check / Fix / Pass criteria. “IR” means input-referred; when measuring Vout, use IR = Vout / Gain.