MFB LP/HP Active Filters: High-Q Design & Verification
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MFB LP/HP filters are a production-friendly 2nd-order active filter block that delivers predictable fc and controllable Q for audio and measurement bandwidth shaping. This page turns specs into values and real-world pass/fail checks—covering tolerance, op-amp limits, noise/THD, source/load interaction, and verification from bench to production.
What is MFB LP/HP (and when to use it)
Definition in one sentence
MFB (Multiple-Feedback) is an inverting, 2nd-order active filter where multiple feedback paths (R/C networks) shape a pair of poles, enabling practical control of cutoff frequency (fc) and quality factor (Q) using resistor ratios and RC scaling.
Where it sits in a signal chain
- Bandwidth shaping: limit noise bandwidth, suppress out-of-band interferers, and stabilize downstream dynamic range utilization.
- Selective emphasis: create controlled peaking around the corner when a mild resonance (higher Q) improves response or SNR in-band.
- 2nd-order building block: used as a repeatable stage in anti-alias/reconstruction interfaces and measurement front ends.
Use MFB when
- The design needs Q control (peaking/selection) beyond a purely “flat” 2nd-order response, while keeping component ratios practical.
- The corner is in a region where op-amp phase margin and linearity can be met with an appropriate amplifier choice.
- The system can accept an inverting stage (sign inversion is either irrelevant or compensated elsewhere).
- Audio/measurement chains need predictable shaping with clear bench verification hooks (magnitude/phase, step response, THD/noise).
Avoid (or isolate first) when
- The source has high or uncertain source impedance and cannot be buffered; source-Z interacts with the inverting input network and shifts fc/Q.
- The load is variable/capacitive and must be driven directly; plan for output isolation or a buffer to avoid peaking/instability.
- The application requires multiple simultaneous responses (LP/HP/BP/notch at once) or wide tuning range; that belongs on the multi-response/tunable pages.
Quick decision rules (fast, practical)
- Need higher Q (controlled peaking / narrower transition) → choose MFB.
- Need the simplest unity-like active filter and Q is modest → use the simplest topology page (link below).
- Need tunable/multi-output behavior → use the state-variable/tunable pages (link below).
- Need higher order response shaping → use cascaded biquad staging (link below).
Intuition: why MFB gives better Q control
Q in practice (what can be observed on the bench)
- Frequency domain: higher Q produces a stronger corner peaking or a sharper transition.
- Time domain: higher Q tends to increase ringing and lengthen settling after a step.
- Sensitivity: higher Q amplifies the effect of tolerances, parasitics, and op-amp phase delay.
Why MFB feels “ratio-friendly”
MFB value picking naturally separates into two knobs:
fc is largely set by the RC time-constant scale. Choose capacitor families (C0G/NP0) and a practical R magnitude first.
Q is mainly controlled by feedback ratios. Adjusting ratios is typically easier than forcing extreme absolute values.
When it is more robust (and what the cost looks like)
MFB often behaves better than simpler alternatives when Q must be intentionally higher and component ratios must remain realistic. However, higher Q is never free:
- Phase margin becomes a limiter: op-amp delay near fc shifts the effective Q and can trigger peaking/oscillation.
- Noise gain matters: resistor noise and op-amp input noise can be amplified around the corner.
- Distortion concentrates: peaking increases internal swings at specific frequencies, stressing linearity under real loads.
Practical next step (keeps the page “engineering-first”)
- Lock fc by choosing a stable capacitor family and a resistor magnitude that balances noise vs bias/leakage sensitivity.
- Dial Q by ratios, then validate with AC response + step settling (both reveal Q errors quickly).
- Reserve headroom in GBW/phase margin and THD at the target swing and load (bench conditions must match reality).
Transfer function map: fc, Q, gain and sign conventions
The 2nd-order “language” used in design and verification
A practical MFB LP/HP stage is a 2nd-order block described by three parameters: ω0 (corner location), Q (peaking/ringing), and H0 (midband gain magnitude). Treat them as the bridge between system specs and component values.
Set by the stage’s effective RC scale. In measurement, it anchors the magnitude/phase transition region.
Controls corner peaking and step-response ringing. Higher Q increases tolerance and phase-delay sensitivity.
The intended passband gain magnitude used in budgets. Keep sign/phase separate from gain magnitude.
Sign conventions (why “simulation matches, bench looks inverted”)
MFB LP/HP stages are typically inverting. The system spec often states a gain magnitude, while instruments may display phase and complex gain. This page uses a consistent rule:
- H0 is reported as magnitude (positive number).
- Inversion is handled via phase (≈180°) and wiring polarity checks.
- On single-supply designs, small-signal measurements are taken around Vref, not around ground.
- Confirm scope channel polarity and reference (CH1/CH2 sign, probe ground, differential vs single-ended).
- Confirm the source output impedance and coupling (50Ω source or coupling capacitor can shift the effective input network).
- Confirm Vref bias alignment (input/output centered at the same reference when using single-supply).
LP vs HP mapping (same knobs, different passband)
| Spec / knob | Low-pass (LP) | High-pass (HP) |
|---|---|---|
| H0 (passband gain magnitude) | Defined in the low-frequency passband. Verify ripple/flatness well below fc. | Defined in the high-frequency passband. Verify ripple/flatness well above fc. |
| fc / ω0 (corner region) | The transition from passband to attenuation. For Q ≠ 0.707, -3 dB may not coincide with ω0. | The transition from attenuation to passband. Do not judge “gain” using DC behavior; use high-frequency passband. |
| Q (peaking / ringing) | Higher Q can create corner peaking; confirm step overshoot and settling match system tolerance. | Higher Q can cause “transition ringing” and sensitivity to parasitics; verify with AC sweep and step response. |
| Practical reading on plots | Use magnitude + phase together: peaking reveals Q errors; phase slope hints at delay/PM issues. | Use magnitude + phase together: corner depth/shape and phase transition reveal bias and loading issues. |
Next, the workflow section turns these knobs into a repeatable value-picking process: pick a stable capacitor scale for fc, then tune ratios for Q and gain.
Step-by-step design workflow (spec → values)
Step 1 — Define the spec boundary (inputs that cannot be guessed)
- Filter type: LP or HP; single-supply vs dual-supply; Vref definition if biased.
- Targets: fc, Q (or ripple/atten translated to stage targets), and H0 gain magnitude.
- Budgets: allowed in-band noise and/or THD at the target frequency and output swing.
- Environment: source impedance (Rs) and load (Rl/Cl), plus expected temperature range.
A one-page boundary sheet that lists fc/Q/H0, noise/THD limits, Rs/Rl/Cl, and Vref/supply assumptions.
Step 2 — Feasibility (confirm the target window is realistic)
- High Q raises sensitivity: phase delay, tolerances, and parasitics shift Q and can cause peaking/instability.
- Gain + Q increase internal swings: distortion risk rises near the corner frequency under real load.
- Rs/Rl/Cl matter: source and load interactions can move fc/Q unless buffered or isolated.
- Reduce Q or split gain into stages; add buffering/isolation where Rs/Rl dominates.
- Adjust fc or choose a different topology (comparison pages are linked in H2-1 boundary).
Step 3 — Choose capacitor scale first (stability + practicality)
Capacitor choice sets both stability and how extreme resistor values must become. Use stable dielectric (C0G/NP0) for corners that must hold across temperature and production.
- C too small → R becomes large: higher thermal noise, higher bias/leakage sensitivity, stronger parasitic effects.
- C too large → R becomes small: heavier drive, higher current demand, stronger loading interactions.
A capacitor family and a target resistor magnitude window that balances noise, bias sensitivity, and loading.
Step 4 — Solve resistor ratios (fc by scale, Q by ratios, H0 by definition)
- Start from the mapped targets (ω0/Q/H0) and compute an ideal set of ratios.
- Quantize to E24/E96 while preserving ratios (Q is ratio-sensitive) and keeping R magnitudes in the window from Step 3.
- Record the ratio error and expected impact (used directly in Monte-Carlo and guardband decisions).
A purchasable BOM (R/C values) plus a short “ratio error” note for Q and midband gain.
Step 5 — Op-amp check (pass/fail before spending time on layout)
- GBW and phase margin at/above the corner (Q magnifies phase delay errors).
- Slew rate and output settling at the target swing and frequency.
- Input noise (en/in) vs the resistor magnitude window.
- Input bias current and drift vs expected offsets when biased at Vref.
- THD at the target frequency, swing, and load (not a convenient datasheet condition).
- Output drive and headroom on the chosen supply and Vref.
A short amplifier shortlist with “must meet” conditions tied to the boundary sheet.
Step 6 — Simulate, layout, verify, and guardband (close the loop)
- AC magnitude/phase (read ω0/Q behavior).
- Noise (in-band integrated noise tied to the budget).
- Transient (step overshoot/settling reveals Q errors).
- Monte-Carlo (fc/Q distribution for production viability).
- Magnitude/phase vs frequency (corner shape + phase slope).
- Step response (overshoot + settling time).
- THD/IMD at target frequency and swing under real load.
- Noise measurement with defined bandwidth integration.
- Corner: fc within ±X% and peaking within ±Y dB.
- Time domain: overshoot < Z% and settling < T ms.
- Distortion: THD < A dB at ftest and Vout swing.
- Noise: in-band RMS < N (defined BW and weighting).
Production guardband should feed back into the boundary sheet: adjust ratios, choose tighter components, or reduce Q/gain to keep the distribution inside pass limits.
Component scaling & tolerance: keeping Q and fc stable
Why higher Q “amplifies” component error
Q is a shape parameter. When Q is higher, small ratio drift in the feedback network translates into larger changes in peaking, ringing, and the phase transition region. The stage becomes more sensitive to parasitics and thermal gradients that slightly disturb ratios.
fc mostly follows RC scale, while Q mostly follows ratios. Ratio drift shows up as corner peaking changes and longer settling.
In high-Q designs, small capacitance at the inverting node and asymmetry in routing can shift Q and peak gain even when nominal values are correct.
Different materials, packages, and placement create mismatch in drift. The result is Q and peaking dispersion across units and temperature.
Part choices and layout tactics that hold Q
- Use C0G/NP0 where corner stability is required.
- Prefer consistent dielectric and package for matched pairs.
- Keep inverting-node capacitance low and predictable.
- Use resistor networks for ratio-critical parts when possible.
- Use thin-film/precision resistors for key ratio legs.
- Spend tolerance budget on ratio-critical components, not on every part.
- Place ratio parts close together to share the same thermal environment.
- Route the inverting-node network compactly; avoid long stubs and layer changes.
- Keep sensitive nodes away from switching edges and guard with a quiet reference plane.
Monte-Carlo checklist: what distributions actually matter
Focus on spread and tails, not only averages. A stable design is one where the worst-case units remain inside the system’s shape and settling budgets.
Track shift direction and 3σ range; confirm the corner remains inside the allocated budget window.
Inspect whether Q is skewed and whether tails create excessive peaking or slow settling in a small fraction of units.
Track peak gain and the phase-transition region. These reveal ratio sensitivity and parasitic-driven instability risk.
Run a baseline Monte-Carlo, then repeat with one critical ratio leg exaggerated. The dominant contributor becomes obvious without requiring long derivations.
Guardband: converting “target Q” into “production Q”
When the system allows, reduce Q or split gain so the distribution stays inside peaking and settling budgets under tolerance and temperature.
Use matched networks and thermal co-location to shrink random ratio spread. This usually beats pushing every part to the tightest tolerance.
Provide a trim point (digital pot / resistor strap / stored coefficients) so production can re-center peaking and corner location without over-costing passive components.
- Corner: fc stays within ±X% across tolerance and temperature.
- Shape: peaking stays within ±Y dB and step ringing settles within T.
- Phase: the transition region shift stays below Z for the system’s timing/latency goal.
Op-amp requirements for MFB (GBW, noise, distortion, headroom)
GBW and phase margin (high Q magnifies phase delay)
In MFB, the corner region is where phase behavior matters most. Higher Q increases sensitivity to phase delay and can turn small loop-margin loss into visible peaking or ringing. Use the corner shape and phase slope as stability indicators, not only a single GBW number.
- Corner peaking higher than expected; Q appears inflated on the bench.
- Step response rings longer or settles late near the corner target.
- Some boards behave differently: parasitic variation moves loop margin.
Noise: why swapping op-amps changes the noise floor
The inverting node “sees” an effective impedance set by the MFB network. Input voltage noise (en) and input current noise (in) convert through that impedance and the noise-gain path into output noise. Resistor magnitude decisions from the component-scaling step directly affect how much in and bias terms matter.
Current noise and bias/leakage conversion become more visible; drift and low-frequency terms can dominate.
Output drive and distortion often become the limiter; noise may drop but linearity can degrade under load.
Compare integrated in-band noise across the intended bandwidth using the same source impedance and biasing conditions.
Distortion: where THD tends to worsen in MFB stages
The corner region can stress internal nodes more than expected, especially with gain and higher Q. Under real loads, headroom limits and output current demand produce frequency-dependent distortion that does not appear under “easy” datasheet conditions.
Near headroom boundaries, compression and odd-order rise can appear first around the corner and under capacitive loads.
Nonlinear output stages interacting with capacitive paths can produce corner-linked distortion and unexpected peaking.
THD must be verified at the target frequency, swing, and load. “Great typical THD” under light load is not transferable.
Headroom and common-mode boundaries (single-supply + Vref)
On single-supply designs, signals are centered around a reference (Vref). The op-amp input common-mode range and output swing must accommodate the corner-region dynamics without clipping or asymmetric distortion. Treat Vref integrity as a signal-quality input.
- Looks fine at no-load, fails when driving an ADC or a long cable: output drive/headroom and stability under load are limiting.
- Corner behavior changes with bias: input CM range and Vref routing/noise are coupling into the stage.
One-page op-amp checklist (MFB-specific)
| Capability | What to verify | “Not enough” symptom |
|---|---|---|
| GBW / PM | Corner shape, peaking, and phase slope under the intended network and load. | Extra peaking; longer ringing; unit-to-unit variation tied to parasitics. |
| Noise (en/in) | Integrated in-band noise using the real source impedance and bias conditions. | Noise floor rises when swapping op-amps; drift-like behavior when R magnitude is high. |
| THD / linearity | THD at target frequency, swing, and load (not a convenient datasheet condition). | Corner-linked distortion jump; compression near headroom; sensitivity to capacitive loads. |
| Swing / CM range | Single-supply margin around Vref; verify both input CM and output swing in the intended bias. | Looks fine no-load, fails with ADC/cable; bias-dependent shape changes. |
| Bias / drift | Input bias and drift impact with the chosen resistor magnitude window; confirm offset stability vs temperature. | Offset shifts with part swaps; warm-up dependence; corner behavior changes over temperature. |
Noise budget: from resistors to total in-band noise
Noise sources that appear at Vout (stage-only view)
This section treats the MFB stage as the boundary. Only contributors that couple into this stage output are listed here. System-level ADC quantization and downstream reference budgets should be handled on their dedicated pages.
Every resistor produces noise; the MFB topology weights each resistor differently through the noise-gain path.
en injects at the input pair and is shaped by the stage noise gain and the frequency response around the corner region.
in converts through the inverting-node effective impedance. Larger resistor magnitudes make in and bias/leakage more visible.
In single-supply biasing, Vref integrity behaves like a signal input. Poor reference filtering can dominate low-frequency output noise.
What MFB amplifies: noise gain and the inverting-node impedance
In MFB stages, some resistor noise terms are multiplied by the noise-gain path, and the inverting node behaves like a frequency-dependent impedance. As Q increases, corner-region weighting becomes stronger, so small changes in ratios and parasitics can shift which term becomes dominant.
- in and bias/leakage conversion rise at the inverting node.
- Reference/bias noise coupling becomes easier to notice.
- Low-frequency noise terms become harder to average away.
- Resistor thermal noise can drop, but output-drive stress can increase.
- Linearity and stability under load may become the limiter.
- en can become the main term when in conversion is reduced.
The same spot-noise number can lead to very different in-band results. The real metric is the integrated noise over the intended passband.
In-band integrated noise vs spot noise (how to measure correctly)
A single frequency point can look great while total integrated noise increases due to wider bandwidth or corner peaking.
Integrate the measured spectrum across the target bandwidth. Use consistent RBW, windowing, and averaging settings.
- Hold gain, bias (Vref), source impedance, and load constant.
- Measure output noise spectrum with FFT and sufficient averaging.
- Integrate over the intended passband; compare configurations using the same bandwidth definition.
- Changing bandwidth (or RBW) between measurements and comparing results directly.
- Letting Vref noise couple into the stage and misattributing it to the op-amp.
- Using insufficient low-frequency resolution and masking 1/f or bias-related noise behavior.
Design actions that move the noise needle (in priority order)
Lower impedance reduces in conversion and resistor noise weighting, but verify output drive, distortion, and load stability.
Smaller R often favors low en; larger R makes in and bias terms more important. Verify noise under the real corner conditions.
Excess gain or high Q increases corner weighting and can raise in-band noise even when spot noise looks unchanged.
Filter, decouple, and route Vref/Vbias to avoid injecting low-frequency noise into the MFB output.
Linearity & distortion: THD/SFDR under real loads
Distortion drivers to diagnose (before changing the topology)
As the output approaches headroom limits, compression and odd-order products rise rapidly, often first near the corner region.
Low resistive loads increase output current demand; THD can worsen sharply with amplitude even if small-signal AC looks perfect.
ADC inputs, long cables, and input capacitances reduce phase margin. The result can be corner-linked peaking and distortion bumps.
Why corner peaking can amplify THD risk (high Q effect)
Higher Q introduces magnitude peaking near the corner. At those frequencies, the stage (and sometimes internal nodes) sees larger effective swing for the same input level. This increases headroom stress and output-current demand exactly where loop margin is also most sensitive.
Set maximum swing using the peak region, not the flat passband. Use the worst-case peaking condition as the linearity guardband anchor.
Test hooks that reveal the real limiter (THD/SFDR/IMD)
Measure across frequency and amplitude, focusing on the corner and the peaking region where risk concentrates.
Use two tones that stress the corner region; inspect intermod products for load-driven nonlinearity.
Repeat with the actual load (ADC input, cable, or specified R||C). Small-signal lab conditions are not transferable.
- Load: R||C = ___ ; bias = ___ ; swing = ___
- THD < X dB across ___ to ___, including the peaking region.
- No distortion “bump” larger than Y dB around the corner/peak zone.
Practical actions to reduce THD risk (in priority order)
The fastest lever: reduce peak-region swing demand and keep the stage inside its linear envelope.
Isolation often stabilizes the load interface and reduces distortion bumps triggered by phase-margin loss.
Screen parts using the intended swing, frequency, and load; avoid relying on “typical THD” under light-load conditions.
Set amplitude limits and validation around the peaking region to prevent late-stage THD surprises.
Stability & interaction: source-Z, load-Z, and parasitics
Source impedance interaction (how source-Z reshapes effective Q)
In an MFB stage, the source is not “outside” the loop. Source impedance couples into the inverting-node effective impedance, which can shift the corner behavior and reshape peaking. A different generator, fixture, or series resistance can change Q-like behavior without changing the nominal R/C values.
- Peaking height/position changes with source or series resistance.
- Step overshoot changes even when the PCB stays the same.
- Corner-region phase behavior shifts unexpectedly.
- Model source-Z as a window (min/max) in simulation.
- Validate peaking and step response across that window.
- Use a controlled series element only when needed, and verify its side effects on noise/distortion elsewhere.
Load impedance and isolation (when Riso / buffer becomes mandatory)
Real loads are rarely purely resistive. ADC inputs, cables, protection devices, and probing hardware often behave like R||C. That load can reduce phase margin and create a narrowband bump near the corner. Isolation is a controlled way to decouple the loop from the load without redesigning the filter.
- Downstream behaves like R||C (ADC, cable, clamp network).
- Response changes with probe type or cable length.
- Ringing frequency is stable and repeats across boards.
- Add Riso near the output pin and sweep its value as an A/B diagnostic.
- Use a buffer stage when load variation is unavoidable.
- Re-check peaking and step response in the real load corner case.
If peaking/ringing changes strongly with Riso, the load interface is the dominant coupling path.
PCB parasitics: four injection points that rewrite phase margin
Sensitive-node capacitance adds an extra pole/zero interaction near the corner and can increase peaking.
Output capacitance reduces phase margin and can create sustained ringing or intermittent oscillation.
Ltrace with capacitive nodes forms a resonant bump that shows up as a narrowband peak and repeatable ringing frequency.
Shared return paths convert output currents into a reference shift, effectively injecting phase error into the loop.
Fast localization (A/B tests: change one variable, read the signature)
Large change in ringing/peaking points to load-C coupling and phase-margin loss at the output interface.
Peaking height/position changes point to source-Z coupling into the inverting-node effective impedance.
A visible response change indicates measurement injection or ground impedance coupling through the return path.
Peak height, ringing frequency, and settling time constant under each A/B condition.
Engineering checklist & verification hooks (bench → production)
Layout checklist (highest impact first)
- Keep the inverting node short with minimal copper area and minimal vias.
- Minimize feedback loop area; place R/C elements tightly around the op-amp pins.
- Use guard/keepout around high-impedance nodes to reduce Cin and leakage pickup.
- Maintain continuous return paths; avoid crossing splits for the output current return.
- Separate high-current loops from sensitive references; prevent Zgnd injection into the loop.
- Place decoupling close; keep current loops compact and predictable.
- Match trace environments for repeatability across channels.
- Place critical parts with consistent orientation and proximity to reduce drift mismatch.
- Control routing inductance for output and feedback paths.
Bench checklist (what to measure and what it catches)
Detects peaking shifts and phase anomalies caused by source/load interaction and parasitics.
Reveals ringing frequency, overshoot, and settling behavior tied to phase-margin loss and resonances.
Validates integrated noise across the intended bandwidth and catches Vref injection and impedance-window sensitivity.
Captures load-driven distortion bumps near the corner/peaking region that do not appear in small-signal AC checks.
- Peaking < X ; overshoot < Y% ; settle < T
- In-band noise < N ; THD < D across band (including peak region)
Production hooks (test points, loopback, calibration slots, reject bins)
- Vin, Vout, Vref (bias), and a clean reference ground point.
- Optional: Riso option pads to select isolation window in production.
- Bypass the downstream load for isolation diagnosis.
- Loopback fixtures to reproduce AC/step behavior consistently.
- Digipot or resistor options for gain/threshold tuning.
- EEPROM parameter slot to track calibration revision and guardband windows.
- Peaking > X → bin “peaking”
- Ringing / oscillation beyond T → bin “stability”
- THD bump > Y in peak region → bin “linearity”
- In-band noise > N → bin “noise”
H2-11. Applications (audio & measurement bandwidth shaping)
MFB LP/HP is most valuable as a repeatable 2nd-order building block: predictable bandwidth shaping, controllable peaking (Q), and easy reuse across audio and measurement front-ends. The goal in each application is the same: set fc, limit peak gain, and verify with time-domain + distortion + noise checks.
A) Audio: LP/HP bandwidth shaping (clean, low peaking)
- Starter recipe: choose Q near “no peaking” (avoid resonant emphasis unless intentionally voiced).
- Where it shines: rumble removal (HP), bandwidth limiting (LP), anti-RF “cleanup” before ADC or codec.
- Common trap: high-Q audio shaping can create hidden peak gain → headroom loss and THD rise at the peak.
- Passband peaking ≤ +0.5 dB (or per voicing target)
- Step response overshoot ≤ 10% (or per transient spec)
- THD+N at worst-case peak frequency meets system target under real load
B) Measurement: bandwidth shaping for noise control and settling
- Starter recipe: set fc from required signal bandwidth + settling margin; keep Q modest to avoid ringing.
- Why MFB fits: stable shaping with component ratios that are practical for production.
- Common trap: “AC looks perfect” but step settling fails because parasitics and source/load interaction shift Q.
- Step settling to ±0.1% within the measurement window
- In-band noise (integrated) stays below the SNR budget margin
- Peaking/phase shift stays stable across temp and tolerances (Monte-Carlo correlation)
C) “2nd-order AAF cell” in front of ADC/DAQ
- Role: provide a predictable 2nd-order roll-off block that can be cascaded if more attenuation is needed.
- Key trade: attenuation vs group delay/settling; avoid excessive Q that creates a peaking “alias injector”.
- Common trap: clamp/protection or ADC kickback changes effective loading → Q shifts and ring/osc appears.
- Aliased tone/spur improvement is measurable at the sampling rate used
- Driver remains stable with ADC input network (kickback + input capacitance)
- Full-scale THD/SFDR meets target at the peak-gain frequency region
H2-12. IC selection logic (op-amp choices + component strategy)
For MFB LP/HP, “works in simulation” is not enough. Selection must be driven by peak-gain headroom, phase/GBW margin, and noise & distortion under real load. The workflow below turns selection into a field checklist and provides example MPNs (op-amps + passives) for fast datasheet lookup.
A) Selection funnel (Must-have → Nice-to-have)
- Must-have: THD/SFDR at target frequency & swing, GBW/phase margin at the chosen Q, and a noise profile that fits the budget.
- Then: output drive into the real load (including cable/ADC input), supply headroom, and EMI robustness.
- Finally: Iq/cost, package/assembly constraints, and production stability (temp/tolerance sensitivity).
B) Must-have fields to request / verify (datasheet → bench)
| Field | Why it matters in MFB | What to check |
|---|---|---|
| THD/SFDR @ target | Peak gain can push swing/loop stress at one frequency. | THD vs frequency, swing, and load; not only “1 kHz, 2 Vrms”. |
| GBW & phase margin | Higher Q amplifies phase sensitivity and peaking. | Margin across temp/process; stability with feedback capacitors. |
| en / in noise | Inverting node impedance shapes how noise is amplified. | Noise at low-f (1/f) and in-band; match with resistor scale. |
| Output drive & capacitive load | Load can shift phase and cause ringing/osc. | Stable drive into worst-case Cload; consider Riso/buffer policy. |
| Swing / headroom | Peak gain consumes headroom; clipping is frequency selective. | Output swing vs load; input common-mode constraints (if single-supply). |
- No unexpected peaking shift beyond production tolerance expectation
- Step overshoot/settling meets window across worst-case source/load
- THD/SFDR meets target at the peak-gain frequency region
- Integrated noise meets SNR margin with the chosen resistor scale
C) Example MPNs (fast lookup) — op-amps + passives
- Low-noise / low-THD (dual): TI OPA1612AIDR, TI OPA1602AIDR, TI OPA1678IDR
- FET/JFET input (good when resistor values are higher): TI OPA1652IDR (dual), TI OPA1656IDR (single), TI OPA1642AIDR (dual)
- High-speed / wideband option: ADI ADA4898-2YRDZ-R7 (dual; check supplies & headroom policy)
- Precision (DC/low-frequency measurement): TI OPA189IDR (single; validate distortion if used in audio band)
- Reference-grade “general precision”: ADI ADA4077-2ARZ-R7 (dual; confirm bandwidth/Q feasibility)
- Vishay Dale 0805 0.1%: TNPW080510K0BEEA (example value 10 kΩ; match values per design)
- SUSUMU 0805 0.1%: RG2012P-103-B-T5 (10 kΩ; stable ratio networks for Q control)
- Murata C0G 0603 1 nF 50 V 1%: GRM1885C1H102FA01D
- Murata C0G 0603 10 nF 50 V 5%: GRM1885C1H103JA01D
- TDK C0G 0603 10 nF 50 V 5%: CGA3E2C0G1H103J080AA
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H2-13. FAQs (MFB LP/HP) — troubleshooting & production criteria
These FAQs close common “simulation vs bench” gaps for MFB low-pass/high-pass filters. Each answer is fixed to a 4-line, measurable structure: Likely cause / Quick check / Fix / Pass criteria.
