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Game Controller Hardware Design, IC Selection & Debug Playbook

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This guide turns game-controller issues into an evidence-first workflow: capture the right controller-side waveforms and link statistics to separate power/EMI coupling from radio, input, IMU, haptics, and charging causes. It provides fast A/B checks and clear H2 routing so field symptoms can be attributed to root-cause categories without relying on host-side guesses.

H2-1|Scope & Variants: Controller Form Factors and Engineering Boundaries

Purpose

This page focuses on game controller hardware only: input sampling, low-power MCU, radio link behavior at the controller side, IMU integration, haptics, single-cell Li-ion charging/power-path, and EMI/ESD evidence. It avoids console/PC internals, OS/driver tuning, and protocol-stack deep dives to keep decisions measurable and repeatable.

In scope (engineering deliverables)

Scan/debounce/ADC pipeline → MCU scheduling → report emission (USB/air) → evidence: PER/retry, rail droop, reset causes, and IMU drift vs temperature/events.

Out of scope (do not expand)

Console APU/GPU/VRM/HDMI; OS/driver walkthroughs; full BLE stack/profiles; USB-C PD/PPS state machines; adapter PFC/LLC/flyback theory.


Three link variants (controller-side trade-offs only)

  • USB (wired): predictable latency and fewer tail events; stable power from VBUS. Key risks move to connector ESD, cable drop, and insertion transients.
  • BLE: strong ecosystem and low idle power, but jitter tails are sensitive to coexistence and retry events. This page treats impacts and evidence, not protocol teaching.
  • 2.4GHz proprietary + dongle: typically targets lower jitter and tighter experience control; trades off with dongle BOM, certification/ops complexity, and 2.4GHz coexistence sensitivity.

Key metrics: convert “feel” into measurable knobs

  • Controller-side latency: “physical actuation → report emitted.” Decompose into scan interval + debounce/filter window + report scheduling + retry/queue tail events.
  • Battery life: average current is not enough—watch peaks (haptics/LED/RF bursts) and wake frequency (report rate, IMU sampling, reconnect behavior).
  • Interference robustness: hand-blocking, 2.4GHz coexistence, and noise injection from haptics/charging. Validate with PER/retry stats aligned to rail waveforms.
  • Compatibility cost: pairing/reconnect success rate and platform variance. Field issues should map to a short evidence set (stats + a few rails + reset cause).
  • BOM cost: radio choice, antenna/mechanics, clocking, haptics driver, fuel gauge, protection parts, and production test burden.

Deliverable: Variant × Metric comparison (no protocol deep dive)

Link Latency/Jitter (controller-side) Battery pressure Coexistence/EMI sensitivity Compatibility & support cost BOM & certification
USB (wired) Easiest to cap worst-case: scan + debounce + report interval. Tail events mainly from MCU load and filtering choices. VBUS-powered; ensure cable drop and insertion transients don’t trigger brownout/reset. RF not a concern; focus shifts to ESD/EMI and clean return paths at the connector. High consistency; most issues are waveform- and reset-cause-driven. Lower radio BOM; higher connector protection and durability validation.
BLE Average is misleading; manage jitter tails from retry/coexistence events. Evidence must focus on tail cases. Great idle power; high report rate + IMU + frequent wakeups can dominate the budget. 2.4GHz coexistence and hand-blocking matter; charger/haptics noise can raise PER. Pairing/reconnect/platform variance can drive support load; stats must be logged. No dongle; tighter RF/layout constraints and tuning time.
2.4G + dongle Often targets lower jitter; validate extreme cases (retry bursts, noisy supply, grip attenuation). Typically between BLE and USB; depends on duty cycle and reconnect strategy. Still 2.4GHz-limited; dedicated strategy can trade complexity for stability. Dongle adds operational/support complexity but can reduce cross-platform variance. Added dongle BOM/certification; higher production test and logistics overhead.
Evidence method (controller-side latency):
  • Input pipeline: fixture triggers a button while toggling a GPIO. Use a logic analyzer to align “actuation edge → scan hit/state change.” Output: scan interval and debounce contribution.
  • Report emission: toggle a GPIO when a report is generated. Align with USB visibility (wired) or “radio TX event” marker. Output: scheduling delay and tail events.
  • Jitter classification: tag anomalies by (a) retry/coexistence, (b) rail droop/ground bounce, (c) MCU load. Each category must be supported by one waveform or one logged counter.
Link Variants vs Key Metrics USB, BLE, and 2.4GHz+dongle compared by latency, battery pressure, robustness, and support/BOM costs. Link Variants USB • BLE • 2.4G + Dongle (controller-side) USB (Wired) Predictable worst-case BLE Watch jitter tails 2.4G + Dongle Lower jitter goal Key Metrics Latency & Jitter Battery Budget Robustness Support Cost USB BLE 2.4G+D Validate with scan rate, report rate, PER/retry counters, and rail waveforms.
Figure H2-1. Three controller link variants and a shared metric framework. The focus is controller-side knobs: scan, debounce, report rate, retries, and power evidence.

H2-2|System Block Diagram & Power Domains: Domains, Returns, and Noise Coupling

Core Map

This section defines the controller’s coupling map: signal flow and power flow in one view, then labels domains as Quiet (RF/IMU/ADC-sensitive) or Dirty (haptics, LEDs, charger switching). Every later design decision should tie back to this map and its test points.

Domain rules: what must stay quiet vs what is inherently noisy

  • Quiet domains: RF rail, IMU rail, ADC reference & input sensing. The goal is controlled impedance and return paths so ripple/ground bounce becomes measurable and fixable.
  • Dirty sources: haptics driver loop, LED PWM, charger switching nodes. High di/dt and dv/dt inject noise through rails, ground returns, and near-field coupling.
  • Practical meaning: “domain separation” is not a slogan—success is when the dominant coupling path can be explained with a small set of waveforms and counters.

Deliverable A: power tree with test points

Mark VBUS (USB 5V), VBAT (single-cell), SYS (power-path output), 3V3 logic, RF_LDO, IMU_VDD, and HAPTIC_SUPPLY. Recommend TP_VBUS, TP_SYS, TP_RF, TP_IMU for field closure.

Deliverable B: “quiet vs dirty” layout checklist

Antenna keepout, short haptics current loop, controlled returns, and dedicated filtering for RF/IMU rails. Each rule should map to a failure mode and a measurable waveform.

Evidence: 3 fast triage patterns (symptom → what to capture first)

  • Packet loss when haptics turns on: capture TP_SYS droop/ringing + PER/retry counters aligned in time + haptics current waveform. Typical buckets: rail droop triggers RF instability; return-path pollution; near-field EMI into antenna/front-end.
  • IMU drift/jumps: capture TP_IMU ripple + IMU data aligned to temperature/haptics events + I²C/SPI error count. Typical buckets: supply/ground noise; mechanical coupling/stress; calibration consistency issues (no algorithm deep dive here).
  • False presses / rapid repeats: capture raw pre-debounce samples + 3V3/ground bounce aligned to LED/haptics events + debounce window settings. Typical buckets: threshold bounce; too-short debounce; scan/report cadence colliding with noisy events.
Layout & test-point checklist (short and enforceable):
  • Keep antenna keepout clear; avoid high di/dt return currents crossing RF areas.
  • Place RF_LDO and IMU filtering close to loads; ensure returns go to a defined “quiet reference” point.
  • Make the haptics current loop the shortest closed loop on the PCB; do not route it under IMU/RF.
  • Constrain charger switching noise; ensure TP_VBUS/TP_SYS make ripple and droop observable.
  • Keep ADC reference and stick/trigger sensing away from PWM/switch nodes; add filtering where needed.
  • Place IMU away from motors/magnets and high-current copper; control assembly stress and resonance.
  • Reserve TP_VBUS / TP_SYS / TP_RF / TP_IMU for field closure without rework.
  • Place ESD parts at external entry points (USB, metal buttons, charging contacts) with short return paths.
Block Diagram with Quiet/Dirty Domains and Test Points Signal and power blocks for a controller. Quiet domains are RF and IMU rails. Dirty sources are haptics and charger switching. Includes recommended test points. System Domains & Test Points Signal flow + power flow in one view (evidence-driven) Quiet Dirty Inputs Buttons / Matrix Stick / Trigger ADC Debounce / Filter Low-Power MCU Scan + Timestamp Report Scheduling Sleep / Wake Radio BLE / 2.4G IMU Accel / Gyro Haptics ERM / LRA Driver High di/dt loop Power Path VBUS USB 5V VBAT Li-ion Charger Power-Path SYS Main RF_LDO Quiet IMU_VDD Quiet 3V3 Logic TP_VBUS TP_SYS TP_RF TP_IMU Noise via SYS/GND Switch ripple
Figure H2-2. A single coupling map: signal blocks + power path + quiet/dirty domains + four test points used to close field issues with waveforms and counters.

H2-3|Input Front-End: Sampling Chain and Low-Latency Knobs

Goal

“Feel” and “latency” are treated as engineering quantities. This section maps buttons, sticks, and triggers into a single sampling model and exposes the knobs that control worst-case latency, false events, and drift. Only hardware and firmware sampling are covered—no in-game settings and no platform driver walkthroughs.

Controller-side latency budget (measurable)

Treat input latency as a sum of bounded terms:
Latency ≈ scan_interval/2 + debounce_delay + filter_group_delay + report_scheduling
Optimize by constraining the tail, not only the average.

Non-overreach rule (enforceable)

Adjust only scan / debounce / ADC / filter / deadzone / report period. Do not discuss in-game sensitivity, aim assist, or OS settings.


Button matrix: scan rate vs debounce window

Faster scan reduces scan-bound latency but increases CPU wakeups and edge activity. Shorter debounce reduces delay but increases false repeats if contact bounce/noise is not controlled. The correct target is a bounded worst-case that keeps false-event rate under control.

Stick sensing: potentiometer vs Hall

Pot: lower BOM, risks wear noise and endpoint drift. Hall: better lifetime consistency, risks sensitivity to supply/EMI and mechanical magnet offset. Both require a defined noise budget and a stable reference/return path.

Trigger: linear ADC + endpoint calibration

Endpoint mismatch is an engineering problem: sampling window, temperature dependence, and rail/noise coupling must be controlled. Calibration must not “learn” transient noise as a new endpoint.

Report scheduling: latency tails are often self-inflicted

Even if scan/ADC are fast, a coarse report period or bursty task scheduling can dominate tail latency. Use timestamped events and a deterministic report cadence under RF/CPU load.

Deliverable: Input chain parameter table (ready for design review)
Input Scan / Sample Debounce / Filter ADC / Sensor Deadzone / Mapping Report cadence Primary evidence fields
Buttons (matrix) Scan rate (Hz), drive pattern Debounce window (ms), repeat gating N/A N/A Event → report scheduling Raw bitstream, false-repeat count, time-aligned noise events
Stick ADC sample rate (ksps) Filter order/cutoff, settling window Pot or Hall, ADC bits, input impedance Deadzone, center calibration method Report period + smoothing policy Raw ADC codes, drift vs temperature, noise vs haptics/charge events
Trigger ADC sample rate (ksps) Filter + hysteresis ADC bits, linearity check Endpoint capture window, curve mapping Report period + timestamping Endpoint delta across units/temperature, rail ripple correlation
System Task cadence Priority policy N/A N/A Fixed report period (ms) / event batching Tail latency histogram, retry bursts (if wireless), CPU load markers
Evidence-first triage (symptom → capture first)
  • False repeats / “stuck” button: capture raw matrix samples (pre-debounce) + debounced events with timestamps; align with scan interval and any PWM/haptics activity to separate bounce vs injected noise.
  • Stick drift / jitter: capture raw ADC codes + reference rail ripple + temperature point; classify as wear/contact noise (pot) vs supply/mechanical offset sensitivity (Hall).
  • Trigger endpoint mismatch: capture endpoint values across temperature and battery states; verify endpoint capture window; ensure calibration does not update endpoints during transient noise events.
Input Sampling Pipeline and Knobs Block diagram showing buttons, stick, and trigger sampling chains into MCU scheduling and report emission, with key tunable knobs and symptom mapping. Input Sampling Pipeline Scan • Debounce • ADC • Filter • Deadzone • Report Scheduling Buttons Matrix Scan Debounce Stick Pot or Hall ADC + Filter Deadzone Trigger Linear ADC Endpoint Cal MCU Timestamp Event Queue Report Scheduler Deterministic Cadence Low-Power Wake Plan Report Out USB / BLE / 2.4G Report Period Tail Control scan rate debounce ADC bits filter deadzone report period Symptoms false repeats stick drift endpoint mismatch
Figure H2-3. A unified input model: buttons, stick, and trigger feed a timestamped event queue and a deterministic report scheduler. The tunable knobs are kept explicit.

H2-4|MCU Selection: Peripheral Checklist, Low-Power Metrics, and Debug Evidence

Goal

MCU selection should be executable: define minimum thresholds, a 5–8 item scorecard, and the evidence hooks required to close field failures (brownout, lockups, wake failures). This is a controller-side checklist, not a generic MCU overview.

Controller-side responsibilities (bounded)

Input scan/sampling, deterministic report scheduling, low-power state machine, and timing coordination with IMU/radio/haptics. Keep focus on external interfaces and time determinism.

Must-have peripherals (non-negotiable)

Multi-channel ADC, I²C/SPI for IMU, timers for scan/PWM/timestamp, DMA to reduce CPU wake time, GPIO wake sources, and a stable RTC path.

Minimum thresholds (fail-fast gates)
  • ADC capacity: enough channels and sampling budget for stick + trigger with margin (including settling and filtering).
  • Timer determinism: stable scan cadence and PWM generation without jitter under ISR load.
  • Low-power completeness: retention mode(s) + reliable wake path + defined peripheral restore behavior.
  • IMU bus reliability: I²C/SPI remains stable across sleep/wake cycles; “first transaction after wake” must be predictable.
Scorecard (5–8 items) — use for procurement and engineering alignment
Category What to verify (controller context) Why it matters Evidence hook
Power modes Deep sleep + retention options; clear wake sources Battery life and predictable behavior across duty cycles Sleep current by mode; wake success rate
Wake latency Worst-case from IRQ to stable sampling + report Tail latency control under real workloads Timestamped wake-to-report histogram
ADC quality Noise/linearity/settling; scan sequencing Stick drift/jitter and trigger endpoint consistency Raw code noise; endpoint stability vs temp
Timers + DMA Hardware offload for scan/PWM/transfer Lower CPU duty and less scheduling jitter CPU active time; ISR load markers
Debuggability Reset cause readout; fault logging; watchdog support Field closure without guesswork BOR/WDG counters; last-fault record
EMI/ESD resilience I/O drive control; clock flexibility; margin testing Prevents random lockups/reboots Error counters vs ESD/EMI events
Supply chain risk Package, lifecycle, second source, compliance docs Stable production and predictable yield Availability & PCN/EOL visibility
Security (optional) Secure boot/crypto if product requires anti-tamper Protects pairing keys and firmware integrity Feature availability; provisioning flow
Evidence SOP: brownout, lockup, and wake failure (capture-first routine)
  • Step 1 — read reset cause: classify BOR vs WDG vs external/software reset; persist the last cause in non-volatile or retained RAM.
  • Step 2 — align rail waveform: correlate the reset timestamp with SYS/3V3 droop or ringing (test points defined at the system level).
  • Step 3 — check bus health: log I²C/SPI error counts around wake and around high-noise events (haptics/charger switching).
  • Step 4 — bucket the root cause: power transient, EMI/ESD, or firmware scheduling/peripheral restore sequence.
MCU Selection Checklist and Evidence Hooks Diagram showing must-have peripherals, low-power metrics, production risks, and evidence hooks for field debug (reset cause and counters). MCU Selection Map Peripherals • Low Power • Production • Evidence Hooks Low-Power MCU Deterministic timing State restore Must-have ADC Timers DMA I²C/SPI GPIO wake RTC Low-power KPIs Sleep current (by mode) RAM retention Wake latency (worst) Evidence Hooks Reset cause: BOR / WDG Fault log + counters Bus errors near wake Scorecard Power modes Wake latency ADC DMA Debuggability EMI margin Supply chain
Figure H2-4. MCU selection is driven by controller constraints: deterministic timing, low-power completeness, production risk, and evidence hooks (reset cause + counters) for fast field closure.

H2-5|Radio Architecture: BLE vs 2.4G Proprietary (Controller-Side Trade-offs)

Intent

This section compares BLE and 2.4 GHz proprietary + dongle only from the controller perspective: controller-side latency (including tail), robustness under interference and hand grip, power consumption (average + worst cases), pairing/reconnect friction, and BOM/complexity. No deep protocol-stack tutorial.

Measure what users feel: latency tails

Prioritize p95/p99 latency and jitter, not only averages. Tail growth typically comes from bursts of retries, queueing, and reconnect events under weak RSSI or crowded 2.4 GHz.

Power must include “bad scenes”

Battery impact should cover weak signal and coexistence pressure: higher retry rate and frequent reconnects can dominate energy, even when idle power looks excellent on paper.


BLE (controller-side)

Strong baseline for power efficiency and broad compatibility. Latency tail is shaped by the effective send cadence and retry behavior under interference. Validate with timestamped event-to-report measurements and retry/PER statistics across grip and distance conditions.

2.4G proprietary + dongle (controller-side)

Often targets lower jitter and tighter cadence control, but adds dongle BOM, regulatory burden, coexistence validation workload, and user-support cost. Robustness must still be proven under grip shadowing, charging, and haptics/LED activity.

Deliverable: Link selection matrix (ready for decision)
Link Option Latency (avg / p95 / p99) Robustness Power Impact Pairing / Reconnect BOM / Complexity Controller-side Evidence
BLE Tail depends on effective cadence and retries under RF pressure Grip shadowing and crowded 2.4G can increase retry bursts Excellent idle baseline; worst-case energy rises with retries/reconnects Generally simple; reconnect time must be measured No dongle; lower accessory cost Timestamped latency histogram, PER/retry rate, RSSI jitter vs grip/distance
2.4G Proprietary + Dongle Often tighter cadence control; tail still grows with interference Potentially strong for low-jitter targets; must prove coexistence Can be efficient if retries are controlled; validate peak + bad scenes Dongle introduces pairing/support paths; measure friction and success rate Dongle BOM + regulatory + validation workload PER/retry + reconnect time under grip/charging/haptics; A/B antenna diversity test
Evidence plan: correlate stutter/drop with grip, distance, charging
  • Conditions: grip posture (left/right/full grip) × distance (near/mid/far) × charging (off/on).
  • Wireless stats: RSSI mean + jitter, PER, retry rate, reconnect count/time.
  • Experience metric: event-to-report p95/p99 latency histogram with aligned condition labels.
Radio Choice Matrix and Evidence Mapping Block diagram comparing BLE and 2.4 GHz proprietary plus dongle, with evaluation axes and evidence mapping to grip, distance, and charging conditions. Radio Architecture Controller-side trade-offs • tails • robustness • power • cost BLE Low-power baseline Tail shaped by retries Broad compatibility 2.4G Proprietary Tighter cadence target Dongle + regulatory Coexistence validation Dongle BOM / support Selection Axes Latency tail (p99) Power (bad scenes) Robustness Pairing friction Cost / complexity Evidence RSSI jitter PER / retries Reconnect time Latency histogram Conditions Grip posture Distance Charging
Figure H2-5. Choose the link by controller-side tails, robustness under grip and charging, and total cost (including dongle/regulatory load). Prove with aligned statistics.

H2-6|RF Coexistence & EMC: Suppressing Haptics/Charging/LED Coupling

Intent

Explain system coupling end-to-end: why packets drop when haptics turns on, and why inputs jitter during charging. The focus is practical: noise sources, coupling paths, victims, and a layout/return-path checklist backed by A/B measurements (near-field, spectrum, and packet statistics).

Noise sources (typical spectra)

Haptics PWM high di/dt loops, charger switching ripple and dv/dt nodes, LED scan periodic edges and ground bounce.

Victims (what breaks first)

Radio (supply/ground/antenna near-field), input ADC (reference and threshold), IMU (rail cleanliness and mechanical coupling).

Deliverable: Layout / routing / domain checklist (review-ready)
  • Domain split: RF and IMU/ADC rails use dedicated filtering (local LDO/RC/LC) close to the loads.
  • Dirty loops constrained: haptics and charger high-current loops are short and stay inside the “dirty zone”.
  • Return path control: avoid dirty return currents crossing RF/ADC reference regions; define clear return corridors.
  • Switching node hygiene: keep dv/dt nodes compact and away from antenna keepout and high-impedance ADC inputs.
  • Antenna keepout: preserve clearance and avoid high di/dt routing under/near the antenna region.
  • Local energy: provide local bulk/decoupling for haptics so PWM current steps do not modulate shared rails.
  • ESD current path: ensure ESD current returns via the shortest path without detouring through sensitive grounds.
  • Input routing: keep stick/trigger ADC inputs away from PWM/motor wires; guard with stable reference where needed.
  • LED scan containment: LED scan currents should not share reference returns used by ADC/IMU.
  • Test points: expose RF rail, SYS rail, IMU/ADC reference points for correlation with packet stats and jitter.
Evidence: A/B method that closes debates
  • Near-field: use a probe to identify hotspots around haptics/charger/LED and the antenna region; record dominant frequency bands.
  • Spectrum: confirm whether noise lines correlate with PWM or switching frequency and harmonics.
  • Packet stats: track PER/retry rate and latency tails with haptics on/off and charging on/off; correlate with RSSI jitter.
  • Input raw stability: log raw ADC variance for stick/trigger during the same A/B runs to separate RF-only issues from ADC reference issues.
Coupling Map: Sources → Paths → Victims Diagram mapping haptics PWM, charger switching, and LED scan noise sources through supply ripple, ground bounce, and near-field coupling into radio, input ADC, and IMU, with mitigation tags. RF Coexistence & EMC Sources → Coupling paths → Victims • backed by A/B evidence Sources Haptics PWM high di/dt Charger SW ripple / dv/dt LED Scan periodic edges Paths Supply ripple GND bounce Near-field Victims Radio PER / retries Input ADC jitter / drift IMU rail sensitivity Mitigations Domain split LC / RC Return loop Keepout
Figure H2-6. Treat coupling as a map: identify sources, confirm paths (supply, ground, near-field), then validate fixes by A/B tests using near-field/spectrum and packet statistics.

H2-7|IMU Integration: 6DoF Sensor Chain, Calibration, and Drift Evidence

Intent

Cover IMU integration inside the controller only: selection parameters, data path (ODR/FIFO/timestamp/bus), controller-side calibration (bias/scale/misalignment), health checks, and evidence-driven drift diagnosis versus temperature, vibration, and charging state. No AR/VR system fusion or algorithm derivations.

What actually breaks “aim feel”

Drift complaints usually map to bias stability, timestamp quality, and rail cleanliness. Treat the IMU as a timed sensor pipeline, not a single chip.

What must be proven

Validate with a repeatable matrix: temperature steps, vibration on/off, and charging on/off, while logging raw variance, bus error counters, FIFO events, and drift curves over time.


Deliverable: IMU selection scorecard (controller-ready)
Parameter Why it matters Minimum gate (concept) How to validate (controller-side) Common failure signature
ODR / Sample rate Defines usable motion bandwidth and latency budget. Stable rate under worst MCU load; no periodic gaps. Log inter-sample intervals and FIFO depth utilization. Periodic “micro-stutter” and aim discontinuities.
Full-scale range Avoid saturation in fast flicks while keeping resolution. No saturation counts in defined stress motion. Replay stress gesture; count saturation events. Clipped motion or non-linear feel at high speed.
Noise density Sets the noise floor of small-motion responsiveness. Consistent floor across units and temperatures. Static window variance + simple FFT floor check. “Shimmer” when idle; small motion feels noisy.
Temp drift Bias changes with heating create gradual aim drift. Bias stays within a bounded envelope over ΔT. Temperature step test; track bias vs temperature. Drift grows after warm-up or charging.
FIFO depth Protects continuity when MCU is busy with radio/USB tasks. No overflow during peak workload. Force radio retries + logging; check overflow counter. Sudden jumps from dropped samples.
Timestamp support Accurate timing prevents jitter and alignment errors. Low jitter timestamp or deterministic sampling. Histogram timing jitter; correlate with latency tails. “Wobble” despite good raw noise metrics.
Bus (I²C/SPI) margin Bus errors can mimic sensor faults and cause gaps. Error counter stays near-zero across EMC stress. Log bus error counters vs vibration/charging. Intermittent dropouts, sudden resets, stuck reads.
Calibration (controller-side): what to calibrate and how to judge it
  • Bias (zero offset): static windows should converge to a stable mean; verify repeatability after power cycles and temperature steps.
  • Scale factor: repeated standardized motions should produce consistent amplitude; verify against an internal reference gesture plan.
  • Misalignment: axis cross-coupling should remain bounded; verify by controlled rotations and checking off-axis leakage.
  • Traceability: store calibration version and manufacturing batch metadata to isolate unit-to-unit spread.
Drift evidence matrix (repeatable experiment)
  • Conditions: temperature (cold/ambient/hot) × vibration (off/on) × charging (off/on).
  • Log: bias vs time, raw variance, FIFO overflow, bus error counters, and event timing jitter.
  • Interpret: drift only during charging suggests rail/return-path coupling; drift only during vibration suggests mechanical coupling or mounting stress (evidence-first).
IMU Sensor Chain and Calibration Evidence Block diagram showing IMU gyro/accel to FIFO to timestamp to bus to MCU to outputs, with calibration blocks and a drift evidence matrix for temperature, vibration, and charging. IMU Integration 6DoF chain • FIFO • timestamp • calibration • evidence matrix Sensor Data Path IMU Gyro / Accel FIFO No gaps Timestamp Low jitter I²C / SPI Error cnt MCU Queue Outputs Raw stream Calibrated stream Health flags Calibration Bias Scale Align Drift Evidence Matrix Temperature Vibration Charging Log: bias / variance / errors
Figure H2-7. Treat the IMU as a timed pipeline: continuity (FIFO), timing (timestamp jitter), and rail/bus margin drive drift symptoms. Validate with a temperature/vibration/charging matrix.

H2-8|Haptics System: ERM vs LRA, Driver Strategy, and Consistency Validation

Intent

Convert “haptics feel” into measurable electrical and mechanical checkpoints. Compare ERM and LRA from an engineering perspective, describe driver IC requirements (current limit, protection, diagnostics), and define waveform and response acceptance points to guarantee consistency across units, temperature, and battery state.

ERM: simple bring-up, wider spread

ERM is easy to drive but has slower response and broader unit-to-unit variance. Consistency depends heavily on current limiting, soft-start, and how heating changes effective torque over time.

LRA: fast response, needs controlled drive

LRA targets faster response and better repeatability, but requires a drive strategy that tracks the effective resonance region. Validation must include frequency tolerance and response time, not only “it vibrates”.

Deliverable: ERM/LRA decision table (review-ready)
Item ERM LRA What to measure Acceptance focus
Response time Slower start/stop Faster, crisp Acceleration rise time and settle Time-to-target envelope
Consistency Broader spread (aging/heat) Better if drive is controlled Unit-to-unit amplitude distribution Spread bound vs temp/battery
Drive complexity Low Medium (drive/frequency control) Waveform + response correlation Stable feel across patterns
Power Can be high at strong intensity Efficient near resonance Peak + steady current Peak current / thermal rise
Cost / risk Lower BOM, fewer constraints Actuator/driver constraints Bring-up yield and QA time Test time and diagnostics
Driver IC checklist (features that protect consistency)
  • Current limit: tight control prevents unit spread from becoming “feel spread”, and protects rails from PWM steps.
  • Back-EMF / regen clamp: limits voltage spikes during stop/transition to avoid coupling into sensitive domains.
  • Protection: OCP/OTP and brownout behavior should be deterministic to prevent random intensity drops.
  • Diagnostics: fault/status pins or readable flags enable field correlation (overcurrent, open load, thermal events).
  • EMI behavior: edge control and loop compactness reduce near-field injection that can raise packet retries.
Waveform acceptance points (engineering-grade)
  • Current rise: rise time stays inside a bounded window for repeatable onset.
  • Steady current: stable plateau within tolerance across battery states.
  • Frequency tolerance (especially LRA): frequency stays within an allowed offset band during the pattern.
  • Stop / transition spike: back-EMF or rail spike remains below a defined ceiling to protect RF/ADC domains.
Evidence order for hot/noisy/inconsistent haptics
  • 1) Electrical first: capture start/steady/stop current waveform and rail ripple.
  • 2) Mechanical next: capture acceleration amplitude and rise time under the same pattern.
  • 3) Thermal: measure temperature rise over time and correlate with intensity drop or frequency shift.
  • 4) Consistency: compare distributions across units, temperature, and battery; use diagnostics flags for classification.
Haptics Validation Map: Electrical → Mechanical → Consistency Diagram comparing ERM and LRA drive paths through driver IC to actuator, showing measurement checkpoints (current waveform, acceleration response, thermal) and consistency metrics across units, temperature, and battery. Haptics System ERM vs LRA • driver IC • acceptance points • consistency evidence Drive Paths ERM Path MCU PWM Driver IC ERM LRA Path Control Driver IC LRA Current limit Regen clamp Diagnostics Acceptance Checkpoints Current waveform Acceleration response Thermal rise Consistency Metrics Unit-to-unit spread Temperature dependence Battery-state dependence
Figure H2-8. Validate haptics with a closed loop: electrical waveform → mechanical response → thermal drift → distribution across units/temperature/battery. This is how “feel” becomes testable.

H2-9|Battery, Charging & Protection: Single-Cell Power-Path and Controller-Side Charging Design

Intent

Focus on controller-specific charging and runtime stability: USB 5V entry, ESD/OVP, linear vs switching chargers, power-path behavior for “play while charging”, fuel gauge trade-offs, and protection hooks (OVP/OCP/OTP/NTC/UVLO). Exclude adapter topology and deep USB-C PD details.

Why controllers disconnect while charging

Most “charge-then-drop link” events are a SYS rail stability problem: insertion transients, current limiting, or thermal regulation cause rail dips that trigger BOR/WDG or radio brownouts.

What must be captured

Debug requires a three-probe loop: VBUS, VBAT, and SYS aligned to events (plug/unplug, vibration start, reconnect).

Controller-side power-path checklist
  • USB 5V entry: ESD handling and over-voltage behavior should clamp fast without adding excessive DC drop that destabilizes charging.
  • Power-path (play while charging): SYS priority should remain stable under load steps while VBAT charging becomes a secondary goal.
  • Charging method: linear charging favors low noise but can thermal-throttle; switching charging improves efficiency but needs stronger EMI/layout discipline.
  • Protection hooks: OVP/OCP/OTP/NTC/UVLO should fail predictably (and be observable) instead of silently degrading UX.
Deliverable: Battery & charging selection checklist + test points
Item What to look for Why it matters in controllers How to validate Typical field symptom
Power-path support SYS regulation strategy and load-step tolerance Prevents disconnect during plug-in, vibration, and radio bursts Capture SYS dip vs event timing; check BOR/reset sources Charge starts → link drops → reconnect loop
Linear vs switching charger Thermal regulation vs ripple/EMI behavior Linear may throttle in “play+charge”; switching may inject ripple into sensitive rails Measure SYS ripple + thermal rise at fixed load profile Haptics intensity drops or random radio retries while charging
Fuel gauge method Coulomb-count vs voltage-based estimation Dynamic load spikes and low temperature can break voltage-only accuracy Log SoC vs current pulses; compare to stable-window behavior Battery % jumps, “low-battery” appears too early/late
Protection & sensing OVP/OCP/OTP, NTC, UVLO behavior Over-protective thresholds can cause avoidable shutoffs in vibration or low-battery bursts Induce controlled load steps; verify fault flags and rail response Low battery → random dropouts; warm device → charging stops
Diagnostics Status pins/flags, fault history Turns intermittent field issues into classifiable evidence Correlate fault flags with captured waveforms “Cannot reproduce” issues become measurable
Evidence capture: three-rail waveform loop
  • Test points: VBUS (USB 5V), VBAT (cell), SYS (system rail). Add a key regulated rail if available (e.g., 3V3).
  • Events: USB insert/remove, vibration on/off, peak report-rate periods, reconnect attempts.
  • Interpretation: SYS dips aligned to radio resets point to brownout; VBAT sag + UVLO points to low-battery instability; VBUS bounce points to cable/contact/entry protection interaction.
Single-Cell Power-Path and Test Points Block diagram from USB 5V entry through ESD/OVP to charger and power-path, branching to SYS loads and VBAT cell, with protection hooks and highlighted test points VBUS, VBAT, SYS. Battery & Charging USB 5V entry • power-path • fuel gauge • protection • test points Power-Path USB 5V VBUS TP: VBUS ESD / OVP Clamp Charger Linear / Switch Power-Path SYS priority SYS Rail Loads TP: SYS MCU RF IMU Battery Domain VBAT TP: VBAT NTC Fuel Gauge Coulomb Voltage Protection OVP OCP OTP UVLO Fault flags
Figure H2-9. Controller stability is a three-rail story: VBUS, VBAT, and SYS. Capture waveforms and fault flags around plug-in, vibration, and reconnect events to close the loop.

H2-10|Power Budget & Low-Power Modes: Reproducible Current Profiling for Real Battery Life

Intent

Battery life is an accounting problem: define usage scenarios, measure average and peak current with a reproducible method, track wakeups and report rate, and turn results into a module-level power budget. Provide an evidence path for “overstated runtime”, state-of-charge jumps, and low-temperature derating.

Average is not enough

Average current predicts runtime, while peak current predicts brownouts and disconnects. Wakeups and report rate explain why two “similar” firmwares can drain very differently.

Make results reproducible

A consistent scenario dictionary and fixed measurement windows reduce noise and make regression tracking meaningful across builds and batches.

Scenario dictionary (controller-relevant)
  • Standby: deepest sleep without link activity.
  • Connected idle: link up, minimal reports.
  • High report rate: frequent input reports and radio activity.
  • IMU on: continuous sampling plus periodic reporting.
  • Haptics on: vibration patterns active (peak current stress).
  • Charging: play while charging (SYS stability + charger overhead).
Deliverable: power profiling test plan (copy-paste ready)
Scenario Window Average current Peak current Wakeups / min Report rate Notes
Standby 60–300 s mA / µA class Short spikes Count Off / minimal Verify RAM retention and wake reasons
Connected idle 60 s Steady baseline Beacon spikes Count Low Log retries and link maintenance activity
High report rate 60 s Higher baseline Radio burst peaks Count High Record retries; correlate to peak current
IMU on 60 s Sensor + bus + MCU Readout bursts Count Medium Log ODR, FIFO behavior, and timestamp cadence
Haptics on 30–60 s Pattern-dependent Largest peaks Count Any Capture rail dips; align to vibration start/stop
Charging 60 s Charger overhead Insertion/transients Count Any Include VBUS/VBAT/SYS stability and thermal regulation
Module-level power budget (how to turn measurements into a ledger)
  • Bucket totals into Radio, MCU, IMU, Haptics, LED, and Quiescent (PMIC/charger).
  • For each scenario, record the dominant bucket and the top two multipliers (e.g., retries, report rate, vibration duty).
  • Use the ledger to explain “runtime claims” vs real usage: the largest scenario mismatch usually identifies the culprit.
Evidence paths
  • Overstated runtime: compare the power ledger to real scenario mix; identify which bucket exceeds the budget.
  • SoC jumps: correlate gauge readings with current pulses and VBAT sag; low temperature amplifies apparent jumps.
  • Low-temp derating: repeat the same scenario at cold vs ambient; peaks and VBAT dips often dominate even if average current is similar.
Power Profiling Funnel: Scenarios → Metrics → Budget Buckets Diagram showing a top layer of controller scenarios feeding a metrics layer (average, peak, wakeups, report rate) and then into module budget buckets (radio, MCU, IMU, haptics, LED, quiescent), with an evidence panel for runtime claims, SoC jumps, and cold derating. Power Budget scenarios • average & peak • wakeups • report rate • budget ledger Scenarios Standby Conn idle High report IMU on Haptics Charge Metrics Average current Peak current Wakeups / min Report rate Budget Buckets Radio MCU IMU Haptics LED Quiescent (PMIC/charger) Evidence Runtime claim vs ledger SoC jumps Cold derating
Figure H2-10. A reproducible profile starts with a scenario dictionary, measures average and peak current with wakeups/report-rate context, then converts results into a budget ledger to explain runtime claims and anomalies.

H2-11|Reliability & Field Debug: Evidence Chain SOP for Fast Root-Cause Attribution

Intent

Turn field debugging into an SOP: symptom → evidence → cause class → next test. Prioritize controller-observable facts: retry/PER statistics, reset reasons, VBUS/VBAT/SYS waveforms, temperature tags, and raw input sampling behavior. Avoid host OS or deep protocol tutorials.

3-minute triage (what to decide first)
  • Link-path: disconnects, latency spikes, “stutter” without reboot → start from retry/PER + RSSI/hold/charge tags.
  • Power-path: random reboot, brownout, “only fails when vibrating/charging” → start from reset reason + SYS dips aligned to events.
  • Input/IMU-path: false triggers, drift, inconsistent feel → start from raw samples (scan/debounce counters) + IMU drop/overflow counters + temperature.
  • Charge-path: cannot charge, charging stops, heats up → start from VBUS presence + charge state + NTC/OTP flags + SYS stability under load.
Evidence stack (capture in this order)
  • Level-1 counters/flags: retry count, PER window, reconnect count, charge state, UVLO/OTP flags, reset reason (BOR/WDG/pin).
  • Level-2 waveforms: VBUS / VBAT / SYS (plus one regulated rail if available) aligned to: plug/unplug, vibration on/off, report-rate changes.
  • Level-3 tags: temperature bucket (cold/ambient/hot), grip posture, distance, “charging yes/no”, “vibration yes/no”.
Deliverable: Minimum Viable Log fields (MVL)

Keep logs small but closing the loop. These fields enable correlation across link/power/input/IMU without deep protocol details.

Group Field (minimum) Why it matters Common interpretation
Time t_ms (monotonic) Aligns counters/waveforms/events Enables “event → rail dip → reset/retry” attribution
Battery soc, vbat_mV, chg_state Separates low-battery instability from RF issues VBAT sag + UVLO flags suggest power-path root causes
Link per_win, retry_cnt, reconn_cnt Quantifies “stutter” and latency spikes Rising retries with stable rails suggests coexistence/antenna blockage
Input scan_rate, debounce_hits, raw_delta_cnt Turns false triggers into measurable sampling evidence Debounce hits spike during vibration/charge → coupling/noise suspicion
IMU fifo_ovf, sample_gap Explains drift/jerkiness without fusion deep-dive Sample gaps correlated with power events suggest rail/clock disturbance
Reset reset_reason, bor_flag, wdg_flag Separates RF “disconnect” from power “reboot” BOR + SYS dip pinpoints brownout; WDG suggests firmware stall
Thermal temp_C or bucket Explains temperature-driven drift and charge throttling OTP/NTC triggers often show as “fails only when warm”
Deliverable: Symptom → Evidence → Cause class mapping (field-usable)
Symptom cluster Must-capture evidence Likely cause class (controller-side) Next shortest validation
Disconnect / reconnect loop PER/retry window + reconnect counter; reset reason; VBUS/VBAT/SYS around event; tags (charge/vibration/grip) RF coexistence / antenna blockage; SYS brownout; charger transient A/B: vibration on/off + charging on/off + fixed distance; correlate retry rise vs SYS dip
Latency spikes (no reboot) Retry/PER trend; report rate; sample gap counters; SYS ripple snapshot Retransmission bursts; scheduling/wakeup storms; noisy rails impacting timing margins Hold report rate constant; step distance/grip; check whether retries explain spikes
IMU drift / inconsistent motion Temperature tag; IMU sample gaps/FIFO overflow; bias trend vs time; vibration state Temperature drift / mounting stress; supply noise coupling; sample timing instability Thermal step test (cold→ambient→warm) + constant vibration A/B; log bias + gaps
False triggers / ghost inputs Raw sample delta count; debounce hits; rail ripple; vibration/charging tags Input front-end noise; debounce window too tight; ground return disturbance Increase debounce window temporarily; compare raw-delta and false-trigger rate
Cannot charge / charging stops VBUS presence; chg_state; NTC/OTP flags; temperature; SYS stability under load Entry protection drop; thermal regulation; NTC range mismatch; OVP/limit trips Fixed load + controlled ambient; observe if OTP/NTC triggers precede stop
Random reboot Reset reason (BOR/WDG); SYS dips; peak current timing (haptics/radio bursts) Brownout from load steps; protection thresholds; watchdog from firmware stall Reproduce with scripted haptics + high report; capture SYS and reset flags

Tip: treat “charging” and “vibration” as primary tags in every field report; they are the highest-yield multipliers for both link and power failures.

Evidence Chain SOP Three-column map: symptom clusters feed evidence stack (counters, waveforms, tags), which then maps to cause classes (power transient, RF coexistence, input sampling, IMU drift, charge protection). Includes a minimal viable log box. Field Debug SOP Symptom → Evidence → Cause class → Next test Symptoms Evidence Cause classes Disconnect Latency spike Drift False trigger No charge Random reboot Counters / flags PER, retries, reset reason Waveforms VBUS / VBAT / SYS Raw samples scan, debounce, IMU gaps Tags temp, charge, vibration, grip MVL fields t_ms • soc • retry/per reset • temp • sample gaps Power transient RF coexistence Input sampling IMU drift Charge / protection
Figure H2-11. Treat every report as a chain: symptom → counters/flags → waveforms → tags → cause class. The MVL fields keep the chain intact with minimal firmware overhead.

H2-12|BOM Hotspots: Key IC Positions with One-Page Selection Criteria (with Example MPNs)

Intent

Provide a procurement-and-engineering friendly one-pager: key controller IC positions, 3–5 selection dimensions, typical pitfalls, validation points, and concrete example MPNs. The MPNs below are reference examples that commonly fit controller needs; final selection must be validated against link latency, power stability, EMC/ESD margin, and temperature behavior.

How to use this table
  • Start from the field symptom linkage column to prioritize which hotspot to suspect.
  • When substituting parts, re-run the bound tests in H2-11: retries/PER, reset reasons, and VBUS/VBAT/SYS stability around vibration/charging.
  • For each hotspot, keep the “validation points” as the acceptance gate before mass production changes.
Deliverable: BOM hotspots (positions → example MPNs → dimensions → validation)
Block / position Example MPNs (references) Key selection dimensions (3–5) Validation points Typical pitfall Field symptom linkage
MCU / Radio SoC
BLE / 2.4G
Nordic nRF52840, nRF52832
Silicon Labs EFR32BG22
TI CC2642R
wake latency; peak TX current; RAM retention; timer/ADC/DMA; debug counters (retry/PER) PER/retry at fixed distance; wake-to-report latency; SYS dip during TX burst; reset reason consistency Low sleep current but slow wake causes tail-latency; poor counters block field attribution Disconnect / latency spikes / random reboot
2.4 GHz transceiver
proprietary
Nordic nRF24L01+
TI CC2500
air-data rate vs robustness; retry behavior support; SPI timing tolerance; peak current; coexistence susceptibility Retry distribution vs grip posture; interference A/B; rail ripple impact on PER “Works in lab” but fails under hand-blockage or charging noise due to coexistence margin loss Disconnect / stutter under vibration/charge
IMU (6DoF) Bosch BMI270
TDK InvenSense ICM-42688-P
ST LSM6DS3
noise density; temp drift; FIFO + timestamp; ODR range; package stress sensitivity Bias vs temperature sweep; FIFO overflow/sample gap counters; drift change with vibration on/off Substitution changes bias drift or introduces sample gaps; mounting stress shifts calibration Drift / inconsistent motion / “jerkiness”
Haptics driver
ERM / LRA
TI DRV2605L (ERM/LRA)
TI DRV2625 (LRA)
current limit; back-EMF handling; closed-loop support (LRA); edge control; diagnostics pin/flags Peak current and SYS dip during vibration; waveform acceptance (rise/steady); acoustic anomaly check Driver swap increases peak current edge → SYS droop → link drop; LRA needs proper tracking Random reboot / disconnect when vibration starts
Charger / Power-path
play while charge
TI BQ24074 (power-path, linear)
TI BQ25895 (switching, power-path class)
Microchip MCP73871 (power-path)
SYS priority behavior; thermal regulation; input current limit; load-step stability; fault observability VBUS/VBAT/SYS during plug/unplug; charging+vibration stress; OTP/NTC flag correlation Thermal throttle or input limiting creates SYS dips; poor observability hides root cause Cannot charge / disconnect while charging / warm-only failures
Fuel gauge TI BQ27441
Analog Devices (Maxim) MAX17048, MAX17055
coulomb vs voltage method; low-temp behavior; dynamic load tolerance; reporting cadence; accuracy vs cost SoC jump vs current pulses; cold vs ambient compare; VBAT sag vs SoC behavior Voltage-only estimation jumps under vibration/radio bursts; low-temp amplifies error Battery % jumps / low-battery dropouts
USB ESD protection TI TPD4EUSB30
Nexperia PESD5V0S1UL
ESD robustness; capacitance vs signal; clamping behavior; leakage; layout sensitivity ESD gun test + post-test PER and charging; verify no added VBUS drop under load Wrong capacitance or layout causes signal issues; clamping or leakage impacts VBUS stability No charge / intermittent USB / field-only failures after ESD exposure
OVP / power switch
VBUS
TI TPS25940 (eFuse/OVP class)
onsemi NCP380 (USB power switch class)
OVP threshold behavior; current limit; response time; dropout; fault flag visibility Plug-in transient test; VBUS dip under load; fault flag timing vs disconnects Too aggressive limiting triggers false trips during vibration or high load, causing charge dropouts Charging stops / disconnect on plug-in
LDO / Buck DC-DC TI TPS62740 (ultra-low power buck)
TI TLV700 (LDO)
Diodes Inc. AP2112K (LDO)
quiescent current; transient response; ripple/PSRR; load-step stability; EMI/layout sensitivity Rail ripple during TX/haptics; SYS dip propagation; PER correlation with ripple Substitution worsens ripple/transients → retries rise or IMU noise increases Latency spikes / drift / false triggers

Substitution risk rule: if a replacement changes peak current edge, rail ripple, or temperature behavior, it can surface as retries/PER growth, SYS dips (BOR), IMU drift changes, or input false triggers. Validate with the same MVL + waveform loop from H2-11.

BOM Hotspots Map Central controller outline with eight hotspot blocks: MCU/Radio, 2.4G transceiver, IMU, haptics driver, charger/power-path, fuel gauge, USB ESD, and regulators. Small example MPN tags included. BOM Hotspots positions • selection dimensions • validation points Game Controller Input • IMU • Radio • Haptics Battery • Charging • Protection Rails • EMC • ESD MCU / Radio SoC nRF52840 • EFR32BG22 2.4G Transceiver nRF24L01+ • CC2500 IMU BMI270 • ICM-42688-P Haptics Driver DRV2605L • DRV2625 Charger / Power-path BQ24074 • MCP73871 Fuel Gauge BQ27441 • MAX17048 USB ESD / OVP TPD4EUSB30 • PESD5V0S1UL LDO / Buck Regulators TPS62740 • TLV700 • AP2112K
Figure H2-12. A one-page BOM map: each hotspot is tied to a measurable validation gate (PER/retries, reset reasons, and rail stability) so part substitutions become evidence-driven instead of guesswork.

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H2-13|FAQs (12) — Evidence-First Answers + FAQ Structured Data

How to read these answers

Each answer is intentionally short and controller-side only: a likely two-way split, the highest-yield waveforms or statistics to capture, a minimal A/B test, and a direct pointer back to the most relevant H2 section. This keeps debugging reproducible and avoids host-side speculation.

Evidence kit keywords: PER / retries reconnect count report interval reset reason (BOR/WDG) VBUS/VBAT/SYS motor current temp tag.

Why does packet loss or disconnection get worse the moment vibration turns on? Which two captures matter most?

Most cases are either a power transient (motor current step causes SYS/VBAT dips) or RF/EMI injection (retries rise while rails stay stable). Capture SYS (or 3V3_RF) waveform and PER/retry window aligned to the vibration on-edge. Run a fixed-distance A/B: vibration on/off and compare “SYS dip first” vs “retries first.” See H2-6/H2-8/H2-11.

Mapped to: H2-6 / H2-8 / H2-11

Is joystick drift caused by hardware noise or calibration/temperature drift? How to separate them with one evidence pass?

Separate short-window noise from long-window bias shift. Log raw ADC/Hall readings while the stick is untouched: compute a 10–30 s variance (noise) and a 5–10 min mean shift (drift) with a temperature tag. If the mean shifts monotonically with temperature, suspect sensor/offset drift; if variance dominates without a temperature trend, suspect noise/sampling. See H2-3/H2-7.

Mapped to: H2-3 / H2-7

With the same battery capacity, why can battery life differ by 2×? What are the three most common hidden drains?

The top drains are typically (1) retry bursts or overly high report rate, (2) IMU running at high ODR or never entering a true low-power state, and (3) regulator/peripheral leakage that prevents deep sleep. Build a scenario power profile (idle connected, high report, IMU on, vibration on, charging) and attribute average current by module. A/B by disabling one feature at a time. See H2-10.

Mapped to: H2-10

At low battery, buttons misfire or auto-repeat. Is it scanning/debounce or voltage droop? Which is first to suspect?

Start with a two-signal split: if debounce hits/raw deltas spike while SYS/VBAT stays stable, scanning/debounce is likely; if SYS/VBAT dips align with misfires, power droop is likely. Capture VBAT + SYS waveforms and raw_delta_cnt/debounce_hits at low SoC. A/B: widen debounce window versus powering from a stable source/new battery. See H2-3/H2-9/H2-11.

Mapped to: H2-3 / H2-9 / H2-11

BLE stays connected but latency spikes occasionally. Should report interval or retransmission rate be checked first?

Check both, but in this order: verify report interval jitter (timestamp deltas) and then verify retry/PER bursts. If report intervals slip while retries stay flat, suspect wake/scheduling/power-state issues; if retries burst during spikes, suspect interference/coexistence or noise injection. Keep the report configuration fixed and run charging/vibration A/B to see what correlates. See H2-5/H2-11.

Mapped to: H2-5 / H2-11

In 2.4G dongle mode, stutter happens even at short distance. How to verify antenna blockage versus EMI injection?

Short-distance stutter often points to posture blockage or internal noise, not path loss. Tag grip posture and run a 2×2 A/B: posture A/B × vibration/charging on/off, while keeping distance fixed. If PER/retries swing strongly with posture, antenna blockage dominates; if retries jump mainly with vibration/charging regardless of posture, EMI/power coupling dominates. Capture retries and one rail ripple snapshot per condition. See H2-5/H2-6.

Mapped to: H2-5 / H2-6

IMU drift changes a lot with temperature. Is it supply noise or sensor temperature drift? How to design a comparison test?

Use a two-step comparison: first, run a temperature sweep (cold→ambient→warm) with the controller stationary and log IMU bias plus FIFO/sample-gap counters. Second, hold temperature constant and toggle vibration/charging on/off. If bias follows temperature even when noise state is unchanged, sensor drift/mounting stress dominates; if bias shifts with noise state at constant temperature, supply/EMI coupling dominates. See H2-7/H2-2.

Mapped to: H2-7 / H2-2

ERM vibration strength is inconsistent. How can motor current waveforms distinguish motor variation versus driver current limiting?

Compare motor current rise and steady-state current under identical drive settings. If waveforms show a clipped peak or a slowed rise and this aligns with a SYS droop, driver current limiting or rail sag is likely. If current waveforms are consistent but perceived strength differs, motor mechanical variation is more likely. Record motor current and SYS at the vibration on-edge across multiple units. See H2-8.

Mapped to: H2-8

LRA produces buzzing or “diverging” feel. Should resonance shift or drive strategy be checked first?

Check resonance shift first when symptoms vary with temperature, assembly pressure, or time. Log the commanded drive frequency/amplitude and capture the current waveform stability. A quick discriminator is a small safe-frequency sweep: if the “quiet/clean” point moves with temperature or mounting pressure, resonance shift dominates; if the best point is stable but buzz appears at certain drive patterns, drive strategy dominates. See H2-8.

Mapped to: H2-8

Occasional reboot while playing and charging. Is it insufficient power-path or VBUS droop? Which three points must be captured?

Capture three synchronized points: VBUS (entry droop/current limit), SYS (system rail stability), and reset reason + charge fault flags (BOR/WDG, thermal/limit). If VBUS droops first and SYS follows, suspect input/cable/source limiting; if SYS dips while VBUS is stable, suspect power-path/load-step margin. Reproduce with scripted vibration + high report. See H2-9/H2-11.

Mapped to: H2-9 / H2-11

Wireless performance degrades during charging. Is it switching ripple or ground-return contamination near the antenna? How to validate?

Treat it as ripple-versus-return-path. Capture a rail ripple snapshot (SYS or RF rail) and PER/retries while charging. Then change cable direction, chassis grounding, and grip posture without changing the charging source. If retries track ripple amplitude, switching ripple dominates; if retries swing more with cable/grip orientation than ripple changes, ground-return/antenna contamination dominates. Keep distance fixed for repeatability. See H2-6/H2-9.

Mapped to: H2-6 / H2-9

Performance degrades from factory calibration to end-user. Is it assembly deviation or firmware version differences? How to close the loop with evidence?

Close the loop with traceable identifiers: calibration record ID, firmware version/hash, and a small set of post-cal metrics (IMU bias, stick endpoints, retry baseline). If two firmware versions on the same hardware batch shift distributions, firmware dominates; if the same firmware shows batch-to-batch shifts and temperature/vibration sensitivity differs, assembly/mounting dominates. Correlate any BOM substitutions to drift/retry changes before release. See H2-7/H2-11/H2-12.

Mapped to: H2-7 / H2-11 / H2-12
Illustration

A compact map from FAQ topics to the controller-side evidence kit and the most relevant H2 sections. Minimal text, evidence-first routing.

FAQ → Evidence Kit → H2 Map Left: 12 FAQ nodes. Middle: evidence kit (PER/retry, reset reason, VBUS/VBAT/SYS, motor current, temp tag, raw samples/IMU gaps). Right: H2 sections. Arrows show routing from questions to evidence and then to H2. FAQ Routing Map Questions → evidence kit → relevant H2 FAQs (12) Evidence kit H2 map Vibe drop Stick drift 2× drain Lowbat BLE spike 2.4G lag IMU temp ERM var LRA buzz Reboot+ Charge RF Cal drift PER / retries Reset reason VBUS / VBAT / SYS Motor current Temp tag H2-3 Input sampling H2-5 Radio tradeoffs H2-6 Coexistence/EMC H2-7 IMU integration H2-8 Haptics system H2-9 Battery/charging H2-10 H2-11/12
Figure H2-13. Every FAQ routes to a small evidence kit first (PER/retries, reset reason, VBUS/VBAT/SYS, motor current, temperature tag), then to the most relevant H2 section for actionable fixes.