Smart Curtain / Blind: Motor Drives, Sensing, BLE/Thread & Power
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A smart curtain/blind is a tightly coupled system of motor drive, position/limit sensing, low-power wireless, and power path. Reliable designs come from proving every decision with synchronized evidence—VM/VDD, I(t), position/limit edges, and TX/retry timing—so field failures become measurable and repeatable.
Definition & Scope Boundary
A smart curtain/blind is a mechatronic node where a motor driver, position/limit sensing, low-power wireless control (BLE/Thread), and protected power management share the same rails and ground. Design success depends on controlling current peaks, EMI, and sensing integrity so radio and motion decisions remain stable across load, temperature, and battery state.
This page stays strictly inside the hardware coupling boundary: motor drive ⇄ sensing ⇄ radio ⇄ power. It does not cover cloud backends, app walkthroughs, or protocol-spec deep dives. Every recommendation below is paired with what to measure, where to probe, and what waveform/log pattern confirms the cause.
Scope Guard (mechanically checkable)
Allowed: motor drive Allowed: limit/position Allowed: BLE/Thread power Allowed: UVLO/brownout Allowed: EMC/ESD evidence Banned: cloud/app tutorials Banned: Thread/Matter spec deep-dive Mention-only: Matter/OTA
“Mention-only” items may appear once for context, without step-by-step procedures or spec-level explanations.
Evidence Template (used throughout this page)
| Step | What it means on this page |
|---|---|
| Measure | Probe VM (motor bus), VDD (logic), Iphase/Ibus, limit/position input, and a GPIO timestamp marker. |
| Observe | Look for dip amplitude/time, current ramp/plateau, input glitches/bounce, and RF/command-to-event alignment. |
| Decide | Separate power-path issues (brownout/UVLO) from EMI/IO integrity issues (false limit / mis-position). |
| Fix knobs | Adjust soft-start slope, current limit profile, filtering/Schmitt, power-domain decoupling, and threshold vs temperature/voltage. |
System Architecture: What Actually Couples
Most “random” field failures are not random. They are coupling events: motor current steps and switching noise modulate supply rails and ground reference, which then corrupt limit/position decisions or disrupt RF bursts. The architecture below is organized to make those couplings measurable and fixable.
Three common tiers (electrical view only)
| Tier | Dominant constraint | Most common failure signature | First evidence to capture |
|---|---|---|---|
| Battery ULP roller | Sleep current + rail headroom under bursts | Brownout resets, missed steps near low battery, “works on bench” but fails in-wall | Battery terminal V + VDD + RF TX marker alignment |
| External DC (mid-power) | Inrush, surge/ESD robustness, EMI coexistence | False limit events, intermittent comms during movement, occasional reboots at start/stop | VM ripple + limit input glitches + I(t) ramp profile |
| Heavy load / long travel | Thermal + stall detection accuracy across load | Stall mis-detect vs real jam; pinch false positives; drifted “end positions” over time | I(t) slope/plateau + position increment (or limit events) + VM sag |
“Tier” is not marketing. It is a debugging shortcut: each tier has a different dominant coupling path and a different minimum proof set.
The four coupling sources (Source → Symptom → Evidence → Fix knob)
| Coupling source | Typical symptom | Minimum evidence | Primary fix knob |
|---|---|---|---|
| Current peaks start / stall / reversal |
Reboots, missed steps, inconsistent stop position | VM sag vs VDD sag; I(t) ramp/plateau shape | Soft-start slope + staged torque profile + energy storage near VM |
| Switching noise / EMI | False limit, phantom encoder counts, “stops mid-way” | Limit/position input glitches; ground bounce proxy vs switching edges | Input conditioning (RC + Schmitt) + loop area control + Kelvin sensing |
| Mechanical load variation friction / rebound / temperature |
Pinch false positive or no-trigger; drifted end positions | I(t) slope trend across temperature/voltage; position increment consistency | Threshold vs voltage/temperature table + calibration at representative loads |
| RF wake / TX bursts | Dropouts only during movement; join/commission failures | TX marker aligned with VDD dip; retry counters rising during motor activity | Radio power isolation + domain split + scheduling (avoid TX at worst current step) |
Synchronous capture checklist (the minimum setup)
- VM (motor bus): catches sag, ripple, and back-EMF spikes during start/stop and stall.
- VDD (logic / RF): catches brownout margin and reset proximity (the “is it a power-path issue?” test).
- I(t) (phase or bus current): separates real stall/jam from conservative current limiting.
- Limit/position input: shows bounce or EMI-induced glitches that can masquerade as “end reached”.
- GPIO timestamp marker: aligns command, RF burst, and decision moments to analog waveforms.
Two fast decision rules: (1) If VM dips but VDD stays flat, the issue is usually on the motor path (drive profile, load, VM decoupling). (2) If VDD dips or resets, prioritize power-path integrity (source impedance, domain split, inrush, UVLO thresholds, ground bounce).
Motor Options & Drive Topologies
Motor choice and driver topology determine the dominant failure signature: supply sag vs EMI-driven false limits vs true stall. The goal is not a “best motor,” but a motor+driver pair whose current control, protections, and diagnostics match the load and the power domain margin.
Selection principles (device-level)
Choose by load variability, position certainty, acoustic/EMI constraints, and power source impedance. A stable design must keep VM and VDD predictable during start/stop and during RF bursts.
| Motor type | Most common field “gotcha” | What it looks like in evidence | Primary mitigation knob |
|---|---|---|---|
| DC brushed | Brush EMI + current spikes cause dropouts during motion | VM spike/sag coincident with commutation; limit input glitches; occasional VDD brownout | PWM frequency + di/dt control + input conditioning + VM decoupling |
| Stepper | “Looks normal” while losing steps under low voltage / high friction | Chopper current plateaus while position increment stalls; temperature rises steadily | Two-stage torque profile + speed band selection + stall threshold vs V/T |
| BLDC | Start/jam transitions stress power and sensing; EMI couples into IO | Start retries or oscillation; VM dips at commutation transitions; nFAULT toggles | Start strategy + OCP/UVLO margins + domain split + layout loop control |
Driver topology differences (what matters on this page)
- Current control: PWM peak-limited (H-bridge), constant-current chopper (stepper), phase current regulation (BLDC; FOC is mention-only).
- Protections: short/OCP, OTP, UVLO — interpret as signatures (instant stop vs “runs then stops” vs random resets).
- Diagnostics: nFAULT, ISENSE, FG/STALL — must be time-aligned with VM + I(t) + decision GPIO to avoid mis-attribution.
“Does it look like a real stall?” — minimum proof set
- I(t) waveform: ramp, plateau, and ripple shape separate “true jam” from conservative limiting.
- VM sag: confirms whether the source + power path is collapsing under load (and whether VDD is at risk).
- Thermal slope (dT/dt): rising slope during “no movement” indicates sustained loss rather than transient friction.
Rule of thumb: a stall is proven when position stops changing while I(t) stays elevated and thermal slope increases. If VDD dips simultaneously, the root cause may be power-path collapse rather than mechanical jam.
Torque/Speed Profiles & Soft-Start/Soft-Stop
End-position accuracy and radio stability depend on how the motor is started, ramped, and stopped. Gear lash and rebound can inject extra edges into limit/encoder signals, while hard start/stop creates current steps that deepen VM sag and increase false triggers.
Why profiles matter (measurable mechanisms)
- Gear lash / rebound can create extra edges after a stop, corrupting “end reached” decisions.
- Hard start/stop increases di/dt, worsening VM sag and ground bounce during the most sensitive decision windows.
- Soft profiles reduce impulse energy, lowering bounce/glitch rate and reducing peak current overlap with RF bursts.
| Engineering knob | What it changes | Primary evidence | Failure it prevents |
|---|---|---|---|
| PWM frequency | Switching ripple vs acoustic/EMI trade; affects input glitch susceptibility | Limit input glitch rate vs switching edges; VM ripple spectrum proxy | False limits, RF dropouts |
| Ramp slope (di/dt) | Peak current step size at start/stop | VM dip depth and duration; VDD margin | Brownouts, random resets |
| Current limit threshold | Stall behavior and pinch detect sensitivity | I(t) plateau vs position increment; thermal slope trend | Overheating, missed steps, false pinch |
| Two-stage torque | High torque to break static friction; lower steady torque to reduce noise/power | I(t) step then settle; stable speed/position increments | Start failures, excess EMI, battery drain |
Proof method: event timeline (must be time-aligned)
Validate that the worst VM dip does not overlap with RF TX bursts, and that limit/position decisions occur outside the rebound window. Use a GPIO marker (command/decision) to align analog rails and digital events.
- Overlap test: if TX burst aligns with deepest VM dip, prioritize scheduling or rail isolation before changing RF settings.
- Decision window test: if the limit decision occurs during rebound/glitch bursts, prioritize soft-stop + input conditioning.
Position & Limit Sensing
A reliable end-stop decision requires edge credibility. Each sensing option has a distinct false-trigger mechanism, so selection must be anchored by the first evidence metric to capture (bounce counts, edge intervals, A/B validity, overflow, or stall time).
How to choose (without guesswork)
- Edge credibility first: prefer options that keep end-stop edges stable under EMI/ESD and cable length.
- Decision window discipline: avoid start/commutation/stop rebound windows; confirm with measured edge statistics.
- Evidence-driven tuning: record bounce count, edge interval histogram, A/B illegal rate, overflow events, and stall-time distribution.
| Option | Most common field failure | False-trigger mechanism | First evidence metric | Primary mitigation knob |
|---|---|---|---|---|
| A) Limit switch | Bounce + long cable susceptibility + ESD events | Multiple contact closures; cable picks up motor edges; input threshold disturbed | Bounce count + edge interval clusters | RC + Schmitt input + pull-up sizing; firmware confirm window + bounce logging |
| B) Hall + magnet | Mount tolerance + temperature drift + external field | Margin shrink (amplitude-to-threshold); trigger point shifts with T/V | Margin trend (amplitude vs threshold) + repeatability | Mechanical gap window + placement datum; low-speed approach + 2nd confirm when margin is low |
| C) Encoder | Missed counts + direction inconsistency under noise | Edge corruption by PWM/ground bounce; illegal A/B sequences; counter wrap | A/B illegal rate + overflow events + edge spacing outliers | Input conditioning + routing/return control; firmware A/B state machine + physical max-speed sanity checks |
| D) Sensorless | Consistency breaks under load/T/V variations | Current/back-EMF “fingerprint” shifts; low-V looks like stall/end-stop | Stall time distribution + I(t) fingerprint stability | Segmented thresholds + low-V mode; ensure current sensing quality and noise immunity |
Anti-misjudge rule set (portable across options)
- Edge statistics beat intuition: store bounce count and edge interval histogram per event.
- Time align with motor events: start/commutation/stop windows are the highest-risk periods for false edges.
- Redundancy by consistency: confirm end-stop only when edge behavior is consistent across two checks (time or margin).
Stall Detect & Pinch Protection
Stall detection protects the motor and power path; pinch protection protects people. Both rely on I(t), VM(t), and motion evidence, but the decision speed and acceptable false positive rate are different.
Stall ≠ pinch (boundary and intent)
| Item | Stall detect | Pinch protection |
|---|---|---|
| Primary goal | Prevent overheating and rail collapse | Fast, repeatable, low-harm reaction |
| Decision speed | Robust confirmation (avoid nuisance stops) | Fast trigger (safety-first) |
| Typical action | Stop / cool-down / retry | Immediate release (e.g., reverse) and lockout window |
| Risk of false positives | Nuisance stop is undesirable but acceptable | Too many false trips harms UX; too few harms safety |
Criteria and false-positive sources
- Criteria: current slope (di/dt), speed drop, back-EMF decay, position increment stops.
- False-positive sources: temperature, lubricant aging, fabric weight, rail friction, low VM (battery sag).
- Interpretation rule: if VM collapses first, the “stall” signature may be power-path margin rather than mechanical obstruction.
Minimum evidence set + threshold calibration
- Minimum set: I(t) + VM(t) + position increment (or limit-event interval).
- Calibration buckets: cold, hot, low-V — thresholds must cover worst friction and worst rail margin.
- Pass criterion: pinch triggers within target time and remains stable across all three buckets without excessive nuisance trips.
Power Path & Battery Life Budget
Battery life and stability are dominated by worst-case event windows, not average current. Motor peak current, RF bursts, and regulator headroom can align in time and trigger UVLO/BOR even when the long-term average looks safe.
Why “average current” fails
- Motor peaks (start/commutation/stop) create the highest di/dt and VM sag risk.
- RF bursts (join/wake/retry) add short current spikes that can coincide with motor events.
- Regulator headroom (LDO dropout or DC-DC ripple) consumes VDD margin exactly when spikes happen.
“Random reboot” usually follows a drop chain
- Battery internal resistance + connector + harness create event-dependent voltage drop.
- Ground/return impedance can create local VDD collapse without a large battery-terminal drop.
- Symptom: reset / brownout / link loss correlates with specific event windows (motor start or RF TX).
| Engineering knob | What it fixes (mechanism) | Evidence to verify |
|---|---|---|
| Buck / Boost selection | Maintains VM/VDD during droop; avoids headroom collapse in low-battery windows | VDD minimum during motor+RF overlap; reduced BOR events |
| Storage caps (right node, right loop) | Supplies peak current locally; reduces droop rate (dV/dt) at VM or VDD | Shallower and shorter VDD dips; lower retry rate during TX |
| Domain isolation (Motor / RF / MCU) | Prevents motor return and switching noise from pulling down RF/MCU rails | Battery stable while VDD stays stable; fewer RSSI swings with motor activity |
| Sequencing / event staggering | Avoids motor start and RF burst overlap; reduces worst-case window intensity | TX marker no longer aligns with VM sag; fewer reconnect cycles |
| UVLO threshold + hysteresis | Prevents chatter near the knee; avoids repeated resets during weak battery | BOR counter decreases; reset intervals disappear near low-V region |
| Brownout logging | Turns “random” resets into time-aligned evidence (which rail, when, how often) | Reset reason + timestamp correlates with VM/VDD dips and markers |
Evidence demo: battery-terminal vs VDD probing
- Measure simultaneously: Vbatt (battery terminals) and VDD (MCU/RF rail), plus a GPIO marker.
- Interpretation: Vbatt↓ and VDD↓ together → likely path drop (internal resistance / connector / harness). Vbatt≈ stable but VDD↓ → likely local ground bounce / rail impedance.
- Minimum channels: Vbatt, VM, VDD, GPIO marker (motor start / TX start).
BLE / Thread Hardware Integration
Wireless reliability in a motorized curtain is primarily a hardware coexistence problem: RF burst current, supply impedance, antenna proximity to motor loops, and a low-power measurement method that captures both peaks and sleep floors.
Strict boundary (hardware-only)
- Included: join/wake burst current, RF supply decoupling, DC-DC ripple impact, antenna coexistence with motor noise, sleep-current prerequisites.
- Excluded: protocol specifications, commissioning流程, stack tuning, cloud workflows.
Three coupling paths that create “drops” and “retries”
| Coupling path | What happens | Measurable evidence |
|---|---|---|
| Conducted | Motor switching/return noise modulates RF supply and reference; ripple grows during peaks | VDD/RF-rail ripple ↑; retry rate ↑ during motor activity |
| Radiated | Harness and motor loop act as an antenna; near-field coupling detunes or injects noise | RSSI swing ↑ with motor PWM; packet loss bursts align with motor events |
| IO / control | PWM edges corrupt wake/reset/control pins or clocks; intermittent disconnect looks random | Disconnect timestamps align with GPIO events; brownout logs increase |
Engineering knobs (minimal, high leverage)
- RF decoupling: close placement, short return, staged caps for burst current.
- PA supply isolation: reduce shared impedance between motor domain and RF domain.
- DC-DC ripple control: ripple peaks often translate into retries and “join stalls.”
- Wake GPIO discipline: avoid floating inputs; confirm sleep entry and wake source.
- Sleep-current measurement: capture both peaks (bursts) and floor (sleep), not a single averaged number.
Bring “drops” back to evidence
- RSSI trend: quantify swing (min/max) across motor run windows.
- Retry counter: track retry bursts; compare with and without motor activity.
- Correlation check: align TX marker with VM/VDD sag to prove a supply-impedance root cause.
Protection, EMC/ESD & Layout
In a motorized curtain system, the motor is a noise source, the wireless rail is the sensitive victim, and limit/encoder inputs are the easiest entry points for false triggers. The goal is to control noise paths (conducted, radiated, IO-coupled) with partitioning and a measurable evidence loop.
Three roles (use this model to avoid random fixes)
- Noise source: motor power loop (H-bridge/driver + harness loop + return current).
- Victim: RF/MCU rails (VDD, reference clock, reset/wake pins).
- Entry points: limit/encoder inputs (long wires, thresholds, edge sensitivity).
Partitioning & return-current rules (principle-level, but checkable)
- Power loop zone: keep the high di/dt switching loop small; do not let motor return flow through sensitive references.
- Sense zone: keep current-sense and ADC loops away from switching nodes; use Kelvin connections for shunt sensing.
- RF zone: keep antenna + matching + RF decoupling clean; avoid parallel routing with the motor harness.
- Sensitive IO zone: treat limit/encoder pins as “front-ends” (filter + threshold shaping + controlled clamp path).
| Knob | Mechanism (what it controls) | Evidence to validate |
|---|---|---|
| TVS (at harness / external entry) | Clamps ESD/EFT energy before it reaches MCU/RF; directs current to a controlled return path | Lower reset rate after ESD; fewer “soft faults” (false limit / drift) post-stress |
| RC (snubber / input filter) | Reduces ringing and edge energy; converts narrow spikes into non-triggering pulses | Ghost-edge count drops; limit input edge width/spacing becomes consistent |
| Common-mode choke (context-limited) | Reduces common-mode noise on cable paths; limits radiated + conducted coupling via harness | RSSI swing reduces during motor PWM; retry bursts shrink |
| Shunt Kelvin (sense routing) | Prevents motor return current from injecting “fake sense” into the measurement loop | Sense waveform matches physics; pinch/stall thresholds become repeatable |
| Ground return discipline (principle) | Keeps high-current return away from RF/IO reference; avoids local ground bounce | VDD remains stable while motor runs; limit/encoder edges stop clustering |
EFT/ESD “still moves but mis-positions” — capture ghost edges
- Record: Limit/Encoder inputs + a GPIO marker (motor start / direction / stop) on the same timebase.
- Trigger: on limit/encoder transitions, or within a window around direction change / braking.
- Ghost edge rule: an edge appears in a motion phase where a real limit event is impossible, often with an abnormally narrow pulse or clustered edges.
- Fix loop: add/adjust input RC + Schmitt, improve clamp return path; verify ghost-edge count drops by a clear margin and false-limit events disappear.
IC Selection Blocks
This selection block lists functional categories and parameter anchors that allow engineering and sourcing to compare options without locking into specific part numbers. Each row binds parameters to failure modes and validation evidence.
How to use the parameter anchors
- Anchor = a parameter that must be matched to the real coupling risks (peak current, noise, UVLO, false triggers).
- Failure mode = the most common field “pitfall” if the anchor is missed.
- Evidence = what to probe or log to confirm the anchor is met.
| Block | Category | Key parameters (anchors) | Evidence to validate |
|---|---|---|---|
| Motor driver | H-bridge / Stepper / BLDC | Ipeak/IRMS · VM range · OCP/OTP/UVLO · Rds(on) · slew control (basic) · diagnostics (nFAULT/ISENSE/FG/STALL) | Phase current + VM sag during start/stall · temperature rise slope · fault pin events aligned to motion timeline |
| Current sense | Shunt + amplifier / comparator | Common-mode range · bandwidth · input offset/drift · filtering strategy · output type (analog/comp) · Kelvin requirement | I(t) waveform fidelity vs expected physics · stall/pinch repeatability across temperature/voltage · noise immunity during PWM edges |
| Power | Buck / Boost / LDO | IQ · transient response · peak capability · ripple · UVLO threshold/hysteresis · soft-start/sequence support | VDD minimum during motor + RF overlap · BOR counter trend · retry rate vs ripple and load steps |
| Battery management | Fuel gauge / charger (if present) | internal resistance estimation (if available) · low-battery behavior · sleep consumption impact · brownout visibility (logs/flags) | V_batt droop vs load pulses · predicted vs measured runtime under event-heavy profiles · reset reason/time correlation |
| Sensors & inputs | Hall / encoder / limit interface | Schmitt thresholds · debounce/filter hooks · ESD level · leakage + pull strategy · illegal-state detection (encoder-capable devices) | ghost-edge count (logic analyzer) · edge width/spacing stability · missed-count rate under motor PWM noise |
| Radio module / SoC | BLE / Thread (power-focused) | TX burst current · sleep floor current · supply ripple sensitivity (practical) · wake sources (GPIO/RTC) · decoupling guidance | TX marker aligned with VDD sag or not · RSSI swings vs motor events · retry counter bursts vs ripple/decoupling |
Selection pitfalls that commonly create field failures
- Only average current considered → low-battery reboots and join/retry storms under peak windows.
- Driver sized to rated current only → startup/stall peaks trigger OCP or thermal runaway.
- ESD part “present” but return path unmanaged → device survives but false limits/offset drift appears post-stress.
- Encoder resolution prioritized over input shaping → missed counts and ghost edges dominate accuracy.
Validation & Field Debug Playbook
This SOP turns “random field failures” into a repeatable evidence chain. Every test item is defined by: what to measure, what to look for, and how to decide pass/fail—without relying on guesswork.
Bench validation matrix (load × voltage × temperature)
Use this matrix to force corner cases: motor peak windows, RF burst overlap, threshold drift, and post-stress soft faults.
| Axis | Levels | Minimal coverage (recommended) |
|---|---|---|
| Load | No-load · Half-load · Full-load | Full-load is mandatory for peak current and stall/pinch stress |
| Voltage | Low battery / low input · Nominal | Low voltage is mandatory for UVLO/BOR and “random reboot” reproduction |
| Temperature | Cold · Room · Hot | Hot is mandatory for Rds(on) loss, lubrication drag, Hall drift, and threshold drift |
Bench test items (each has a minimum evidence set)
| Test item | Minimum evidence (sync capture) | Pass/Fail outputs (log + statistics) |
|---|---|---|
| Start/Stop shock VM dip window |
VM + VDD (synchronous) + motor marker (start/dir/stop) + optional TX marker | VM_min, VDD_min, dip duration, BOR/reset counter; worst-window reporting (not average) |
| Stall & pinch response speed/position + I(t) |
I(t) (ISENSE or shunt amp) + VM + position increment + event marker | Detect latency, action latency (stop/reverse), repeatability across cold/hot/low-V; false positive rate |
| Limit false-trigger rate edge statistics |
Limit input edges (logic analyzer) + position increment + motion-stage marker | Ghost-edge count per run, clustered-edge rate, false limit events per 100 cycles |
| Join/Wake robustness reset probability |
VDD + VM + TX marker or burst current surrogate + reset reason counter | Resets per N join/wake events; correlation to VM/VDD dips; retry spikes vs ripple windows |
| Post-EMC/ESD consistency soft faults |
Limit/encoder edges + position increment + reset reason + outcome (stop point) | Pre/post comparison: false-limit rate, position error drift, ghost-edge count change |
Unified capture checklist (one wiring plan covers most tests)
- Power rails: VM and VDD captured on the same timebase (dip magnitude + duration matter).
- Motion markers: GPIO markers for start/dir/stop (a “timeline spine” for correlation).
- Sensing: position increment (encoder A/B or Hall ticks) and limit input edges.
- Wireless: TX marker if available; otherwise collect retry counter or a join/wake event timestamp.
- System: BOR/reset reason, brownout counter, fault-pin timestamps (driver nFAULT).
Field debug SOP (symptom → capture the first two evidences)
Symptom: Intermittent reboot
Start with synchronous rails to decide whether the root is input droop or local rail integrity.
- Capture first: VM + VDD (sync).
- Branch A: VM dips first then VDD follows → battery/internal resistance/connector drop or power-path margin.
- Branch B: VM stable but VDD dips hard → local return bounce, decoupling placement, converter transient response.
- Next evidence: reset reason (BOR/WDT) + motor marker alignment.
Symptom: Mis-position / drift
Prove whether the system is losing increments or accepting false limit edges.
- Capture first: position increment + limit input edges.
- Branch A: illegal A/B patterns or missing ticks → input shaping/noise/ground reference problems.
- Branch B: limit edges appear in impossible motion phases → ghost edges / threshold entry-point issue.
- Next evidence: correlate with VM switching events and post-ESD comparisons.
Symptom: Wireless unstable (good/bad)
Bring the problem back to measurable power windows and event correlation.
- Capture first: TX marker (or join/wake timestamp) + VM dips + retry counter.
- Branch A: retries spike exactly at VM/VDD dips → supply margin or rail isolation problem.
- Branch B: RSSI swing tracks motor PWM phases → harness coupling / RF keep-out / return path issues.
- Next evidence: compare “motor off vs motor on” retry distributions.
Symptom: Pinch false report / missed report
Separate “current slope signature” from actual motion change to calibrate thresholds safely.
- Capture first: dI/dt (or I(t)) + position/velocity proxy.
- Branch A: I slope changes but position still advances → threshold/filter too sensitive (false positives).
- Branch B: position stops but I signature is weak → bandwidth/filter too aggressive or sensing point wrong (missed events).
- Next evidence: verify under cold/hot/low-V corners (threshold drift must be bounded).
Concrete MPN examples (for replicable bring-up & validation fixtures)
The following part numbers are common, broadly available references for building blocks used in a smart curtain/blind design. These are examples for comparison and lab replication; final selection must match voltage, current, and certification constraints.
| Block | MPN examples | Why used in this SOP | Evidence focus |
|---|---|---|---|
| H-bridge driver | TI DRV8876 · TI DRV8833 | Peak window, fault visibility (nFAULT), realistic VM dips and thermal slopes | VM sag + I(t) + fault timing |
| Stepper driver | TI DRV8825 · Trinamic TMC2209 | Chopper current behavior, ripple-induced false edges, repeatable motion increments | I ripple vs position ticks |
| Sensorless BLDC | TI DRV10983 · TI DRV8313 | Back-EMF/stall sensitivity and supply-noise coupling in compact systems | stall signature vs VM noise |
| Current-sense amplifier | TI INA240A1 · ADI AD8418 | PWM-edge tolerant sensing for stall/pinch thresholds | I(t) fidelity under switching |
| Fuel gauge | TI BQ27441-G1 · Maxim MAX17048 | Battery droop context, runtime prediction under event-heavy profiles | Vbat droop + reset probability |
| Charger / power-path | TI BQ25895 · TI BQ24074 | Brownout behavior under motor peaks and RF bursts | VDD dip duration vs events |
| Low-IQ buck | TI TPS62840 · TI TPS62130 | Sleep floor + transient behavior during wake/join bursts | ripple vs retries/resets |
| Boost | TI TPS61236P · TI TPS61023 | Maintaining rails near low battery; testing UVLO margin | VDD stability at low V |
| Schmitt input buffer | TI SN74LVC1G17 | Hardening limit/encoder entry points against ghost edges | edge statistics (LA) |
| Magnetic position sensor | ams OSRAM AS5600 · ams OSRAM AS5048A | Repeatable position increment capture for drift vs ghost-edge separation | increment loss vs noise |
| Hall switch | Allegro A1104 · Melexis US5881 | Limit/position sensing with clear edge capture and temp drift checks | edge timing vs temperature |
| ESD TVS (IO) | Nexperia PESD5V0S1UL · Littelfuse SP0502BAHT | Post-ESD soft-fault reproduction and ghost-edge reduction loop | pre/post ESD edge count |
| Shunt resistor | Vishay WSLP2512 (mΩ class) | Stable current sensing for pinch/stall thresholds and thermal slope | I(t) + temp slope |
| BLE/Thread module | u-blox NINA-B306 (nRF52840) · Silicon Labs MGM240S | Realistic TX burst windows and sleep current floors for robustness tests | TX marker + VDD/VM |
Reporting template (copy/paste for every failure)
- Conditions: load (no/half/full), input voltage (low/nom), temperature (cold/room/hot), firmware build ID.
- Timeline: motion markers (start/dir/stop), join/wake timestamps, fault pin events.
- Rails: VM_min/VDD_min + dip durations + ripple snapshot during the event window.
- Sensing: position increments and limit edges (ghost-edge statistics if present).
- Outcome: position error at stop, pinch action time, reset reason counters, retries distribution.
- Conclusion: root cause category (supply window / entry-point ghost / coupling) + next fix + re-test plan.
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FAQs (Evidence-first, stays within this page)
These FAQs diagnose smart curtain/blind failures using measurable evidence across drive, sensing, wireless, and power. Each answer starts with the first two signals to capture and the decision rule to separate the top root causes.
1) Motor turns, but it jams more on certain rails: how to separate mechanical drag vs current-limit set too low?
Capture phase current I(t) and VM on the same timebase, aligned to the same start/stop marker. If current hits a flat “clipped” ceiling early while speed/position barely increases, the limiter is likely too low (or the driver is entering regulation). If current ramps higher with longer acceleration (not clipped) and VM droops proportionally, the load/rail friction is the dominant change.
2) Same hardware, but low battery causes frequent resets: which two power nodes prove internal-resistance droop?
Capture battery/input node (VBAT or VIN) and board VDD (post-regulator rail) synchronously. Internal-resistance droop shows VBAT dipping first, with VDD following after the power-path/regulator headroom collapses; the dip magnitude scales with motor/RF peak current and recovers with a battery-like time constant. Ground-bounce/layout issues often show VDD dipping without a matching VBAT dip.
3) Limit switch exists, yet end-stop still overshoots/bounces and misaligns: tune soft-stop first or sensing filter first?
Capture position increment (encoder/Hall ticks) and limit input edges around the stop event. If position keeps advancing after the first limit edge and then shows rebound/backlash signatures (ticks reverse or re-trigger), the priority is soft-stop / S-curve decel and braking strategy. If limit edges appear as clustered bounce/noise without consistent position change, prioritize input debouncing / Schmitt shaping / filtering.
4) Pinch protection false-triggers: how do dI/dt + position increments prove the threshold should not be fixed?
Capture dI/dt (or I(t) slope) and a motion proxy (position increments or speed estimate) in the same window. If current slope spikes yet the curtain continues moving normally, the threshold is too sensitive under certain voltage/temperature/load conditions. A robust rule requires two conditions (e.g., current-slope event + motion reduction/stop) and must be calibrated across cold/hot/low-V to bound false positives.
5) Any wireless packet (BLE/Thread) causes random lost steps/misalignment: how to prove RF burst triggers a power dip?
Capture TX marker (or join/wake timestamp) and VDD/VM synchronously; add retry counter if available. Proof is a repeatable alignment: TX event → VDD/VM dip → retries spike or control timing slips (missed steps). Confirm by running TX bursts with motor disabled; if dips still occur, the coupling is supply-path/decoupling/isolation—not “protocol instability”.
6) After ESD, control still works but it sometimes “stops by itself / false end-stop”: which IO most often shows ghost edges first?
The most common “ghost-edge entry points” are limit inputs and encoder/Hall lines (often high-impedance, long wires, or shared return paths). Use a logic analyzer to capture limit edges (and A/B edges if present) while motor PWM runs. If short pulses appear during noisy phases (motor commutation, RF events), harden the entry with Schmitt buffering, RC shaping, correct pull-ups, and close TVS return.
7) Driver temperature rises high but never trips OTP: how to tell Rds(on) loss vs frequent stall events?
Capture I(t) and log a stall/pinch event marker (or nFAULT timestamps) while monitoring the thermal slope. Conduction loss typically shows moderate but sustained current and a smooth temperature rise; verify by measuring bridge drop at known current to estimate effective Rds(on). Frequent stalls show repeated high-current bursts with step-like heating and strong correlation to mechanical events; fixing stall frequency often reduces heat more than tuning Rds(on).
8) Hall + magnet position works, but changing installation increases end error: how to separate magnet gap/bias vs lost counts?
Capture position increments and also observe the Hall signal margin (sensor output stability, threshold crossings, or angle stability if using a magnetic encoder). Magnet gap/bias issues show systematic position shift tied to mechanical placement and weaker/offset magnetic signatures. Lost counts show missing ticks or illegal A/B sequences that cluster with motor PWM noise; a logic analyzer will reveal discontinuities even when the magnet is mechanically stable.
9) Motor start instantly drops the network: bulk capacitor too small or DC-DC peak capability too weak—how to measure in one shot?
Capture VDD (high bandwidth) and a start marker; optionally capture the converter PG or a fault pin. A very sharp, short dip that recovers quickly often indicates insufficient local energy storage (bulk/ceramic placement). A wider sag with slow recovery and PG toggling suggests the converter is hitting current limit or loop saturation—peak capability or headroom is insufficient.
10) Soft-start/stop exists but impact is still high: PWM frequency/slew problem or mechanical rebound problem?
Capture I(t) and position increments through the decel-to-stop window. If impact correlates with electrical jerk (current steps synchronous with PWM ramp) while motion is smooth, tune PWM frequency, ramp slope, and current-loop behavior. If position shows overshoot then a rebound/backlash signature (tick reversal or re-trigger), the dominant issue is mechanical energy; improve S-curve decel, braking profile, and stop detection timing.
11) Sensorless stall detection is less stable in winter: how to re-calibrate thresholds using a temperature/voltage matrix?
Build a matrix over cold/room/hot and low/nominal voltage, then record the stall signature features used (e.g., I(t) slope, back-EMF proxy availability, time-to-stop) plus false-trigger counts. Winter instability typically comes from higher drag and lower battery performance shifting the “normal” signature closer to the stall boundary. Set thresholds as conditioned limits (temp/voltage bands) and validate with false events per 100 cycles under the worst corner.
12) Position/limit look normal, but users report “sometimes it stops mid-way”: which three diagnostics/fault pins are most effective first?
Start with (1) the driver nFAULT/DIAG pin (timestamp it), (2) the driver’s UVLO/OCP/OTW/OTS status bits (or latched fault cause), and (3) the system’s reset reason / brownout counter. Then correlate those with VM/VDD in the event window. UVLO points to supply margin; OCP points to overload/jam; thermal warnings point to sustained loss or repeated stall cycles—even when limit/position signals look “normal”.
