H2-1 — Page Intent, Reader Promise, and System Boundary

A scanner is a mixed-signal imaging system that turns reflected light into stable digital lines and then transfers them to a host. This page focuses on the hardware chain—illumination, CIS/CCD sensing, AFE/ADC conversion, image SoC pipeline, motion control, and USB/Ethernet I/O—using measurable evidence points to support selection, validation, and field isolation.

• Choose CIS vs CCD using dynamic-range needs, timing complexity, uniformity risk, and failure signatures (banding vs smear vs edge falloff).
• Set AFE/ADC margin by balancing saturation headroom and dark-noise floor, then verifying with reference and code evidence (not assumptions).
• Separate banding causes by correlating artifact periodicity with line-rate, LED ripple, or CDS window.
• Attribute geometry wobble by mapping spatial periodicity to step frequency / microstep nonlinearity / vibration coupling.
• Confirm I/O robustness via retry/CRC counters + rail dip/ESD evidence, avoiding protocol-stack deep dives.

Not in scope: printer/MFP paper path and consumables, cloud OCR or app workflow architecture, Wi-Fi stack deep dives, and network security deep dives.

H2-2 — Scanner System Block Map (Optics → AFE → Digital → I/O)

The scanner can be decomposed into domains that each produce distinct artifact fingerprints. A stable workflow starts by mapping a symptom to a domain, then confirming with a small set of evidence points (test nodes, counters, rails). The block map below anchors every later chapter to a measurable node in the signal or motion chain.

Evidence points in Figure F2 (TP1–TP8) are selected to separate illumination ripple, AFE timing/reference faults, motion-induced jitter, I/O retries, and rail/ground injection with minimal tools.

H2-3 — CIS vs CCD: When Each Wins (Engineering Decision Matrix)

CIS and CCD differ in how the signal is formed and sampled. That difference cascades into AFE timing, reference strategy, noise fingerprints, calibration burden, and even which mechanical/illumination imperfections become visible as artifacts. The matrix below is written for scanners only: each row links an engineering constraint to a measurable artifact signature.

Practical rule: when artifact spacing is phase-locked to line-rate or LED ripple, prioritize illumination/sampling evidence. When dark-field striping persists across illumination changes, prioritize clamp/black-level window discipline and reference integrity.

H2-4 — AFE Deep Dive: CDS, PGA, ADC, and Noise Budget

The AFE determines whether the scanner produces stable codes under real constraints: line-rate, illumination ripple, ground return energy, and mixed-signal coexistence with motors and high-speed I/O. This section is written as an executable checklist: each block includes what can go wrong, the first evidence to collect, and the first corrective lever.

• Purpose: subtract reset/offset components and stabilize black level so the ADC sees a repeatable baseline.
• Typical failure: sampling window misplacement captures a changing baseline → periodic error appears as stable striping or slow drift.
• First evidence: compare AFE output around reset/signal intervals and confirm the clamp window sits on a flat region (use timing + TP2 waveform).
• Discriminator: small phase shifts of the sampling window change stripe amplitude/phase without changing illumination.
• First fix: move clamp/sample windows, reduce clock injection, and clean reference return paths before increasing “calibration complexity”.

• Purpose: allocate dynamic range between highlights and the dark-noise floor at the chosen illumination level.
• Typical failure: too much gain → highlight clipping; too little gain → dark detail buried by quantization and reference noise.
• First evidence: check for flat-top saturation in codes and confirm AFE headroom to reference at the brightest region.
• Discriminator: artifact changes with gain step in a way that matches clipping/noise expectations (not random).
• First fix: tune gain and illumination together; keep ADC reference and AFE ground return stable before chasing “more bits”.

• Purpose: convert each line within the time budget; stability depends on settling and reference cleanliness inside the sampling window.
• Typical failure: high-resolution or faster modes exceed settling/time margin → increased noise, missing-line events, or periodic errors.
• First evidence: compare error rate across modes; look for sudden artifact onset when line-rate increases or when throughput increases.
• Discriminator: slowing line-rate or widening the effective sample window reduces the error immediately.
• First fix: increase analog bandwidth/settling margin, reduce mux transient, or adjust sampling strategy before changing sensors.

The fastest path to “deep” AFE debugging is to treat artifacts as fingerprints of coupling paths: line-locked banding typically points to illumination ripple or sampling/settling, while dark-field striping that survives illumination changes points to clamp/reference timing discipline.

H2-5 — Illumination & LED Driver: Flicker, Ripple Coupling, Uniformity

In scanners, banding often originates from illumination modulation rather than the AFE itself. The fastest isolation method is to treat illumination as a measurable stimulus: relate LED current ripple and control mode (constant-current vs PWM dimming) to the line-rate and to whether artifacts move with brightness, speed, or temperature.

• Constant-current dimming: expected low flicker, but loop ripple and rail coupling can still modulate light. Artifact tends to be line-locked when ripple is coherent to line-rate.
• PWM dimming: high modulation depth by design; if PWM frequency produces coherent sampling against line windows, banding becomes repeatable. Adjusting PWM frequency often shifts stripe phase/spacing immediately.
• Strong discriminator: if artifact spacing scales with line-rate, treat it as a coherence/mapping problem before blaming AFE gain/ADC bits.

Quick discriminator: if banding shifts immediately when PWM frequency or scan speed changes, treat the problem as coherence/beat first. If dark-field striping persists with illumination disabled, prioritize rail/ground coupling into the AFE reference path.

H2-6 — Motion Subsystem: Stepper Driver, Microstepping, and Carriage Stability

Many “texture” and geometric defects are motion fingerprints: microstepping nonlinearity, current regulation ripple, resonance bands, missed steps, and unstable home/encoder references can translate into repeatable patterns, wobble, or stitch misalignment. The goal is to bind image symptoms to motion evidence that can be probed quickly.

• Expected: two phase currents that transition smoothly (microstep) with minimal ripple and stable regulation across load.
• When wrong: decay-mode artifacts or insufficient current loop bandwidth create ripple/flattening → position non-uniformity → repeatable textures.
• First evidence: measure phase current waveform at TP7 (Phase I) and correlate anomalies to the same speed range where artifacts appear.

• Resonance band: artifact peaks in a narrow speed range; changing speed shifts period/amplitude immediately.
• Missed steps: sudden geometry discontinuity or stitch offset; often correlated with high acceleration or increased friction.
• First evidence: compare acceleration profiles; check whether phase current saturates or becomes unstable at the failure point.

• Home sensor bounce: unstable edge timing shifts the scan origin → stitch misalignment and run-to-run drift.
• Encoder slip/quantization: incorrect position feedback accumulates small errors into visible geometry defects.
• First evidence: log home edge timing jitter; compare multiple homing cycles and compute max-min offset.

Fast isolation rule: if artifact period changes with speed/acceleration, prioritize motion (microstepping + resonance) over illumination/AFE. If the defect appears as a sudden discontinuity or stitch offset, prioritize missed steps and home/encoder stability checks.

H2-7 — Image Processing SoC Path: Line Buffer, Shading, Black-Level, Defect Pixel

This chapter stays hardware-evidence driven: how calibration frames (dark/white/temperature re-check) feed the scanner SoC pipeline, where line buffering, black-level references, shading correction, and defect-pixel maps apply, and what fingerprints appear when any node is mis-tuned or unstable.

• Step 1 — Dark frame: capture with LED off (or lid closed). Record mean and stripe residual to validate black-level reference stability.
• Step 2 — White frame: capture a uniform target. Compute center/edge residuals to validate shading LUT quality.
• Step 3 — Mode sweep: change DPI/speed. If artifacts appear only at the boundary, prioritize line buffer and throughput counters.
• Step 4 — Temperature re-check: cold vs warm repeat. If residual maps drift with temperature, define a re-calibration trigger policy.
• Step 5 — Defect map update: generate DPM from dark + white evidence; store version and allow rollback to prevent “over-repair”.
• Step 6 — Evidence summary: output a one-page decision record: buffer-limited vs black-level vs shading vs defect-map dominated.

If a defect disappears immediately when DPI/speed drops, treat it as a buffer/throughput boundary first. If a defect survives dark-field capture, prioritize black-level reference stability and rail/ground coupling before “more aggressive correction”.

H2-8 — USB/Ethernet I/O: Throughput, CRC Errors, Dropouts, and ESD

This chapter stays on interface robustness: dropouts, stalls, and “random” failures typically track power integrity, ESD return paths, and signal margin. Each scenario below lists the first two measurements and a discriminator to avoid protocol-stack rabbit holes.

If errors cluster around plug/ESD events, prioritize TVS placement and return-path control before changing firmware parameters. If failures coincide with motor or dimming transitions, prioritize rail transients and reset threshold margins.

H2-9 — Power Tree & Mixed-Signal Layout: Rails, Grounding, EMI, and Crosstalk

Scanner failures are often “cross-domain” problems: LED ripple and stepper di/dt can inject into AFE references, SoC/DDR transients can collapse rails, and ESD return paths can traverse sensitive ground. This chapter groups rules by domain and ties each rule to a minimal, measurable evidence set (probe points and screenshots).

A “single ground” is not a license for uncontrolled return. Use domain placement and routing to guide where high-current and ESD returns flow, while keeping analog references and sensor returns locally closed and quiet.

H2-10 — Validation Plan: What to Measure First (Bench) + Acceptance Metrics

This section turns scanner evaluation into a repeatable bench checklist: each test defines setup, pass criteria, and an evidence artifact (frame, waveform screenshot, counter readout, or log). The intent is a minimal tool kit that still separates optics/AFE, motion, I/O, and power/robustness issues.

• Oscilloscope + probes: rail dips, AREF noise, reset pins, LED/motor current sense points.
• DMM: steady-state rail checks, drop across protection elements, continuity and ground reference checks.
• Simple targets: uniform white target, dark cover/lid, line/edge target for geometry repeatability.
• Host capture + counters: exported frames (dark/white), error counters (USB retries / PHY CRC), basic throughput logs.

Keep pass criteria evidence-based. If a failure cannot be attached to a stored artifact (frame/waveform/counter/log), it is not yet a controllable acceptance metric.

H2-11 — Field Debug Playbook: Symptom → Evidence → Isolate → Fix

This playbook turns common scanner field failures into a repeatable decision path. Each symptom uses the same four blocks: First 2 measurements → Discriminator → First fix → Stop doing. Example MPNs are provided as proven part choices in similar mixed-signal scanner designs (final selection depends on rail, speed, and compliance targets).