Washer (DD/Inverter) Main Control: Motor, Valves, Safety
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This page helps isolate DD/inverter washer main-control faults using four evidence chains: DC-bus & motor current, valve/pump outputs, water-level AFE integrity, and heating/leak safety interlocks—starting from the first two measurements.
Follow the symptom-to-evidence playbook to prove whether the failure is power/drive, water handling, sensing, or safety logic before replacing parts.
Core Takeaway: isolate faults with 4 evidence chains
This page isolates washer DD/inverter control-board faults using four evidence chains: DC bus + motor current, valve/pump outputs, water-level AFE, and heating + leak safety interlocks. Two measurements first will split “power/inverter trip” from “water-path/safety inhibit” with minimal guessing.
First 2 measurements (do these before reading deeper sections)
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Measure DC bus level + ripple during a spin attempt Purpose: separate inverter/protection events (UVLO/OCP/OTP) from “no-drive” conditions where PWM never really starts.
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Observe water-level sensor signal stability during fill Purpose: separate true water-path issues (blocked tube/sensor drift) from EMI-coupled jitter that can trigger safety inhibits (no heat / endless fill).
Prioritize the inverter evidence chain: bus capacitance/inrush, gate drive enable, current-sense validity, and protection thresholds.
Prioritize water-level AFE coexistence: ADC reference/RC filtering, grounding return paths, and coupling from switching nodes.
Prioritize outputs and interlocks: inlet valve/pump drive waveforms, heater current path, leak sensor state, and door-lock feedback.
System overview: what this page covers (and what it excludes)
This page is strictly scoped to the washer main control + inverter board evidence chain: power/inverter behavior, water-path actuators, water-level sensing, and heat/leak safety gating. The goal is fast isolation with measurable signals, not broad platform or ecosystem coverage.
Included (board-level scope for this washer page)
- DD/Inverter motor drive: DC bus, precharge/inrush symptoms, inverter bridge/IPM, gate drive enable, phase/DC current sense, protection events (UVLO/OCP/OTP).
- Actuator outputs: inlet valve drive (relay/triac/SSR where used), drain pump drive and load evidence, door-lock interlock feedback as it affects actions.
- Water-level AFE: pressure sensor/switch signal path, ADC front-end filtering, stability during fill/drain, plausibility checks (slope/latency).
- Heating + leak safety: heater switching evidence (command vs current), NTC/thermal cutoff chain, dry-heat inhibit logic, leak sensor state and inhibit actions.
- Rugged power coexistence (washer-specific): how inverter switching couples into sensing/logic rails (reset/jitter), and how to prove correlation with measurements.
Excluded (to prevent cross-topic drift)
- No mobile app / cloud dashboard instructions.
- No protocol-stack deep dives (Thread/Zigbee/Matter) — only board evidence where relevant.
- No other appliances (dryer/dishwasher/refrigerator) comparisons or architecture.
- No generic EMC standards procedure walkthrough — deeper compliance content belongs to the dedicated EMC/Safety subsystem page.
DD/Inverter motor drive architecture: start physics without heavy theory
Direct-drive washer motors (typically BLDC/PMSM) demand high torque at low RPM. That requirement concentrates stress into a short window: spin-start. Most “won’t spin” or “starts then stops” cases can be routed by verifying three links: DC bus delivery, bridge switching + phase current formation, and position/rotation evidence (Hall/tach/back-EMF).
A Why DD is electrically tougher than belt drive
- Low-RPM torque → peak phase current: a DD start often needs a longer high-current burst than a belt system, especially with wet-load inertia.
- Load swings map directly to current: “empty OK, loaded fails” usually means the current demand crosses protection thresholds or bus droop margins.
- Fast diagnosis focus: prioritize DC bus dip/ripple and phase current ramp before chasing sensor or UI symptoms.
B Bridge choices: discrete MOSFETs vs IPM module
- Discrete MOSFET bridge: more sensitive to layout and gate-loop ringing; mis-switching can look like “random OCP” during start.
- IPM module: protection is often internal (UVLO/OCP/OTP). External evidence (bus, current, fault pin/state) becomes the key to understanding trips.
- Gate drive requirements: bootstrap supply stability and UVLO behavior decide whether the bridge can sustain start torque.
C Start sequence: open-loop → closed-loop commutation
- Open-loop start window: if phase current never forms, suspect enable/UVLO/latched protection or missing gate drive, not “control tuning.”
- Closed-loop transition window: if current forms but becomes erratic as speed builds, suspect feedback integrity (Hall/tach edges, back-EMF timing).
- Practical discriminator: “bus moves + current ramps” proves power switching is alive; “no current” points to drive/protection lockout.
Checklist Spin-start waveform fingerprints
- Healthy start: DC bus shows a controlled dip, then stabilizes; phase current ramps with repeatable shape; Hall/tach transitions become denser with speed.
- Bad start (trip): repeated bus sag + immediate stop suggests protection trigger (true or false OCP) or weak bus energy storage.
- Bad start (no-drive): DC bus stays nearly steady and phase current is near-zero, suggesting enable/UVLO/latched fault or missing switching.
Current sensing & protection: OCP/OTP/UVLO decide most “start then stop” cases
Protection is the dominant decision-maker in washer inverter boards. A single fault code can be triggered by different paths: hardware fast-trip (comparator / internal IPM protection), sampled current limits (CSA + ADC), or undervoltage behavior that disables gate drive. Diagnosis must prove whether an event is a true overload or a false trip caused by sensing/aliasing.
Shunt map Common shunt locations and what each can “see”
- DC-link / bus shunt: captures total current trend; may miss per-phase fast spikes and can hide which leg causes the event.
- Low-side shunt(s): strong diagnostic value for phase-current shape; sensitive to ground bounce if Kelvin routing is weak.
- Phase shunt / internal module sense: can be accurate but lives in high dv/dt environments; front-end common-mode robustness is critical.
CSA + ADC Bandwidth vs PWM: where false trips come from
- PWM edge spikes: switching edges inject transients into shunts and CSA inputs; sampled at the wrong moment, spikes look like real current.
- Aliasing window: ADC sampling that lands near switching transitions can create “OCP only at certain duty/speed” patterns.
- Proof method: compare CSA output to the true shunt differential waveform; correlation with PWM edges strongly indicates a sensing artifact.
Protection chain Thresholds, blanking, and thermal decisions
- Fast comparator trip: immediate cutoff path; may latch faults even when averaged current is moderate.
- Blanking behavior: short start/commutation windows may be intentionally ignored; wrong timing makes “cannot start” look like overcurrent.
- Thermal behavior: protection may be based on NTC plus an estimated thermal model; “warm board trips sooner” is a useful discriminator.
Discriminators True OCP vs false OCP; UVLO vs brownout
- True OCP vs false OCP: if the measured shunt differential and CSA output agree in magnitude and timing, overload is likely real; if CSA shows large spikes not present across the shunt, a sensing artifact is likely.
- UVLO vs brownout: gate-drive supply UVLO typically disables switching while logic rails remain; brownout is indicated when 5V/3V3 dips precede reset and fault.
- Routing implication: UVLO evidence routes to gate-drive supply stability; brownout evidence routes to auxiliary rails and coupling from switching nodes.
Cause → Evidence → First fix (board-level, washer-specific)
| Cause pattern | Evidence that proves it | First fix focus |
|---|---|---|
| Bus sag + immediate trip | DC bus dips sharply at start; phase current spikes then cuts off; fault latches quickly. | Check bus energy storage/inrush behavior, load torque spike, bridge leg integrity, and verify OCP threshold path. |
| OCP only in a narrow speed/duty window | CSA output shows edge-correlated spikes; true shunt differential does not match magnitude/timing. | Reduce coupling: improve Kelvin sense routing, RC input filtering, and sampling phase away from PWM edges. |
| No current forms (no-drive) | DC bus stays steady; phase current remains near zero; bridge switching absent. | Verify enable/driver UVLO, bootstrap supply, fault-latch reset conditions, and gate-drive command presence. |
| Random resets around spin events | Logic rails dip precedes reset; fault appears after MCU restarts; symptoms correlate with switching bursts. | Stabilize auxiliary rails and return paths; isolate noisy switching loops from logic/AFE references. |
| Trips more when warm | Trip threshold effectively lowers as temperature rises; thermal sensor/estimate reaches limit earlier under the same load. | Check thermal path (heatsink/airflow/compound), device loss rise, and verify thermal sense placement/response. |
Gate drive & switching integrity: why issues appear only under load
“Weak torque,” “noisy spin,” and “random trips” frequently originate from gate-drive margin and switching integrity. Load increases di/dt and switching stress, which amplifies three failure paths: insufficient Vgs / bootstrap drop, ringing/Miller-induced mis-switching, and dv/dt coupling into sensing or MCU rails.
Supplies Gate driver VDD and bootstrap health
- Driver supply (12–15V class): under load, any VDD sag reduces Vgs and raises loss, causing heat rise and early trips.
- Bootstrap (VB–VS) stability: droop during repeated switching indicates weak bootstrap capacitor/charging path or excessive switching-node stress.
- UVLO signature: Vgs amplitude collapses or becomes intermittent; PWM commands may exist but power switching stops.
Timing Dead-time and Miller effects
- Dead-time too large: reduces effective voltage at low speed → weaker torque and more heating for the same mechanical load.
- Miller coupling (high dv/dt): can create false turn-on/partial conduction → current spikes, audible noise, and protection triggers.
- Ringing management: excessive gate or switch-node ringing often correlates with “only fails when loaded.”
Coupling dv/dt coupling into sensing and MCU reset
- Sensing corruption: dv/dt can inject spikes into shunt/CSA inputs and ADC references, creating false OCP-like evidence.
- Logic integrity: coupling into reset/rail return paths can cause brownout-style resets that masquerade as inverter faults.
- Correlation proof: if “trip/reset” aligns tightly with switching edges, prioritize coupling and layout evidence before replacing loads.
Layout must Minimum layout rules that change outcomes
- Short gate loop: minimize inductance to reduce Vgs ringing and improve edge control.
- Kelvin source / Kelvin shunt: separate power return from sense return to prevent ground bounce from becoming “measured current.”
- Snubber strategy: target switch-node overshoot/ringing; treat snubber as a controlled tradeoff, not a generic add-on.
Probe here first (fast isolation sequence)
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TP-G: Vgs high/low + rise/fall + ringing Purpose: prove gate-drive margin and identify Miller/ringing-driven mis-switching.
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TP-SW & TP-BUS: switch-node ringing + DC bus overshoot Purpose: quantify switching stress and whether overshoot correlates with trips under load.
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TP-LOGIC: 5V/3V3 + RESET (only if resets appear) Purpose: prove coupling-driven brownout vs inverter-only UVLO events.
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TP-BS: VB–VS bootstrap stability Purpose: confirm the high-side drive is not collapsing during repeated commutation.
Valve, pump, and actuator drivers: a separate evidence chain from the inverter
Water-handling faults (fill/drain) frequently look like “motor/inverter issues” because program states are gated by interlocks. This section treats inlet valves and the drain pump as an independent chain, using a repeatable template: Command → Output → Load. The goal is to prove whether the fault is control-side, driver-side, or load-side.
Inlet valve Command → Output → Load
- Command: verify the valve enable signal (MCU pin / opto input) transitions when fill is requested.
- Output: confirm triac/relay/SSR output waveform matches the expected mode (full-cycle or controlled phase).
- Load: measure coil current (more reliable than voltage) and confirm it tracks the commanded state.
Drain pump Command → Output → Load
- Command: verify pump enable gating is satisfied (door-lock feedback and state conditions) before suspecting the pump.
- Output: distinguish AC pump via triac (mains waveform gating) vs DC pump driver (DC/PWM drive).
- Load: compare running current to stall current behavior; a stall often produces a strong current signature and fast heating.
Door lock Interlock gating that blocks fill/drain
- Feedback gating: missing lock confirmation can prevent valve/pump activation even if the inverter chain is healthy.
- Evidence: confirm the lock feedback line changes state before expecting output waveforms at valve/pump drivers.
- Typical misread: “pump dead” when the actual root cause is an interlock that never satisfies the state machine.
Quick discriminators When symptoms are misleading
- Command present + output voltage present + low coil current: suspect ghosting/leakage or coil/open-connector issues.
- Command toggles repeatedly: suspect interlock chatter or rail noise causing state resets rather than a “bad pump.”
- No command at all: prioritize gating inputs (door lock, water-level plausibility) before probing the power device.
Water-level sensing AFE: pressure path, drift, and calibration evidence
Water-level reliability depends on a complete chain: pressure tube → sensor output → AFE/RC conditioning → ADC reference + sampling timing → calibration + plausibility. This section focuses on vertical detail for water-level AFEs only, using discriminators that separate blocked pressure paths from EMI-coupled noise correlated with PWM switching.
Pressure path Tube + sensor output types
- Pressure tube dynamics: the tube/air chamber behaves like a slow system; blockage or leaks reshape the response more than the sensor electronics.
- Analog pressure sensor: continuous voltage that should move with fill/drain slope; drift appears as a shifting baseline.
- Pressure switch: discrete threshold events; hysteresis is expected, so “up” and “down” behavior differs.
- Frequency-output sensor: level is encoded in frequency/period; stability and counting jitter are primary evidence points.
AFE Front-end RC, ADC reference stability, sampling timing
- RC filtering tradeoff: too heavy → slow/sluggish level response; too light → visible spikes and jitter.
- ADC reference stability: switching events can modulate reference/ground, shifting “level” even when pressure is unchanged.
- Sampling timing: sampling near noisy edges increases apparent jitter; align sampling to quieter windows to avoid aliasing-like errors.
- Three-point proof: compare sensor output vs AFE output vs ADC/log reading to locate the first corrupted node.
Calibration Offset, temperature dependence, hysteresis, plausibility
- Empty offset: the baseline must be stable and repeatable; drift indicates reference/ground or thermal dependency.
- Temperature dependence: cold/hot fill and board self-heating can move the baseline; calibrate with temperature context.
- Hysteresis handling: rising vs falling curves differ; treat it as expected physics, then verify it stays within bounds.
- Plausibility check: fill command should produce a plausible level slope; mismatch is stronger evidence than absolute value.
Discriminators Blocked tube vs EMI-coupled noise
- Sensor OK, tube blocked: signal becomes stuck or responds very slowly; fill command does not create the expected slope.
- EMI-coupled noise: spikes/jitter correlate with PWM switching events; idle is stable, agitation/spin introduces synchronous artifacts.
- Next-step proof: identify whether corruption appears first at sensor, AFE, or ADC/reference.
Signal expectations (fast plausibility reference)
| State | Expected trend | Noise risk | Red flags |
|---|---|---|---|
| Empty | Stable baseline (repeatable offset) | Low | Baseline drifting with time or temperature |
| Fill | Monotonic rise (slope matches valve action) | Medium | Flat/slow slope, or step-like jitter unrelated to fill |
| Agitate | Slow variation around a level band | High | Spikes synchronized to PWM switching edges |
| Drain | Monotonic fall toward baseline | Medium | Stuck high/slow fall suggesting blocked tube or trapped pressure |
Heating control & safety: dry-heat detection, overtemp, and contact reliability
Heating reliability is proven by an evidence chain: command → switching device → heater current → temperature slope → redundant cutoffs. This section stays focused on heater control and safety signals (not generic power-supply topics), with practical signatures that separate “no current,” “no temperature rise,” and “fast temperature rise with low water-level plausibility.”
Switching Relay / triac / SSR and why contacts degrade
- Relay contact resistance: rising resistance increases local heating, creating intermittent behavior that a voltage check can miss.
- Triac switching: output may show voltage presence without delivering correct power; current evidence is more reliable than voltage-only checks.
- SSR behavior: leakage and voltage drop can confuse “on/off” assumptions; validate with heater current and temperature slope.
Sensing NTC placement, thermal fuse, and redundant cutoffs
- NTC placement: determines response speed and representativeness; poor thermal coupling produces misleading slopes.
- Thermal fuse: independent last-resort cutoff; confirm continuity when “heat on but no current” is observed.
- Redundant cutoffs: safety chain should remain effective even if control logic is unstable; evidence is visible as hard disable conditions.
Dry-heat Detection logic based on slope, not absolute temperature
- Core rule: heater enabled + water-level not reached + fast temperature rise indicates dry-heat risk.
- Why slope matters: abnormal dT/dt appears earlier than absolute overtemp and is a stronger early discriminator.
- Dependency: dry-heat logic depends on water-level plausibility (refer to H2-7 checks without duplicating them).
Evidence Two primary measurements
- Heater current vs command: proves whether power actually flows into the load when heating is requested.
- NTC slope vs time: proves whether delivered power creates a realistic thermal response.
- Consistency check: current + slope must agree; disagreement is the fastest route to root cause.
3 failure signatures (fast diagnosis)
Signature A Heat ON, no current
- Meaning: switching path open (relay contact, triac not triggered, SSR open) or thermal fuse open.
- Evidence: command present but TP-I near zero; output waveforms do not translate into load current.
- Next step: verify continuity of fuse/load and validate TP-OUT vs TP-I alignment.
Signature B Current ON, temp not rising
- Meaning: poor thermal coupling, sensor placement/contact issues, or unexpected heat removal paths.
- Evidence: stable heater current but NTC slope is abnormally low or erratic.
- Next step: confirm NTC mounting/thermal path and re-check that the sensed location matches the protected hotspot.
Signature C Fast temp rise, level not reached
- Meaning: dry-heat risk or water-level plausibility failure.
- Evidence: steep dT/dt shortly after heat enable while level slope is missing or implausible.
- Next step: return to water-level plausibility checks (fill rate vs level slope) before replacing heater parts.
Leak detect: water leak chain, false positives, and evidence-driven isolation
Leak detect is a washer-local safety chain (not whole-house metering). The fastest root-cause path is to align raw sensor reading, debounce/threshold behavior, and the state machine actions (valve off, pump on, heater inhibit, error latch).
Sensors Types and what each “lies about”
- Float switch: discrete contact; false triggers come from stiction, mechanical bounce, or harness vibration.
- Conductive probes: resistance/conductance; detergent film and corrosion create high-impedance leakage that looks like “partial wet.”
- Optical leak sensor: contamination/condensation alters the light path; readings drift with humidity.
- Moisture tape: distributed sensing; aging edges and intermittent wet spots cause unstable readings.
Debounce / AFE Contamination, corrosion, intermittent shorts
- Detergent film: slow RC-like behavior; threshold crossings appear delayed or “sticky,” creating repeated near-threshold toggles.
- Corrosion: intermittent shorts that create sharp spikes; a brief event can still be latched as a fault.
- Harness/connector stress: only trips during spin vibration; evidence is time-correlation with high-speed phases.
- Debounce window: too short → false positives; too long → slow response to a real leak. Validate with controlled wetting.
System action What happens after a leak event
- Valve off: stops fill immediately to limit further leakage.
- Pump on: attempts to evacuate standing water and reduce risk.
- Heater inhibit: prevents dry-heat risk under abnormal water states.
- Error latch: fault code may remain until a clear condition is met (service mode, power cycle, or stable sensor recovery).
Evidence Prove true leak vs sensor false
- Raw vs state: confirm whether raw input crosses threshold before the state machine reacts.
- Controlled wetting: reproduce with small, deliberate wetting (not flooding) to avoid introducing unrelated shorts.
- Isolation check: disconnect sensor; if input still trips, suspect harness/connector or board-side contamination.
- Vibration link: faults only during spin strongly suggest harness motion or connector intermittency.
Quick decision tree (leak true → sensor false → harness/connector)
Raw reading stays asserted (not a single spike) and matches visible water evidence or repeated wet recovery behavior.
Controlled wetting/clean-dry cycles cause unstable thresholds; detergent film or corrosion produces slow drift or jitter.
Trips only during spin vibration, or persists with sensor disconnected. Inspect connector corrosion and intermittent shorts.
Rugged power and EMC coexistence: washer-specific rail survival and noise partition
Washer spin-start is a worst-case event: large PWM bursts and peak current coincide with the highest risk of rail droop and coupling into AFEs. This section stays washer-specific: which rails must survive spin-start, how noisy/quiet zones coexist, and which blocks fail first under surge/EFT/ESD.
Power tree Must-survive rails during spin-start
- Gate driver rail: droop triggers UVLO and creates repeated start-stop behavior under load.
- Logic rail (5V/3.3V): droop triggers BOR/reset; symptoms include program restart, mis-sequenced actions, and inconsistent fault codes.
- AFE/Reference supply: modulation shifts sensor readings (water-level/leak/NTC) and creates “sensor-looking” faults that are actually power integrity issues.
- Brownout paths: identify which auxiliary rail is pulled down first during spin-start and whether recovery is clean or oscillatory.
Partition Noisy vs quiet coexistence (washer board view)
- AFE ground returns: keep quiet return paths short and distinct; switching return injection distorts thresholds and ADC baselines.
- ADC reference integrity: reference modulation looks like a “global sensor drift” event.
- Reset/BOR sensitivity: one brief droop can reset control logic even if the inverter appears to keep switching.
- Harness as a coupling path: vibration + high dV/dt periods increase intermittent events at connectors and long sensor leads.
What fails first Surge / EFT / ESD practical order
- Gate driver first: repeated start attempts, abnormal switching behavior, or immediate disable under load.
- MCU reset first: unexplained restarts, mode jumps, valve/pump command anomalies, and inconsistent error latching.
- Valve driver misfire: ghosting or unintended toggles after a disturbance (especially on long harness runs).
Evidence Correlate rail droop with PWM bursts
- Align time markers: rail droop (TP rails) + PWM bursts (switch activity) + fault/reset pins or logs.
- Lead/lag rule: rail droop preceding the event supports brownout; AFE corruption synchronized to PWM supports coupling/return issues.
- Permanent shift after event: points to damage or a latched protection state rather than transient noise.
Washer-specific note
- Do not generalize: prioritize spin-start correlation because it is the washer’s highest combined stress moment (current + switching + vibration).
- Deeper standards: detailed surge/EFT/ESD test procedures belong to the dedicated EMC / Safety page to avoid duplicating a general EMC textbook here.
Validation & field debug playbook: Symptom → Evidence → Isolate → First fix
This section converts “guessing” into repeatable evidence. Each symptom card forces the same loop: two measurements → one discriminator → a bounded first fix (washer-local only).
Top decision tree (fast routing, <10 lines)
- Spin-start fault? Align TP-BUS (bus droop/ripple) with TP-I (current ramp). If droop leads → brownout/UVLO path; if current spikes lead → OCP/drive path.
- Fill never ends? Check TP-LVL (raw level monotonic slope) and TP-VALVE (valve coil current). Valve ON + level flat → plumbing/tube; valve “voltage” without current → ghosting.
- Drain slow? Check TP-PUMP (pump current) and TP-LVL (level-down slope). High current + slow slope → blockage/load; low current + slow slope → drive/power.
- Heat issue? Check TP-HEAT-I (heater current) and TP-NTC (dT/dt). Command ON + no current → switch chain; current ON + no dT/dt → thermal coupling/sensing.
- Leak trips? Check TP-LEAK-RAW (continuous vs spikes) and TP-STATE (latch rules). Spikes + latch → corrosion/harness/debounce window.
- Any resets / mode jumps? Correlate TP-5V/3V3 droop with PWM bursts and TP-RESET edge to isolate brownout vs coupling.
1 Spin-start trips OCP (tries to spin, then stops with error)
First 2 measurements
- Capture 1–2 seconds around the start command: bus dip timing vs current spike timing is the key discriminator.
Discriminator (prove which subsystem)
- Bus droop leads (rail collapse before current spike): brownout/UVLO path or auxiliary supply collapse under PWM bursts.
- Current spike leads (sharp ramp before bus droop): true overcurrent/short, motor phase issue, or gate-drive switching integrity.
- OCP “only on ADC/log” while shunt differential looks clean: false OCP from sensing aliasing or ground injection.
First fix (bounded, most likely hardware causes)
- True OCP path: inspect bridge devices, phase harness, and motor phase-to-phase continuity; verify shunt value and Kelvin routing.
- False OCP path: verify current-sense bandwidth vs PWM, clamp ringing, and comparator blanking window; re-check sense return/REF stability.
- UVLO/BOR path: confirm gate-driver rail and 5V/3.3V do not droop below thresholds during spin-start.
Current-sense amplifier: TI INA240A1, TI INA181A2, ADI AD8418A · Shunt: Vishay WSLP3921 (low-inductance) · Gate driver: TI DRV8323RH, Infineon 1EDC20I12MH · Reset supervisor: TI TPS3839, Microchip MCP1316
Capture for ticket / RFQ
- Error code + exact load condition (empty drum / wet load) + ambient temperature.
- Waveforms: TP-BUS and TP-I with aligned timebase.
- Board revision, bridge device type (discrete MOSFET vs IPM), shunt location photo (Kelvin routing evidence).
2 Motor hums, no rotation (audible drive, no torque)
First 2 measurements
- Verify Vgs reaches expected drive level and stays stable under load; then verify feedback changes with attempted commutation.
Discriminator
- Vgs low / collapses: bootstrap/driver UVLO or gate loop integrity issue (not a sensor problem).
- Vgs OK but no Hall/FG changes: feedback path open, Hall supply missing, or harness/connector failure.
- Vgs OK + Hall toggles but torque missing: phase wiring mismatch, one leg open, or poor switching edges causing weak torque.
First fix
- Confirm bootstrap capacitor health and driver supply integrity under load; check dead-time/gate resistors if discrete.
- Verify Hall sensor supply and signal continuity at connector during vibration; reseat/inspect corrosion.
- Check for one-leg open (solder crack, connector pin) using phase current symmetry evidence.
3-phase gate driver (FOC-capable): TI DRV8323RH · Hall supply LDO: TI TLV70033 · ESD protection on Hall lines: TI TPD1E10B06 · Bridge MOSFET family (example class): Infineon OptiMOS 5 / OptiMOS 6 (device selection per voltage/current)
Capture for ticket / RFQ
- Vgs waveform (rise/fall + ringing) and Hall/FG timing during start.
- Photo of gate loop routing and connector/harness condition.
3 Endless fill / level not detected (valve keeps filling)
First 2 measurements
- Water-level validation uses slope, not just absolute value. Valve validation uses current, not just voltage.
Discriminator
- Valve current ON + level slope flat: pressure tube blocked/leaking, tube detached, or water path not reaching the pressure chamber.
- Level spikes synced to PWM: AFE/REF coupling or sampling timing issue (sensor looks bad but is not).
- Valve “voltage” present but current tiny: triac/SSR leakage or ghosting (snubber leakage) misread as ON.
First fix
- Validate pressure path response time with a small, controlled pressure change; compare sensor output vs AFE output vs ADC.
- Stabilize ADC reference and AFE return path; verify sampling is not aligned to switching noise peaks.
- If triac drive is used, confirm proper gate drive and leakage expectations; validate with coil current measurement.
Optotriac driver (valve): onsemi MOC3063 (zero-cross) · Triac (valve load class): ST BTA16-600B · AFE op-amp (buffer/filter example): TI OPA320 · ESD for sensor input: TI TPD1E10B06
Capture for ticket / RFQ
- TP-LVL raw trace across fill and agitate; note whether noise is correlated with inverter activity.
- TP-VALVE coil current trace with command state.
4 Drains slowly / pump overheats (weak drain, high temperature)
First 2 measurements
- Use level-down slope as the “truth” of water movement; use pump current to separate load blockage from drive weakness.
Discriminator
- High pump current + slow level-down: hydraulic blockage/impeller jam (load-side). Overheat is expected from sustained stall.
- Low pump current + slow level-down: under-drive, supply sag, or triac/driver loss (drive-side).
- Output toggles unexpectedly: interlock/state machine gating or brownout resets affecting actuator control.
First fix
- Confirm whether the pump is stalling (current plateau) or under-driven (low RMS). Address blockage first if stall evidence exists.
- For DC pump drivers, check thermal protection behavior and supply droop under load.
- For AC pump triac drive, verify gate drive and snubber condition; confirm with current, not “output voltage.”
DC motor driver (pump class): TI DRV8876 · AC pump triac (example class): ST BTA24-600B · Buck regulator for actuator rail (example): TI TPS54302 · Reset supervisor (avoid mode jumps): TI TPS3839
Capture for ticket / RFQ
- Pump current waveform + level-down slope over the same time window.
- Note if the issue appears only during high-speed vibration (harness intermittency clue).
5 No heat / overheats (heater command mismatch or fast temperature rise)
First 2 measurements
- “No current” vs “no temperature rise” are different problems. Always separate them with these two traces.
Discriminator
- Command ON + no current: open switch chain (relay contact, triac/SSR not conducting, thermal fuse open).
- Current ON + dT/dt ~ 0: thermal coupling issue, sensing placement/contact issue, or heat carried away (not a power-delivery failure).
- Fast dT/dt + questionable level plausibility: dry-heat risk (use water-level plausibility as a gate, without drifting into other topics).
First fix
- Verify relay/triac/SSR conduction with current. If current is missing, inspect contact resistance, drive path, and fuse continuity.
- Validate NTC response path (mechanical contact/placement) using a controlled heating/cooling change.
- Confirm redundant cutoffs (thermal fuse) status before replacing control logic parts.
Heater relay (example): Omron G5LE-1A · Optotriac driver: onsemi MOC3063 · Triac (heater load class): ST BTA24-600B · NTC (example 10k): Murata NCP18XH103F03RB
Capture for ticket / RFQ
- Heater current trace (TP-HEAT-I) and NTC temperature trace (TP-NTC) aligned in time.
- Heater switch type (relay/triac/SSR) and photo of heater connector/fuse area.
6 Leak detect triggers falsely (immediate leak error or random leak latch)
First 2 measurements
- Separate “continuous asserted” from “spike + latch.” The fix paths are different.
Discriminator
- Continuous asserted: true wet path or heavy contamination; confirm with controlled cleaning/drying and controlled wetting.
- Spikes + latch: corrosion, intermittent short, harness vibration, or debounce window too short.
- Trips with sensor disconnected: board-side contamination or harness/connector short (not the sensor element).
First fix
- Reproduce with controlled wetting (small amount) and compare raw input to latch timing; clean and dry to validate contamination hypothesis.
- Inspect connector corrosion; if vibration-correlated, secure harness routing and confirm strain relief.
- Add/verify input protection and stable biasing if raw node is floating or highly susceptible to noise.
ESD protection (input): TI TPD1E10B06 · Schmitt buffer (debounce hardening example): TI SN74LVC1G17 · Pull-up reference LDO (example): TI TLV70033 · Waterproof connector family (example): JST JWPF series
Capture for ticket / RFQ
- Raw leak input trace (continuous vs spikes) and the exact latch time.
- Photos: sensor area, harness routing near vibration zones, connector pins (corrosion evidence).
Notes: part numbers above are MPN examples used as concrete anchors for debugging and replacement planning. Final selection must match the board voltage/current class, isolation requirements, and thermal constraints.
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FAQs: fast isolation for DD/inverter washer main control boards
Each answer stays washer-local and starts with two measurements, then a discriminator, then a bounded first fix. Deep detail lives in the mapped chapters.
1DD washer “tries to spin then stops”: check DC bus first or phase current first?
Start with TP-BUS (DC-bus dip/ripple) and TP-I (phase or DC-link current ramp) on the same timebase. If bus droop leads the stop, suspect UVLO/BOR in the power tree; if current spikes lead, suspect true OCP or switching integrity. First fix: stabilize the rail that collapses first, then re-check OCP threshold/blanking. (Maps to H2-11, H2-3)
2How to tell real overcurrent vs false trip from CSA noise?
Compare CSA output to a direct shunt differential probe across the resistor during the PWM cycle. A real OCP shows matching shunt current and CSA waveform; a false trip often shows CSA spikes aligned to switching edges while the true shunt differential stays clean. First fix: reduce dv/dt injection (routing/RC filter), align bandwidth to PWM, and confirm comparator blanking time. (Maps to H2-4)
3Why does the motor start fine empty but trip with wet laundry load?
Wet load demands higher low-RPM torque, so current rises earlier and bus droop is larger during spin-start. Measure TP-I (current ramp) and TP-BUS (bus sag) with the same trigger. If the current ramp is normal but the bus collapses, the issue is often aux rail collapse under load; if current ramps abnormally fast, suspect phase/harness or bridge leg weakness. First fix: confirm rails and shunt/Kelvin integrity. (Maps to H2-3, H2-4)
4Gate driver bootstrap OK at idle—why fails at low RPM high torque?
Under high torque, PWM duty and switching stress change; bootstrap recharge margin can shrink and dv/dt noise can force Vgs droop or false UVLO. Measure TP-G (Vgs amplitude/ringing) and TP-GDRV (driver rail/boot node) during the failing start. If Vgs collapses after a burst, suspect bootstrap cap/diode or UVLO threshold margin. First fix: restore clean driver supply and reduce ringing with gate resist/snubbers. (Maps to H2-5)
5Inlet valve clicks but water doesn’t enter—how to prove coil vs triac/relay?
Prove it with coil current, not “output voltage.” Measure TP-VALVE-I (coil current) and TP-VALVE-V (driver waveform) during the command. A click with near-zero current often means triac ghosting/leakage or a contact that arcs but cannot sustain conduction; normal current with no water suggests plumbing/pressure issues. First fix: verify drive device conduction and snubber leakage; then inspect coil/connector. (Maps to H2-6)
6Drain pump runs but water level reading doesn’t drop—sensor or plumbing?
Pair TP-PUMP-I (pump current) with TP-LVL (level-down slope) over the same window. High pump current with a flat level slope implies blockage/impeller jam (water not moving). Low pump current with flat slope implies under-drive or supply sag. If level slope is noisy only when PWM bursts occur, suspect AFE coupling rather than plumbing. First fix: separate “water not moving” from “level not trustworthy.” (Maps to H2-6, H2-7)
7Water level signal jitters only during PWM—what’s the simplest isolation test?
Run the exact same fill sample twice: once with inverter PWM disabled, once during PWM bursts. Measure TP-LVL (raw level) and TP-REF (ADC reference/AFE supply). If TP-REF moves with PWM and TP-LVL follows, it’s coupling/return integrity; if TP-REF is stable but TP-LVL jitters, it’s input pickup/tube resonance or sampling timing. First fix: stabilize REF/returns and move sampling away from switching edges. (Maps to H2-7, H2-10)
8Heater turns on but temperature barely rises—what two measurements confirm it?
Measure TP-HEAT-I (heater current vs command) and TP-NTC (temperature dT/dt). If command is ON but current is missing, the switch chain is open (relay/triac/SSR/thermal fuse). If current is present but dT/dt is near zero, heat is not coupling to the sensed location or water is carrying heat away. First fix: confirm conduction with current first, then verify sensor placement/contact. (Maps to H2-8)
9Why does the heater overheat when water level looks normal?
“Level looks normal” can still be untrustworthy if it is noisy, stale, or violates plausibility. Log/measure TP-NTC (rapid dT/dt) and TP-LVL (level slope / stability) at the moment heating starts. Overheat often happens when the control believes level is OK but the pressure path is blocked or the AFE is corrupted during switching events. First fix: enforce plausibility (fill-rate vs level slope) and re-check REF/ground return integrity. (Maps to H2-8, H2-7)
10Leak sensor triggers after detergent use—how to validate false conductivity?
Compare TP-LEAK-RAW (raw input continuity) to the latch timing in the state machine. Detergent film creates a high-resistance path that looks “wet” intermittently. Validate by controlled cleaning/drying, then controlled wetting with a small amount of water: a true leak produces stable asserted raw; a film-induced false positive shows drifting raw near threshold and spikes that get latched. First fix: clean/inspect corrosion, then harden biasing and debounce window. (Maps to H2-9)
11Random MCU resets during spin—what rail/point best correlates with PWM bursts?
Correlate TP-5V/3V3 (logic rail) and TP-RESET/BOR with PWM burst timing. A brownout reset shows rail droop leading the reset edge; coupling issues show resets without meaningful rail droop but with large ground bounce near the MCU/REF. Also check TP-GDRV because gate-driver UVLO can cascade into supply dips. First fix: fix the rail that droops first, then improve return paths and add/verify reset supervision. (Maps to H2-10, H2-11)
12After a surge event, what blocks are most commonly damaged on washer inverter boards?
The most common “first casualties” are input protection (TVS/MOV), gate-driver front end, and aux supplies that feed logic/AFE. Validate with two measurements: TP-GDRV (driver rail health) and TP-5V/3V3 (logic rail stability), then check whether OCP/UVLO behavior changed versus pre-surge. First fix: replace protection parts that clamp first and confirm no leakage/shorts on driver/rail nodes before re-applying load. (Maps to H2-10)
