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Disposer & Composter Motor Control: Stall Detect & Safety UI

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Disposer/composter reliability comes down to an evidence-driven control loop: robust motor drive plus accurate stall/torque detection, tied to temperature and odor/VOC sensing, with safety interlocks and clear fault UI. This page focuses on device-level signals, thresholds, and validation steps to prevent false trips and unsafe retries—without expanding into cloud platforms or whole-home gateway architecture.

H2-1 · Center Idea

Closed-loop control for drive, stall evidence, sensing, and safety

This page explains a device-level control loop that links motor drivetorque/stall evidenceodor/temperature sensingsafety interlocks & UI actions, so faults become measurable and recoverable.

Scope is strictly on-board hardware and field evidence: no cloud/app architecture, no protocol-stack deep dive, and no whole-home gateway/HEMS strategy.

What this page delivers (engineering outcomes):

  • Signal-first design: how to choose measurable signals (current, speed proxy, temperature slope, odor proxy) so “stall/jam” can be proven instead of guessed.
  • False-trip resistant stall logic: a layered discriminator that separates short transients from true stall using time-windows and cross-checks.
  • Actionable recovery & safety: how interlocks and UI map to safe actions (derate, reverse, stop, latch) and to field-debug checkpoints.
Disposer / Composter Control Loop Device-level evidence → decision → action Motor Drive Power stage + control Torque / Stall Evidence Current + speed proxy Odor / Temp Sensing NTC + VOC proxy Safety Interlock & UI Latch + user guidance Core idea Use cross-checked evidence (current + speed + temperature slope) to avoid false stall trips. Map confirmed faults to safe actions (derate → reverse → stop → latch) with clear UI. ICNavigator · Figure F1
Cite this figure Figure F1 — Disposer/Composter closed-loop: drive → evidence → sensing → safety/UI.

Figure F1 focuses on the device-level closed loop: measurable evidence drives decisions, decisions drive safe actions.

H2-2 · System Map

Four chains that keep the design debuggable and safe

The system is intentionally decomposed into four chains so every later chapter can “fall back” to a specific chain with measurable inputs and clear outputs.

  • Drive chain AC/DC entry → power stage → motor → mechanical load
  • Torque/Stall chain current / speed proxy / back-EMF → torque estimate → layered criteria → protection action
  • Odor/Temp chain NTC locations + VOC/gas proxy → fan/heater/run-mode strategy → user guidance
  • Safety/UI chain lid/door/waterproof I/O interlocks → fault decode → UI prompts → manual reset / latch rules
Design principle: the drive chain provides energy, but the other three chains provide proof. A stall action should never rely on a single noisy signal.
Chain Inputs (measurables) Key risks Outputs / Actions
Drive bus voltage, phase/line current, PWM duty, speed proxy overcurrent transients, torque ripple, EMI-induced resets derate ramp, controlled stop, reverse attempt, soft-start
Torque/Stall current RMS/peak, speed decay, back-EMF/zero-cross timing false stall trips during short jams; missed stalls causing overheating layered stall decision (transient → sustained → confirm), latch rules
Odor/Temp NTC (device hotspots), temperature slope, VOC/gas proxy baseline drift sensor drift & contamination; heat soak causing delayed trips cooldown timer, fan/heater strategy, “clean/empty” prompts
Safety/UI lid/door switch, waterproof I/O integrity, fault counters unsafe restart, user confusion, water ingress false triggers safe-state enforcement, clear fault codes, manual reset gating
System Map (4 Chains) Inputs → risks → actions; evidence flows into decisions Drive chain AC/DC Power Stage Motor Torque / Stall chain Current Sense Speed Proxy Criteria Layers Odor / Temp chain NTC Hotspots VOC Proxy Run Mode Safety / UI chain Interlock Fault Decode UI decision action Mapping rule Any symptom must map to: measurable inputs → discriminator → safe action. ICNavigator · Figure F2
Cite this figure Figure F2 — 4-chain system map with evidence-to-action feedback loops.

Figure F2 shows the four chains and the feedback: evidence informs decisions; decisions drive safe actions back into the power stage.

H2-3 · Motor & Load Reality

Why stall/jam detection is hard: motor types and non-linear loads

Disposers and compact composters are dominated by non-linear, impact-heavy loads. Short torque shocks can look identical to true stall if the design relies on a single signal. The goal is to align the motor type with the measurable evidence available on the board.

High inertia Impact torque Wet/dry mix Transient spikes False stall risk

Load behaviors that fool naive stall logic

  • Startup inertia: high current with slow speed ramp can be normal. A stall decision must include a startup window or speed rise expectation.
  • Intermittent impacts: a hard fragment or fibrous clump can cause a sharp current spike and momentary speed drop, then self-release.
  • Wet/dry transitions: torque can jump within a short window. Evidence must confirm whether current stays high without recovery.
  • Water/debris noise: splashes and debris can inject electrical and mechanical noise that corrupts speed proxies and current sensing.

Motor type × observability matrix (evidence availability)

The same “stall” symptom can be easy or impossible to prove depending on which signals the motor topology makes observable.

Motor type Typical drive Current evidence Speed proxy Stall discrimination & common false triggers
Single-phase induction AC direct / phase control RMS/peak available, sensitive to line variation Often unavailable without extra sensor Usually weak; false trips during startup or line dip; confirm with time-window + temperature slope
Universal motor AC phase control Large ripple/brush noise; spikes common Optional tach/Hall; otherwise weak medium with tach; otherwise weak; impacts and brush noise mimic stalls → require multi-window confirm
BLDC DC bus + inverter (PWM) Phase current/shunt available with proper sampling Hall or sensorless back-EMF/zero-cross strong; cross-check current + speed decay; false trips mostly from sampling unsync or bus ripple
PMSM DC bus + inverter (PWM/FOC) Phase current central to control loop Hall/encoder or sensorless estimation strong; use current + speed + thermal slope; false trips from estimator instability or noisy sensing
Design takeaway: stall decisions should not depend on “current over threshold” alone. Robust detection needs at least one independent dimension (speed decay or temperature slope) plus a time-window that distinguishes impact transients from sustained stalls.

One-line selection guidance: entry designs typically rely on conservative current/thermal protection; mid-tier adds a speed proxy for layered criteria; high-tier combines phase current + speed estimation + thermal slope for reliable recovery actions (derate/reverse/stop/latch).

Torque / Speed / Current Proxy — Decision Zones Visual intuition: time-window + cross-check avoids false stall trips Current / Torque proxy Speed low mid high Normal Current varies, speed sustained Transient Spike then recovery Stall High current Low speed spike no recovery Rule: stall requires sustained evidence across a time-window, not a single peak. ICNavigator · Figure F2
Cite this figure Figure F2 — Concept zones for Normal/Transient/Stall using speed vs current/torque proxy.

Figure F2 is a qualitative map: transient spikes can be safe if speed recovers; true stall is sustained high current with persistent speed loss.

H2-4 · Power Stage Choices

Topology trade-offs: efficiency, noise, cost — and observability

Power topology determines more than efficiency and BOM cost. It directly decides which evidence is measurable (current, speed proxy, bus ripple, thermal slope) and therefore how reliable stall/jam decisions can be.

AC direct / phase control (TRIAC / SSR): strengths and side effects

  • Fast, low-cost actuation: simple control for fixed-speed operation; minimal control complexity.
  • Evidence challenges: phase-chopped waveforms inject switching edges that raise EMI and pollute current sensing near zero-cross.
  • Torque ripple: chopped conduction can create torque pulsation; short impacts look like stalls unless time-windows and confirm signals are used.

DC bus + PWM inverter (half-bridge / 3-phase bridge): evidence becomes controllable

  • Sampling synchronization: current evidence must be sampled away from switching transients; otherwise “stall” becomes a measurement artifact.
  • Bus ripple awareness: rectifier/PFC ripple can distort current thresholds; normalization or cross-check is needed for robust criteria.
  • Stronger observability: phase current plus speed proxy (Hall or sensorless back-EMF timing) enables layered stall criteria and safer recovery actions.

Topology → detectable signals → common failures → first protection (engineering table)

Topology Detectable signals Common failure modes First protection
AC phase control (TRIAC) line current (RMS/peak), line voltage proxy EMI resets; false stall on impacts; torque ripple leading to nuisance trips conservative current time-window; thermal slope confirm; controlled stop + cooldown
AC switching (SSR) line current; device temperature thermal stress in SSR; limited speed evidence; stalls detected late thermal derate; current limit; latch rules for repeated trips
Rectifier + DC bus + PWM VBUS, shunt/phase current, temperature unsynced sampling creates phantom spikes; bus ripple shifts thresholds sample sync + filtering; derate ramp; reverse attempt with bounded window
3-phase inverter (BLDC/PMSM) phase current, speed proxy (Hall/BEMF), VBUS, NTC estimator instability; noisy speed proxy in splash/debris conditions layered stall criteria (transient→sustained→confirm); safe stop/latch on repeated stalls
Observability rule: the best topology is not only efficient— it makes the right evidence measurable. Reliable stall detection is built from current + speed proxy + temperature slope, supported by correct sampling and time-windows.
Power Stage Choices + Measurement Points Mark the evidence taps: VBUS, I_SHUNT, NTC, speed proxy AC Input Line Rectifier / PFC optional DC Bus VBUS Inverter / Driver PWM bridge Motor Load VBUS sense I_SHUNT Speed proxy NTC hotspot slope Evidence taps (minimum set) VBUS + I_SHUNT + NTC + speed proxy → layered stall criteria ICNavigator · Figure F3
Cite this figure Figure F3 — Power stage blocks with minimal measurement taps for robust stall decisions.

Figure F3 highlights the minimum measurable set that supports a stall/jam discriminator: VBUS, shunt/phase current, hotspot NTC slope, and a speed proxy.

H2-5 · Torque Estimation & Stall Detect

Stall SOP with minimum signals: layered criteria and safe actions

This section defines a practical, firmware-ready stall/jam discriminator using the fewest reliable signals. The method avoids false trips by separating impact transients from sustained stalls and confirming thermal stress via temperature slope.

I_RMS / I_PEAK Speed proxy (optional) Decel slope (short-window) dT/dt confirm

Minimum Evidence Set (MES): choose the smallest workable combination

MES-1 (lowest cost)

Current (window RMS/peak) + time-window + thermal slope (optional). Use conservative actions and stronger cooldown/latch rules.

MES-2 (recommended)

Current + speed proxy + time-window. Robust separation of transient impacts vs stall, enabling controlled reverse attempts.

MES-3 (high robustness)

Current + speed proxy + dT/dt. Highest confidence decisions and safer recovery under harsh load variability.

Evidence sources and what each one proves

Current (RMS/Peak/Ripple)
Use a defined sampling window (PWM-synchronous or cycle-based). Prefer sustained RMS over single peaks. Peaks primarily flag “possible impact,” while sustained RMS supports stall suspicion.
Speed proxy
Any reliable speed proxy (Hall period, back-EMF timing, zero-cross interval) answers one question: does speed recover after a current event? If speed evidence is unavailable, decisions must fall back to stricter time rules.
Decel slope (short-window)
Short-window decay distinguishes momentary impact from persistent stall trend. Use it as an enhancement signal to move from “suspect” to “high confidence” without complex math.
Temperature slope (dT/dt)
dT/dt is more stable than absolute temperature across kitchens and seasons. A sustained rise confirms ongoing friction/locked-rotor heating when current and speed signals are ambiguous.

Layered criteria (SOP): A → B → C to avoid false stall trips

Layer A
Transient impact window. Allow short high current for a bounded time window (T_A). If current spikes but speed shows recovery (or current returns to normal), exit with no fault. If high current persists beyond T_A, escalate to Layer B.
Layer B
Suspected stall. Require sustained high current (I_RMS above a sustained threshold for T_B). Strengthen confidence when speed is low/decaying or decel slope stays negative. If speed proxy is unavailable, use stricter time/rerun limits and conservative actions.
Layer C
Thermal confirmation. If dT/dt exceeds a slope threshold while Layer B is active, confirm friction/locked-rotor heating. This confirmation triggers stronger protective actions and prevents repeated damage from repeated re-tries.

Action policy: derate → reverse → stop → cooldown → latch/reset

  • Derate: first response when Layer B begins; reduce torque demand to test recovery without abrupt stop.
  • Reverse attempt: enable only with bounded count and duration; abort if current remains high or dT/dt rises.
  • Stop + cooldown: required when Layer C confirms thermal stress or reverse attempts fail.
  • Latch + manual reset: apply after repeated events, interlock anomalies, or persistent temperature slope violations.

How to set thresholds (method only, no formula dump)

Current
Derive high/ sustained thresholds from rated current envelopes: use a higher “impact flag” threshold for Layer A and a lower “sustained” threshold for Layer B, both evaluated over defined windows rather than single samples.
Time windows
Time windows are the primary discriminator. Choose T_A to cover expected impact/startup shocks; choose T_B to detect true stalls before damage accumulates.
dT/dt
Set dT/dt thresholds using the upper bound of normal run-up slopes plus margin, and ensure the selected NTC location has consistent thermal coupling to the target heat source.
Stall Decision Tree (Layer A → B → C) Current + Speed + dT/dt → safe action Start / Impact Window? Layer A Current High? Speed Low/Decel? TempSlope High? Layer C confirm Derate Reverse Stop Latch Yes Yes Notes Layer A: allow short spikes (time-window). Layer B: sustained high current + speed evidence. Layer C: dT/dt confirms thermal stress → stronger protection (Stop/Latch). ICNavigator · Figure F4
Cite this figure Figure F4 — Decision tree: Current / Speed / TempSlope drive Derate, Reverse, Stop, and Latch actions.

Figure F4 encodes the SOP: tolerate short spikes, escalate on sustained evidence, and confirm with temperature slope before latching faults.

H2-6 · Temperature Monitoring & Overheat Protection

Thermal loop: sensor placement, dT/dt early warning, and stall coupling

Temperature monitoring is both an early-warning channel and the final safety backstop. Correct NTC placement determines whether the system can predict overheating (slope-based) rather than reacting too late (absolute thresholds only).

Why placement matters: different points see different heat sources

  • Power stage hotspot: fastest protection for MOSFET/rectifier/SSR stress; may not represent winding heat.
  • Motor/winding vicinity: strongest indicator for locked-rotor heating; coupling varies with mechanical stack-up.
  • Cavity air: correlates with user perception and odor management; typically slower response for protection.
  • Heater region (if present): dedicated protection for heater and dry-run scenarios; must cooperate with interlocks.

Use temperature slope (dT/dt) for robust decisions

Why slope
Absolute temperature varies with ambient conditions and installation. dT/dt tracks whether a sustained heat source exists, improving stall confirmation and reducing nuisance trips.
How to use
Combine dT/dt with Layer B stall suspicion: if current stays high and speed stays low, rising dT/dt confirms friction/locked-rotor heating and triggers stronger actions.

Placement table: response speed, error sources, best use

Location Response Error sources Best use
Power stage (MOSFET/SSR) Fast PCB copper spreading, airflow changes, local self-heating patterns Immediate device protection; derate trigger; prevent silicon overstress
Motor housing / winding vicinity Medium Mechanical coupling variance, mounting tolerance, grease/water effects Stall confirmation (dT/dt); locked-rotor protection; cooldown exit gating
Cavity air Slow Airflow patterns, fan speed, sensor contamination, splash exposure User guidance; odor/comfort strategy; not primary fast protection
Heater zone (if any) Fast Dry-run condition, insulation changes, localized hotspots Dry-fire prevention; heater derate/stop; safety latching on repeats
Coupling rule: at least one NTC should protect the power stage (fast), and one should track the primary heat source for stalls (motor/winding). Cavity air sensing can support user prompts and run-mode decisions but should not be the only safety input.
Thermal Path + NTC Placement Use dT/dt for early warning and stall confirmation Power Stage MOSFET / SSR Motor / Winding Locked-rotor heat Cavity Air User perception Chassis / Ambient heat sink path NTC_PWR NTC_MOTOR NTC_AIR Thermal control loop Use fast hotspot NTC for immediate derate, motor NTC slope for stall confirmation, air NTC for user prompts. dT/dt is robust across ambient variation; absolute T remains the final safety limit. ICNavigator · Figure F5
Cite this figure Figure F5 — Simplified thermal path with NTC placement and dT/dt usage for early warning.

Figure F5 shows a simplified thermal path and NTC placements that support both fast protection and slope-based stall confirmation.

H2-7 · Odor / Gas / VOC Sensing

Odor sensing as an engineering proxy: what to measure, what not to claim

The goal is not “odor identification.” The goal is a robust proxy for abnormal operating conditions such as spoilage risk, overheat byproducts, and ventilation blockage, while avoiding false triggers from humidity, splash, and drift.

Signals that are useful (and what they indicate)

Baseline shift

Long-term offset changes typically indicate sensor contamination, aging, or persistent residue in the airflow path.

Short spikes

Single-cycle spikes are often caused by lid events, cleaners, or localized gas pockets. Treat as low confidence unless repeated.

Sustained rise

Multi-window sustained elevation supports vent blocked, residue build-up, or overheat-linked byproducts (confirm with temperature evidence).

Sensor options (engineering attributes only)

VOC (MOX)
Strong sensitivity to total volatile intensity and airflow changes, with typical tradeoffs: humidity coupling, baseline drift from adsorption, and contamination by residue/cleaners.
NH3 / H2S
Higher specificity for certain abnormal emissions, but usually increased cost and complexity: cross-sensitivity management, calibration burden, and lifetime constraints.
T/RH (required)
Temperature and humidity are not optional “extras.” They gate confidence and support compensation to prevent humidity-driven false odor alarms.

What can be trusted vs what must not be promised

Signals you can use (with conditions) What not to claim
Trend-based abnormality after T/RH gating and stabilization windows (baseline shift or sustained rise across cycles). “Odor classification” or exact source identification. Single-sample conclusions are unreliable under humidity/splash disturbances.
Ventilation effectiveness: fan ON but concentration does not decay in run windows. Guarantees without airflow context. Airflow path placement can dominate readings more than the chamber itself.
Overheat proxy coupling: sustained VOC rise that aligns with dT/dt or hotspot temperature increase. Claims that ignore temperature evidence. VOC alone cannot distinguish overheat byproducts from cleaners or external exposure.

Sampling windows: run vs post-run (reduce false triggers)

Run window
Best for ventilation diagnostics and sustained abnormalities. Requires stable airflow assumptions and input gating when lid/interlock changes.
Post-run window
Useful for residual release trends. Must suppress triggers during lid-open events and after cleaning chemicals to prevent false positives.
Confidence gating
Treat splash-risk intervals and rapid humidity steps as low-confidence zones. Confirm only when a signal repeats across windows or aligns with temperature evidence.

Closed-loop actions: fan, heater, run-mode, and user prompts

  • Soft actions first: boost fan duty, extend purge time, or switch to a lower-power run mode.
  • Hard actions when cross-confirmed: stop/cooldown only when temperature evidence also indicates risk.
  • User prompts must be concrete: “Clean chamber,” “Check vent path,” “Inspect splash seal” rather than unprovable odor labels.
Airflow Path + Odor Proxy Sensor Placement Place sensors in stable airflow; avoid splash and condensation zones Airflow Channel Intake Fan Heater Chamber Exhaust VOC Sensor T/RH Avoid splash zone Condensation Run window vent effectiveness + sustained rise Post-run window residual release trend (gate lid events) ICNavigator · Figure F6
Cite this figure Figure F6 — Airflow path with sensor placement, sampling windows, and splash/condensation avoidance zones.

Figure F6 places VOC and T/RH in stable airflow and highlights zones that frequently create false triggers.

H2-8 · Safety Interlocks & Waterproof I/O

Interlocks as a run gate: prevent unsafe operation and suppress false actions

Interlocks define whether the system may arm and run. Waterproof I/O design determines whether interlock signals remain trustworthy under splash, condensation, corrosion drift, and connector leakage.

Interlock groups (device-level signals and actions)

Lid / door
Primary human-safety gate. Require stable closed state (debounce + stability time) before arming. Any open transition during run must force a defined stop policy.
Electrical trip
Trip input (overcurrent/leakage/insulation module) must force immediate stop and fault latch. Reset rules must be explicit to avoid repeated unsafe retries.
Water ingress / leakage
Waterproof I/O failure modes include short-to-ground, leakage paths, and threshold jitter. Interlock logic must gate confidence when inputs enter splash-risk conditions.

Waterproof I/O failure patterns and first fixes

Transient false trigger

Water droplets cause threshold jitter and rapid toggling. Fix with debounce, hysteresis input, RC filtering, and margin.

Corrosion drift

Slow changes in contact resistance and leakage paths create intermittent faults weeks later. Add self-check windows and clear fault codes.

Hard short / leakage

Connector leakage or short forces stuck states or cross-coupling. Detect open/short patterns and latch to prevent unsafe run loops.

Interlock table: signal → allowed state → failure symptom → first checks

Interlock signal Allowed state Failure symptom First checks
Lid / Door closed Armed → Running Random stop; repeated arm/disarm; “won’t start” after splash Debounce time, input threshold margin, connector leakage, event counter
Trip input Must latch fault Immediate stop + cannot restart; repeated fault on retry Trip line integrity, latch reset rule, overcurrent evidence correlation
Water ingress detect Gate run / reduce confidence False faults near wet cycles; interlock jitter Ingress sensor placement, hysteresis, wiring insulation, moisture path
Connector health Stable states only Stuck-high/stuck-low states; cross-coupling between inputs Open/short detection, leakage to chassis, corrosion inspection points

UI alignment rule: never appear “ready” when interlocks are not satisfied

  • Safe: motor/heater disabled; UI shows actionable instruction (close lid / check seal).
  • Armed: ready indicator only after stable interlocks and basic self-check windows pass.
  • Fault-Latched: explicit fault state and reset policy; prevent repeated unsafe attempts.
Interlock State Machine Safe → Armed → Running → Fault-Latched (with debounce + margin) Safe Motor=OFF Heater=OFF Armed Ready UI=Ready Running Motor=ON Fan=ON Fault-Latched Latch UI=Fault Lid closed Start Trip / Interlock open Trip Hard fault Reset Waterproof I/O rule Debounce + threshold margin + leakage checks prevent false interlock toggles. ICNavigator · Figure F7
Cite this figure Figure F7 — Interlock state machine: Safe, Armed, Running, and Fault-Latched with explicit reset and trip transitions.

Figure F7 keeps UI, interlocks, and fault handling consistent to prevent unsafe or misleading operation under wet conditions.

H2-9 · UI & Fault UX

Safety-first UX: severity, actionable prompts, and reset gating

UI is part of the safety loop. It must translate evidence-based protection events into user actions, enforce safe reset rules, and map fault codes to maintainable checks.

Fault severity levels (consistent rules across codes)

Level 0 · Advisory Level 1 · Auto-Recover Level 2 · User-Action Required Level 3 · Fault-Latched
  • Level 0: informational prompts (clean/purge guidance) without blocking safe operation.
  • Level 1: system mitigates automatically (derate, purge) and clears when evidence returns to normal.
  • Level 2: requires a verifiable user action (close lid, clear residue, wait cooldown) before retry.
  • Level 3: stop and latch to prevent repeated unsafe attempts; reset only after gates are satisfied.

Prompt rule

Use only observable, provable statements and attach one clear user action. Avoid unprovable claims (e.g., exact odor identity or precise blockage source). Never show “Ready” when interlocks are not satisfied.

Reset logic gates (prevent repeated stress and unsafe retries)

Reset gates

Allow restart only when gates are satisfied: Temp < T_reset, dT/dt normalized, Interlock stable closed, and retry counters are within limits (avoid infinite stall-retry loops).

Example fault code table (device-level, maintainable)

Code Meaning What user does What engineer checks (evidence-first)
IL01 Interlock not closed (not armed) Close lid/door fully; wipe seal; retry after stable closure Interlock raw input jitter, debounce timer, leakage paths after wet cycles
IL02 Interlock opened during run Close lid; wait stop completion; retry only when Ready is shown State transitions Safe/Armed/Running, event counter, vibration/water droplet coupling
ST01 Suspected stall (sustained high current) Stop; clear residue; wait; retry once after Ready I_RMS duration window, speed proxy (if available), threshold vs transient window
ST02 Repeated stall (latched) Clear chamber; inspect mechanical blockage; long-press reset after cooldown Retry counter, reverse attempts, latch conditions, mechanical load evidence vs false detect
TH01 Overheat warning (derate + purge) Wait; allow purge; avoid immediate restart NTC location, dT/dt trend, derate trigger threshold, airflow effectiveness
TH02 Overheat trip (latched) Wait cooldown; do not retry until cleared; long-press reset if allowed Hotspot vs chamber temp correlation, slope confirm threshold, reset gate T_reset
SN01 Sensor open/short (T/RH or NTC) Power cycle; if persists, service ADC raw range, wiring/connector leakage, diagnostic current checks, corrosion drift patterns
OD01 Odor proxy sustained rise (advisory) Run purge/clean cycle; clean chamber; check vent path VOC baseline vs T/RH gating, run vs post-run window consistency, splash-zone suppression
OD02 Purge ineffective (fan ON, no decay) Check vent path; clean filter/duct area; retry purge VOC decay slope during run window, fan command vs response, airflow path obstruction indicators
UI → User Action → System Action Translate protection evidence into safe, verifiable steps Evidence inputs Current Temp Interlock VOC Fault classifier Level + Code Level 1 ST01 UI outputs LED Buzzer Code User action (verifiable) Close lid Clear residue Wait cooldown Dry/clean System action Derate Purge fan Stop Latch Reset gate T, dT/dt, interlock Rule Never show READY when interlocks are not satisfied. ICNavigator · Figure F8
Cite this figure Figure F8 — UI outputs (LED/Buzzer/Code) drive verifiable user actions and gated system actions (derate/purge/stop/latch/reset).

Figure F8 prevents unsafe retry loops by enforcing reset gates and ensuring prompts remain provable and actionable.

H2-10 · Validation & Field Debug Playbook

Field SOP: symptom → 2 measurements → discriminator → first fix

This playbook forces short, repeatable steps. Each symptom uses the same four lines and prioritizes Current + Temperature as the default first pair of measurements.

Default “first 2 measurements”

Start with I_RMS / Peak and NTC (PWR or MOTOR). Use Speed proxy only when available to separate true stall from transient or false detection. Use VOC + T/RH for odor proxy issues with run/post-run window gating.

Symptom cards (fixed 4-line format)

Symptom: Runs then stops
First 2
Current (I_RMS) + Temp (NTC slope).
Discriminator
Sustained I_RMS + rising dT/dt indicates mechanical overload or blocked airflow; low dT/dt suggests transient window or false trigger.
First fix
Tighten Layer-A transient window; adjust sustained window; add cooldown reset gate; verify vent path/purge effectiveness.
Symptom: Loud hum / low torque
First 2
Current + Speed proxy (if available) or Current + Temp.
Discriminator
High current with no speed recovery points to stall/overload; high peak but normal RMS points to transient impact or measurement timing.
First fix
Improve sampling synchronization; raise confidence requirement (2-of-3 evidence); tune reverse attempt limits to avoid repeated stress.
Symptom: Won’t start
First 2
Interlock raw input + Current (commanded start window).
Discriminator
If interlock is not stable closed, system should remain Safe; if interlock OK but current never ramps, check enable gating and trip inputs.
First fix
Add stable-closure timer; increase threshold margin for wet conditions; ensure UI never shows Ready without interlock satisfied.
Symptom: Repeated stall detect (false or frequent)
First 2
Current (RMS vs peak) + Temp slope; add Speed proxy if available.
Discriminator
False detect often shows peaks without sustained RMS or without dT/dt rise; true stall shows sustained RMS and temperature slope alignment.
First fix
Separate peak alert from RMS decision; shorten impact window; add slope confirm (Layer C) before latch; tune retry counter limits.
Symptom: Overheat trips
First 2
NTC hotspot + Current sustained duration.
Discriminator
High dT/dt with moderate current suggests poor thermal coupling or airflow; high current with rising dT/dt suggests overload/stall coupling.
First fix
Move or improve NTC coupling; use slope-based early derate; verify cooldown reset gate; confirm stall logic escalates to thermal protection.
Symptom: Odor spike after run (post-run)
First 2
VOC + T/RH (post-run window), plus lid/interlock events.
Discriminator
If spikes correlate with lid-open or cleaning chemicals, treat as low confidence; if repeated across cycles with stable gating, treat as residue build-up proxy.
First fix
Add lid-event suppression window; strengthen baseline modeling; add user prompt for cleaning cycle instead of “odor type” messaging.
Symptom: Fan purge ineffective (VOC does not decay)
First 2
VOC decay slope (run window) + fan command status.
Discriminator
Fan ON but VOC not decaying suggests vent path blockage or sensor placement in dead zone; decays only when lid opens suggests sampling artifact.
First fix
Reposition sensor away from dead zones; extend purge time; add “vent check” user prompt; gate with humidity steps and splash risk.
Symptom: Random stop after wet cycle
First 2
Interlock raw input jitter + event counter (toggle rate).
Discriminator
High toggle rate indicates water droplet threshold jitter; slow drift over days indicates corrosion/leakage paths.
First fix
Increase threshold margin; add hysteresis and debounce; add open/short diagnostics; latch only after multi-window confirmation.
Symptom: Sensor fault codes (open/short/drift)
First 2
ADC raw range + connector inspection points (wet/leakage).
Discriminator
Hard open/short shows rail-to-rail raw values; drift and intermittents correlate with humidity or corrosion and appear as slow baseline shift.
First fix
Add diagnostic current checks; widen stable windows; add service prompt with clear code; strengthen waterproof routing and sealing.
Field Debug Decision Tree Start from evidence: Current, Temp (dT/dt), Speed proxy, Interlock, VOC + T/RH Start: Symptom Can it start? Interlock stable closed? If running: I_RMS high? Sustained window met? NO → Interlock / Trip gate Check raw input jitter, debounce, leakage Fix: margin + hysteresis + debounce No Yes dT/dt rising? Thermal confirm for true stall/overload I high YES → True stall/overheat Action: derate → stop → latch + cooldown gate Yes NO → Transient or false detect No Fix Tune windows + sampling sync Odor proxy branch (VOC + T/RH) Run window decay? Post-run trend? Gate lid events & humidity steps First 2 measurements Default: Current + Temp (NTC). Add Speed/VOC/Interlock as needed. ICNavigator · Figure F9
Cite this figure Figure F9 — Field debug tree starting from interlock gate, then sustained current, then temperature slope confirmation; includes odor proxy branch.

Figure F9 keeps diagnosis evidence-driven and prevents scope creep: current/temperature first, then speed/interlock/VOC only when needed.

H2-11. IC / BOM Selection Map

This chapter maps each functional block to selection checkpoints and concrete example MPNs. The intent is fast, evidence-driven BOM decisions for motor drive, stall/torque detection, odor/temperature sensing, and safety UI—without drifting into platform or protocol architecture.

  • Block → specs → pitfalls
  • MPN examples (device-level)
  • Signals that enable stall/torque logic
  • I/O protection choices
MPN usage note: Example part numbers show typical, widely-available categories. Final selection must match the motor type, bus voltage/current, thermal environment, and required fault handling (auto-retry vs latch).

Selection Table (by functional block)

Block Key specs to check Common traps Example MPNs (type)
AC motor switch / phase control
  • Line voltage rating, surge current margin
  • Commutation robustness on inductive loads
  • Trigger current / noise immunity
  • False triggering from dV/dt, long harness, wet environment
  • EMI spikes causing MCU resets or false stall detect
  • Noisy torque ripple that looks like “stall” in current-only logic
  • BTA16-600B (TRIAC)
  • MOC3063-M (zero-cross optotriac driver)
BLDC / inverter gate drive
  • Bus voltage headroom (40/60/100V class)
  • Gate drive strength, fault reporting (OCP/OT/UVLO)
  • Integrated current-shunt amplifiers (CSA) for torque inference
  • Inaccurate current sampling if ADC/CSA timing not PWM-synchronous
  • High dv/dt injecting into sense lines → false overcurrent / false stall
  • Missing “sleep/reset fault” behavior in UI/firmware design
  • DRV8323HRTAR (3-phase smart gate driver + CSA)
  • DRV8301 (3-phase gate driver + CSA)
Current sensing
  • Sense strategy: shunt + amplifier vs inline Hall
  • Common-mode range under PWM switching
  • Thermal drift + layout sensitivity
  • Shunt Kelvin routing missing → torque estimate drifts with load/heat
  • Amplifier saturation during switching edges → false “stall”
  • Hall sensor bandwidth/noise filtering hiding short transient events
  • INA240A2PWR (PWM-rejection current-sense amp)
  • WSL2512R0120FEA (12 mΩ shunt resistor)
  • ACS758LCB-100B-PFF-T (inline Hall current sensor)
MCU / control core
  • Capture/compare timers for tach / zero-cross / edge timing
  • ADC throughput + trigger/scan flexibility
  • Brownout behavior + fault logging endurance
  • Timer capture jitter → speed estimate noisy → stall threshold unstable
  • ADC sampling not aligned to PWM → ripple misread as torque change
  • Reset loops from supply dip during jam events
  • STM32L052K8T6 (ULP MCU example)
  • STM32L072KZ (ULP MCU example)
Temperature sensing
  • NTC value & tolerance, B-constant fit
  • Placement: power device vs winding vs cavity
  • Delta-T / slope detection capability
  • Wrong placement → late protection (winding already overheated)
  • Absolute threshold too strict/loose across ambient extremes
  • Water ingress shifting resistance / leakage paths
  • NCP15XH103F03RC (10 kΩ NTC, 0402)
Odor / VOC sensing
  • Drift, contamination tolerance, response time
  • Humidity/temperature compensation path
  • Sampling window strategy (run vs post-run)
  • VOC sensor placed in splash zone → permanent bias / failure
  • Heater pulses coupling into analog rails → “ghost” stall triggers
  • Overpromising “odor identification” instead of anomaly proxy
  • SGP40-D-R4 (VOC sensor, I²C)
  • SHT40-AD1B-R2 (RH/T for compensation)
I/O protection (device-level)
  • ESD clamp voltage at logic rails
  • EFT/fast transient robustness on long cables
  • Leakage vs moisture and contaminants
  • Over-capacitive TVS on fast edges → UI or sensor bus instability
  • Protection not referenced to the real return path → latch-up risk
  • Moisture leakage mimicking pressed keys / interlock closure
  • SMF05C.TCT (TVS diode array for I/O)

MPN Quick List (copy-friendly)

  • BTA16-600B — TRIAC (AC switching / phase control)
  • MOC3063-M — Zero-cross optotriac driver (TRIAC interface)
  • DRV8323HRTAR — 65V 3-phase smart gate driver + CSA
  • DRV8301 — 3-phase gate driver + CSA
  • INA240A2PWR — Current-sense amplifier (enhanced PWM rejection)
  • WSL2512R0120FEA — 12 mΩ metal-strip shunt resistor
  • ACS758LCB-100B-PFF-T — Inline Hall current sensor (high current)
  • STM32L052K8T6 — Ultra-low-power MCU example
  • STM32L072KZ — Ultra-low-power MCU example
  • NCP15XH103F03RC — 10 kΩ NTC thermistor
  • SGP40-D-R4 — VOC sensor (I²C)
  • SHT40-AD1B-R2 — Humidity/temperature sensor (I²C)
  • SMF05C.TCT — TVS diode array for I/O protection
Figure F10 — IC / BOM Map (Device-Level) Drive & Sense Safety & Environment Motor Switch / Gate Drive AC TRIAC / Optotriac or 3-Phase Gate Driver MPN: BTA16-600B • MOC3063-M • DRV8323 Current / Torque Evidence Shunt + Amp (PWM rejection) or Inline Hall MPN: INA240A2 • WSL2512R0120 • ACS758 MCU & Timing / Capture ADC trigger + timer capture for speed/tach MPN: STM32L052K8T6 • STM32L072KZ Interlock & UI Outputs Cover/door inputs + LED/Buzzer drivers Focus: fault-latch safety behavior Temperature Sensing NTC near power device / winding / cavity MPN: NCP15XH103F03RC VOC + RH/T Compensation Anomaly proxy: spoilage/overheat/blocked vent MPN: SGP40-D-R4 • SHT40-AD1B-R2 I/O Protection (Device-Level) TVS/ESD on sensor/UI lines to prevent latch-up & false triggers MPN: SMF05C.TCT Hint: select sensing first (what signals exist), then choose drive topology that preserves detectability.
A device-level BOM map: motor actuation, torque/stall evidence, sensing (temperature/VOC), safety interlocks, and I/O protection.
🔗 Cite this figure (Figure F10)

Citation suggestion: “Figure F10 — Disposer/Composter IC & BOM Map (device-level blocks and example MPNs), ICNavigator.”

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H2-12. FAQs ×12 (Evidence-Based, No Scope Creep)

Each answer uses the same discipline: first 2 checks → discriminator → first fix. Every item maps back to on-page chapters (drive/torque/temperature/odor/interlock/UI/validation/IC-BOM).

  • 2 checks first
  • One discriminator
  • Smallest safe fix
  • Maps to H2 references
1) “Stops immediately after start” — current threshold or interlock not closed?
  • First 2 checks: interlock raw input stability (debounce window) + start-window current rise (RMS/peak).
  • Discriminator: if interlock never reaches a stable “closed” state, the system should remain Safe/Armed and current typically stays low. If current spikes then drops, stall logic or protection is likely acting.
  • First fix: harden interlock margin/debounce in wet conditions, then retune stall Layer A (transient) vs Layer B (sustained) separation.
Maps to: H2-8 (Interlocks) + H2-5 (Stall/Torque)
2) “Hums but does not rotate” — phase-control issue or mechanical jam?
  • First 2 checks: current shape (RMS vs switching ripple) + temperature slope dT/dt near the power device or winding proxy.
  • Discriminator: a true jam tends to show sustained high current plus fast dT/dt rise. A drive/topology issue often shows abnormal current shape (torque not building) without a matching thermal slope signature.
  • First fix: validate the chosen topology’s “detectability” (sampling sync, commutation behavior), then follow the field playbook to isolate mechanical vs control.
Maps to: H2-4 (Power Stage Choices) + H2-10 (Field Debug)
3) “Overheat trips in a few seconds” — sensor placement or stall time window?
  • First 2 checks: NTC placement/thermal coupling realism + dT/dt behavior during the first seconds of load.
  • Discriminator: poor placement produces delayed or inconsistent readings, while a real stall/overload correlates with sustained current and a reproducible dT/dt rise. Slope-based gating is more robust than absolute temperature alone.
  • First fix: refine the thermal point and use slope early-warning, then align stall Layer B/C confirmation timing to thermal dynamics.
Maps to: H2-6 (Thermal) + H2-5 (Stall/Torque)
4) “Frequent false stall detect” — sampling sync or speed estimate jitter?
  • First 2 checks: PWM-synchronous current sampling consistency + speed proxy stability (capture/edge timing jitter).
  • Discriminator: if current readings move with PWM phase, the torque estimate will wander. If speed proxy toggles or jitters near the threshold, “Speed↓” will misfire even when torque is normal.
  • First fix: lock sampling to a stable phase, and widen/structure the transient window (Layer A) so impact loads do not look like stalls.
Maps to: H2-5 (Stall/Torque)
5) “Odor alarm but temperature is not high” — VOC drift or ventilation path issue?
  • First 2 checks: VOC baseline trend (multi-cycle) + run-window purge effectiveness (VOC decay slope) with T/RH context.
  • Discriminator: drift appears as a slow baseline lift with weak correlation to operation state. Ventilation issues show poor decay during fan/purge windows even when humidity compensation is applied.
  • First fix: enforce run/post-run gating, add T/RH compensation, and re-check sensor placement away from splash/condensation zones.
Maps to: H2-7 (VOC/Odor)
6) “Random reboot / wrong codes in humid environments” — I/O leakage or supply dip?
  • First 2 checks: interlock/UI input toggle counter + brownout/reset flag (or minimum-rail event marker) during the incident.
  • Discriminator: leakage typically causes frequent input toggles and inconsistent fault codes without a true reset. Supply dips produce clear reset traces and often correlate with jam events or motor start transients.
  • First fix: harden waterproof I/O margins and protection return paths, then use the field playbook to separate reset vs false-trigger patterns.
Maps to: H2-8 (Interlocks/Waterproof) + H2-10 (Field Debug)
7) “Reverse unjam makes it worse” — strategy error or thresholds too sensitive?
  • First 2 checks: stall trigger history (which layer fired) + reverse retry count/spacing under the same load condition.
  • Discriminator: sensitive thresholds treat impact loads as stalls, causing repeated reversals that compact debris. A strategy issue shows reversals firing too early/too often without a controlled derate and cooldown gate.
  • First fix: apply “derate → short reverse → stop → cool gate → limited retries → latch” with explicit Layer A/B/C boundaries.
Maps to: H2-5 (Stall/Torque)
8) “Same batch, some units are much noisier” — drive method or mechanical tolerance?
  • First 2 checks: current ripple signature under identical load + thermal/efficiency trend (dT/dt or steady rise) across units.
  • Discriminator: drive/control differences typically change current shape and torque ripple. Mechanical tolerance often keeps current similar while noise varies strongly with assembly, debris, or wet/dry load transitions.
  • First fix: use the motor/load observability matrix to classify evidence, then revisit topology and switching decisions that amplify torque ripple and acoustic noise.
Maps to: H2-3 (Motor & Load Reality) + H2-4 (Power Stage Choices)
9) “VOC reading slowly drifts upward” — which two validation steps first?
  • First 2 checks: correlate VOC vs RH (humidity sensitivity) + repeat a fixed sampling window across several normal cycles to quantify baseline drift.
  • Discriminator: strong RH coupling implies compensation/gating gaps. Baseline lift without operational correlation suggests contamination, aging, or splash-zone placement effects.
  • First fix: lock windowing (run/post-run), verify placement away from splash/condensation, and apply drift handling before enabling user-facing alarms.
Maps to: H2-7 (VOC/Odor) + H2-10 (Field Debug)
10) “Users do not understand prompts” — how to map fault codes to actions safely?
  • First 2 checks: fault level policy (auto-recover vs user-action vs latched) + whether each prompt includes exactly one executable user action.
  • Discriminator: mixed policies (showing READY when interlock is not satisfied) creates unsafe retries. Claims that cannot be verified (“specific cause”) reduce trust and hinder serviceability.
  • First fix: standardize “Code / Meaning / User action / Engineer check,” align reset gates to safety policy, and keep text evidence-based.
Maps to: H2-9 (UI & Fault UX)
11) “Current is not high, but it still stops” — speed vs thermal criteria?
  • First 2 checks: speed proxy validity (drop/jitter) + temperature slope dT/dt (slope is more robust than absolute T).
  • Discriminator: speed-criterion misfires when capture jitter or edge noise crosses a threshold. Thermal slope triggers when hot spots rise quickly even without large current (poor coupling/venting or localized heating).
  • First fix: require multi-signal confirmation (speed + current or dT/dt + time window) before stop/latch actions.
Maps to: H2-5 (Stall/Torque) + H2-6 (Thermal)
12) “After water ingress, buttons false-trigger” — interlock/debounce/hardware isolation fallback?
  • First 2 checks: raw input level hovering near threshold + input toggle counter under wet conditions (short vs slow drift behavior).
  • Discriminator: rapid toggles indicate droplet-induced leakage near the threshold; slow drift suggests corrosion/leakage path formation. Both can mimic user commands and break the safety state machine.
  • First fix: add threshold margin + debounce + device-level I/O protection return integrity, and enforce UI policy that never invites retries during unstable inputs.
Maps to: H2-8 (Interlocks/Waterproof) + H2-9 (UI Policy) + H2-11 (I/O protection device class)
Figure F11 — FAQ Evidence Map (Pick 2 Checks → Discriminate → Act) Evidence inputs Current RMS / Peak / ripple Temp slope dT/dt gating Speed proxy capture / timing Interlock debounce / margin VOC + T/RH window + drift Discriminator Rule examples Current ↑ + Speed ↓ Current ↑ + dT/dt ↑ VOC trend + weak purge Interlock toggles → unsafe Actions Derate / Purge Short reverse Stop + Cool gate Latch fault + clear rules Maps back to chapters H2-5 Stall/Torque H2-6 Thermal H2-7 VOC/Odor H2-8 Interlocks H2-9 UI & Codes H2-10/11 Validate/BOM Rule: answers must remain evidence-based and map to on-page chapters (no cloud, no sibling-page expansion).
Figure F11 summarizes the FAQ method: pick two measurable checks first, apply a discriminator, then choose the safest minimal action and map back to the related chapters.
🔗 Cite this figure (Figure F11)

Citation suggestion: “Figure F11 — FAQ Evidence Map (Disposer/Composter), ICNavigator.”