What a High-Side Shunt Amp Actually Does

Instead of placing the shunt in the ground leg, a high-side topology senses current directly in the positive rail. The amplifier rejects the large common-mode voltage, amplifies the small shunt drop and exposes it as a simple voltage that any ADC or comparator can read.

Typical rails it is built for

• 12 V / 24 V automotive battery rails feeding body, chassis and infotainment loads
• 48 V telecom and industrial backplanes with multiple plug-in cards
• 36–60 V factory power rails and distributed DC buses
• High-voltage battery packs where a single shunt tracks charge and discharge current

How it compares to other sensing methods

• Low-side shunt: cheap and simple but lifts the ground node and can mask wiring faults. Use it for small, non-safety-critical loads → low-side shunt page.
• Hall / magnetic sensors: provide galvanic isolation and handle higher currents, but cost, drift and bandwidth are worse for many rails → magnetic sensing pages.
• Digital current monitors: add on-chip ADCs, thresholds and alarms for PMBus/BMS, while still relying on a shunt and high-side front end → digital current monitor page.

When high-side sensing is mandatory

• The return node must stay at true ground for safety, EMC or measurement reasons
• You need to see short-to-ground and short-to-battery faults directly on the rail current
• Multiple loads share a noisy ground return and low-side sensing would hide some fault paths
• Diagnostics or homologation require rail-level current and fault logging, not just per-load estimates

Basic internal building blocks

• Shunt input pins & protection: the IN+ and IN− pins sit across the shunt resistor and see the full rail common-mode. ESD clamps, surge limiters and input resistors protect the front end during hot-swap, load dump and short-circuit events.
• Differential gain stages: one or more precision differential amplifiers extract the tiny difference between IN+ and IN−, while rejecting the tens of volts of common-mode riding on both pins.
• Level-shift & internal supply domain: the sensed differential signal is shifted into the amplifier’s low-voltage domain so it can run from simple 3.3 V or 5 V supplies even while watching 12 V, 24 V or 48 V rails.
• Output stage: a buffered output drives the VOUT pin referenced to ground, often with rail-to-rail swing and enough current to feed an ADC input, a comparator and sometimes a small RC filter.

Devices that add on-chip ADCs, thresholds or digital buses build on the same front end, but those live in the digital current monitor pages rather than here.

Unidirectional vs bidirectional outputs

On the output side, high-side shunt amplifiers fall into two broad groups. Devices without a REF pin are optimized for unidirectional current, with the output starting near ground and rising with load. Devices with a REF pin or internal reference let you shift the output around mid-scale so the same rail can represent both charge and discharge current.

Unidirectional output (no REF pin)

• VOUT sits close to 0 V when the rail current is near zero and increases monotonically with positive current through the shunt.
• Ideal for rails where only positive current is of interest, such as simple DC power supplies or single-direction loads.
• You must choose the shunt value and amplifier gain so VOUT stays within the linear output range at full-scale current.

Bidirectional output using a REF pin

• A REF pin sets the “zero-current” level, often at mid-supply, so positive and negative current move VOUT above and below that reference.
• A single device can then measure charge and discharge current, motor forward and reverse, or source and sink behavior on the same rail.
• Higher gain and smaller Vsense are often used in bidirectional designs to resolve low standby currents without sacrificing headroom for peak events.

Core equations for high-side shunt sensing

At the signal chain level, three simple equations dominate the design:

• Vsense = ILOAD × RSHUNT
• Vout = Gain × Vsense + Vref
• Pshunt = ILOAD2 × RSHUNT

In practice, the full-scale shunt voltage Vsense_FS is often chosen between about 20 mV and 100 mV. Lower values reduce power loss but make offset and noise more critical. Higher values improve signal-to-noise ratio but increase shunt dissipation and eat into the rail voltage margin on low-voltage systems.

For example, a 12 V, 20 A rail with a 2.5 mΩ shunt produces 50 mV at full scale and burns about 1 W in the resistor. Halving Vsense_FS to 25 mV halves shunt loss, but doubles the impact of amplifier offset and noise on the final current reading.

Common-mode handling and what happens beyond the limits

Although the shunt sits at 12 V, 24 V, 48 V or even higher pack voltages, the amplifier’s internal stages run at a modest supply, such as 3.3 V or 5 V. The front-end architecture is designed so that the common-mode voltage rides on both inputs and is largely rejected, while only the small differential component is brought into the low-voltage domain.

• Each device has a specified input common-mode range, for example from near ground up to 80–100 V, where the front end stays linear and within safe operating limits.
• When the rail voltage drives the inputs beyond that range, the internal protection network starts to clamp. The output may saturate or distort long before the absolute maximum ratings are reached.
• Severe over-voltage or repeated surges beyond the common-mode ratings can overheat the input structures and permanently damage the amplifier, even if the pins survive a single transient in the lab.

The next section folds these common-mode and front-end behaviors into a full error budget and shows how they translate into real accuracy numbers on 12 V and 48 V rails.

Main error sources in a high-side sense chain

• Shunt absolute tolerance: 1%, 0.5% or 0.1% directly scales the full-scale current error. A 1% shunt in a 20 A design already contributes ±0.2 A (±1%FS) by itself.
• Shunt temperature coefficient: tens of ppm/°C translate into percent-level gain drift over a 100 °C span if no calibration or compensation is used.
• Amplifier input offset voltage (Vos): when Vsense is small, a few tens of microvolts of offset can dominate the reading at low current and show up as an apparent “always-on” load.
• Amplifier gain error: percent-level variation between devices and over temperature changes the slope from Vsense to VOUT, so the same current produces slightly different output voltages.
• CMRR-related error: finite common-mode rejection lets rail voltage movement couple into the output as an extra offset or gain term, especially on 24 V and 48 V rails.
• Output offset & drift: the final buffer stage can add its own offset and temperature drift, which appears directly at VOUT even if the front-end is perfect.

In the examples below, each of these terms is converted into an equivalent current error so you can see which contributors dominate on real rails.

Example 1: 12 V / 20 A rail with 50 mV full-scale

Consider a 12 V rail with a maximum load current of 20 A. You choose a full-scale shunt voltage of 50 mV so the signal is easy to resolve without burning too much power.

• Shunt value: RSHUNT = 50 mV / 20 A = 2.5 mΩ
• Shunt dissipation at full-scale: PSHUNT = 20² × 2.5 mΩ ≈ 1 W
• Amplifier: choose a part with, for example, 50 µV input offset and 0.5% gain error

Convert each error source into equivalent current

Summarising the error budget for this rail

A simple way to read this budget is to keep a text table that lists each source and its contribution as a percentage of full-scale current:

Shunt absolute tolerance (1%): ±1.0 %FS
Amplifier gain error (0.5%): ±0.5 %FS
Input offset (50 µV): ≈ ±0.1 %FS
CMRR & output drift: ≈ ±0.1–0.2 %FS

Even without calibration, the shunt tolerance is the dominant term in this example. Moving from a 1% to a 0.5% or 0.1% shunt has a much larger impact than shaving a few microvolts from amplifier offset.

Example 2: 48 V rail at 125 °C and 10-year life

On a 48 V industrial or telecom rail, shunt heating and long-term drift start to dominate the picture. Suppose the rail carries up to 10–20 A and can run near 125 °C in harsh environments. The shunt’s temperature coefficient and the amplifier’s long-term drift now matter as much as the initial tolerance.

• A shunt with a 50–100 ppm/°C tempco can easily contribute 0.5–1.0% gain change across a 100 °C span from 25 °C to 125 °C.
• Amplifier offset and gain drift with temperature add further error, especially at low currents and over many on/off cycles.
• Common-mode movement as the 48 V rail sags, surges or rides on switching noise can couple into the reading if CMRR is not sufficient across the whole voltage and frequency range.

For long-life systems, you often express the budget as “total current drift over 10 years” under specified temperature and duty-cycle conditions. Any combination of shunt tempco, amplifier drift and common-mode stress that pushes the drift beyond this target must be mitigated with better components, derating, layout or calibration.

More advanced topics such as burn-in, periodic recalibration and logging drift over time are covered in the aging and re-calibration pages; here the goal is to make those long-term effects visible in the current-sense error budget.

Why you cannot simply “max out” bandwidth

Cranking bandwidth to the maximum pulls in every detail of PWM switching and high-frequency noise, but it also burdens the ADC and digital processing. Pulling bandwidth too low hides fast faults, leaving protection to guess from slow average values. Most rails run best with a deliberate compromise.

High-bandwidth settings (see PWM & fast events)

• Preserve inductor ripple, PWM edges and short-circuit di/dt for detailed analysis and oscilloscope capture.
• Enable comparators or fast digital logic to react on microsecond-scale over-current events.
• Let switching noise, EMI and layout imperfections show up directly in the sensed waveform.
• Require higher ADC sampling rates and more aggressive digital filtering to avoid false trips.

Low-bandwidth settings (average current & efficiency)

• Filter out most PWM ripple so the output tracks average current, power and thermal loading.
• Reduce noise and ease ADC and firmware requirements, making thresholds and statistics more stable.
• Hide microsecond-scale current spikes; only slow ramps and long events are visible.
• Better suited for logging, telemetry and efficiency optimisation than for first-line protection.

Typical RC filters on input and output

Most high-side sense chains rely on simple one-pole RC filters. One sits at the input, close to the sense amp pins, to tame high-frequency noise and protect the front end. Another sits at the output, between VOUT and the ADC, to smooth the signal to match the sampling and digital processing.

Where RC filters usually live

• Input RC: small series resistors and capacitors between the shunt and IN+/IN− form a differential low-pass that reduces high-frequency noise and limits surge current into the amp.
• Output RC: a resistor and capacitor between VOUT and the ADC input form a single-pole low-pass that shapes the bandwidth the digital domain has to cope with.

Example values and cutoff frequency

• Input RC often starts around R = 10–100 Ω, C = 1–10 nF per side.
• Output RC commonly uses R ≈ 100 Ω, C ≈ 10 nF as a first pass.

The single-pole cutoff frequency is set by:

fc = 1 / (2π R C)

For example, R = 100 Ω and C = 10 nF gives fc ≈ 160 kHz. If the PWM frequency is near 300 kHz, this choice still shows some ripple. Setting fc closer to 30 kHz–60 kHz pushes the output toward a clean average current instead.

Co-design with fast OCP and eFuse paths

In many systems, the high-side sense amplifier is not the only protection element. Fast over-current protection or eFuses often watch the shunt directly or use a dedicated fast sense path. This page focuses on keeping the amplifier alive and informative during those events, not on replacing dedicated µs-level protection.

• Ensure the worst-case fault current and shunt value do not drive Vsense beyond the amplifier’s ratings.
• Use input RC and surge protection so most fault energy is handled by the shunt and TVS, not by the amp.
• Avoid making the output RC so slow that protection thresholds based on VOUT react long after the eFuse.
• Keep fast protection logic on its own path; treat the high-side amp as an observer and telemetry source.

Detailed microsecond-scale coordination between current sensing and eFuse controllers belongs in the fast current sense for protection pages; here the aim is to size bandwidth and filtering so the amplifier neither saturates nor burns when faults hit.

Step-by-step design checklist

1. Define whether this current sense channel feeds protection, diagnostics, efficiency tracking or all three.
2. Note the PWM frequency and ADC sampling rate, then choose a target bandwidth window for VOUT.
3. Pick initial RC values so fc sits at roughly 5–10% of the PWM frequency for average current, or 20–30% if some ripple detail is desired.
4. Verify that worst-case fault current and shunt value keep Vsense and input pins within safe common-mode and differential limits.
5. Prototype with real PWM, load steps and short-circuit tests to confirm that the chosen bandwidth meets protection and measurement goals without excessive noise.

Shunt placement & high-current path

• Place the shunt close to the connector or battery positive terminal to minimise loop area and inductance.
• Route high-current traces wide and as symmetrically as practical on both sides of the shunt to reduce thermal gradients.
• Avoid narrow necks or long skinny traces in the main current path; connect quickly into solid power planes.
• Do not cut strange windows or slots in copper right under the shunt that force current through narrow bridges.
• On four-terminal shunts, clearly separate power terminals from sense terminals and never route high current through the sense pads.

Kelvin sampling and sense routing

• Take Kelvin connections directly from shunt terminals or dedicated sense pads, not from the middle of a high-current trace.
• Route the two Kelvin traces as a tight pair with matched length, ideally over a continuous reference plane.
• Avoid long parallel runs next to SW nodes, gate-drive traces or high di/dt loops; cross them at right angles when necessary.
• Minimise vias, test pads and stubs in the Kelvin path; if test access is needed, place pads near the amplifier end.
• For multi-phase systems with several shunts, keep each Kelvin pair clearly grouped and avoid crossing sense lines between phases.

Filter placement and ground referencing

• Place input RC components and any TVS clamps close to the sense amp pins with short, local return paths.
• Reference the sense amplifier to a small, quiet ground island and connect that island to the main ground at a controlled single point.
• Route the VOUT line to the ADC together with its reference ground so they share the same quiet ground domain.
• When the ADC is far away, consider an additional small RC at the MCU side but keep total series resistance compatible with ADC sampling needs.
• In precision designs, a small guard ring or ground shield around the sense amp area can help reduce leakage and coupled noise.

EMI and common-mode motion around the shunt

• Prefer inner layers over a continuous reference plane for long sense runs, reducing exposure to strong dv/dt fields.
• Keep Kelvin and VOUT traces well away from half-bridge switching nodes, motor phases and other aggressive EMI sources.
• Where common-mode noise is severe, a small common-mode choke in the sense path can reduce coupled interference, provided stability and bandwidth are rechecked.
• Route sense traces away from high-frequency clocks, crystals and RF blocks; if crossing is unavoidable, do it briefly and orthogonally.
• When using shields or cans, define clearly how the shield is grounded so it does not become a high-frequency injection point into the sense circuitry.

Step 1 — Test setup and instrumentation

Start by building a repeatable test platform that can cover the intended rails (12 V, 24 V, 48 V), full current range and temperature corners. The same setup will be reused for DC sweeps and dynamic tests.

• Supply and load: use a programmable DC source up to at least 60 V, and a programmable electronic load or MOSFET load board that can cover the full current range (for example 0–50 A).
• Reference measurement chain: include a higher-accuracy reference such as a precision shunt plus DMM or a calibrated current probe, so you have a trusted I_REF for fitting gain and offset.
• Data capture: use a high-resolution DMM or DAQ channel on VOUT, and a scope to watch VOUT and shunt voltage during transients and saturation tests.
• Temperature control: place the demo board in a chamber or on a controlled hot plate, with thermocouples on the shunt and amplifier to track the real device temperatures.

Treat the demo board as the device under test, not as the reference. All results should be expressed relative to the external current reference and logged for later analysis.

Step 2 — DC linearity, gain, offset and common-mode

DC linearity and error at a single rail

• Fix the rail at a typical value such as 12 V and sweep load current from 0 to I_MAX in steps.
• At each step, record the reference current I_REF, the amplifier output VOUT and, if useful, the shunt voltage Vsense.
• Fit a straight line to VOUT versus I_REF using least-squares regression to obtain a best-fit slope and intercept.
• Convert slope error into gain error (%FS) and convert the intercept into an equivalent input offset current at the shunt.

Take extra points in the 0–10% full-scale region to characterise how low-current readings behave, as offset dominated error is most visible there. Plot residuals versus current to see any non-linearity or clipping.

Common-mode capability across 12 / 24 / 48 V rails

• Repeat the same DC sweep at 24 V and 48 V rails, keeping the current range and shunt unchanged where possible.
• For each rail voltage, fit gain and offset again and compare results against the 12 V case.
• Watch for early saturation, clipping or sudden shifts in VOUT as you move toward the upper common-mode limit.
• Summarise gain versus VCM and offset versus VCM so you can see whether behaviour remains within the budgeted error.

This step verifies that the amplifier really stays linear inside its specified common-mode operating range. Large shifts between 12 V and 48 V may point to layout, filtering or grounding issues that are not obvious from the DC equation alone.

Temperature corners (−40 / 25 / 125 °C)

• In the chamber, set the board to −40 °C, 25 °C and 125 °C, using a single representative rail such as 24 V.
• At each temperature, take a reduced DC sweep with a few key points (for example 0%, 25%, 50%, 100% full scale).
• Fit gain and offset at each temperature and derive drift figures in ppm/°C or %FS over the −40 to 125 °C span.
• Compare measured drift with the error budget earlier in this page to decide whether calibration or tighter parts are needed.

Long-term aging and recalibration strategies belong in the dedicated aging and re-calibration pages. Here the goal is to make temperature drift visible and quantify its impact on current measurement.

Step 3 — Bandwidth, filtering and fast events

Dynamic tests confirm that the chosen RC filters and amplifier bandwidth match the intended use. The goal is not to replace a dedicated fast protection page, but to check that VOUT responds fast enough and stays within safe limits during load steps and faults.

• Use an electronic load or MOSFET switch to apply current steps such as 0→50%FS and 0→100%FS on the rail.
• Capture shunt voltage and VOUT on the oscilloscope, including any eFuse or controller signals that react to the event.
• Measure VOUT rise time, settling time and overshoot, and compare them with the bandwidth implied by the RC values and amplifier datasheet.
• Repeat for different RC configurations or gain settings to see how bandwidth and noise trade-offs play out in real waveforms.

Coordination between the high-side sense amplifier and microsecond-scale protection paths is detailed in the fast current sense for protection pages. Here you simply confirm that the sense channel stays within ratings and delivers a usable signal during fast events.

BOM field checklist for high-side current sensing

• Rail and current range: V_rail (for example 12 V, 24 V, 48 V) and I_range (for example 0–30 A, 0–50 A).
• Common-mode window: Vcm_min / Vcm_max over which the amplifier must stay linear (for example −1 V to 60 V, or 6 V to 80 V).
• Total accuracy: Allowed total current measurement error including the shunt, stated as “≤ x % of full scale over temperature”.
• Shunt specification: Rshunt value, power rating, tolerance and tempco, for example “2.5 mΩ, 3 W, 0.5%, 50 ppm/°C, four-terminal”.
• Bandwidth / response time: Required sense bandwidth or step response, for example “≈ 50 kHz effective bandwidth” or “reflects a 5× load step within 50 µs”.
• Temperature grade: Operating range (for example −40 to 125 °C) and any required qualification such as AEC-Q100 grade.
• Package and second source: Preferred package (SOT-23, SOIC, TSSOP) and whether pin-compatible second sources are mandatory or optional.
• Special notes (optional): Bidirectional measurement, REF pin requirement, enhanced PWM rejection or other features that narrow the device choices.

Example RFQ and specification wording

Instead of a single line like “high-side current sense amplifier”, a short paragraph in the RFQ or specification makes your intent clear and reduces back-and-forth with suppliers. The following examples can be adapted to your rails and current ranges.

Example 1 — Unidirectional 12 V rail, average current focus
We need a high-side shunt current sense amplifier for a 12 V automotive rail with a 0–30 A range. Common-mode must be valid from −1 V to at least 60 V. Total current measurement error, including the shunt, should be ≤ ±2 % of full scale over −40 to 125 °C. The sense bandwidth should support average current and load-step tracking up to about 20 kHz. Preferred package is SOT-23-5 with at least one qualified second source.

Example 2 — Bidirectional 48 V rail, higher accuracy
We need a bidirectional high-side shunt current sense amplifier with a REF pin for a 48 V industrial or telecom rail. The current range is −20 A to +20 A, with valid common-mode operation from 0 V to at least 80 V. The total measurement error including the shunt should be ≤ ±1.5 % of full scale over −40 to 105 °C. Bandwidth should be high enough to resolve load steps within 50 µs while keeping noise manageable for ADC sampling. Package should be SOIC-8 or TSSOP-8 with long-term second-source options.

Example high-side sense amplifiers and selection notes

The following part numbers illustrate how different devices map to the BOM fields above. They are not exhaustive, but they show typical options for automotive, industrial and cost-sensitive rails. Always verify the latest datasheet before freezing a design.

Use these examples as starting points, then map each candidate against the BOM checklist: rail and current range, common-mode window, total accuracy, shunt specification, bandwidth, temperature grade, package and second-source strategy.