Isolated ADC & ΔΣ Modulators for Current Sensing

System Role & Use Cases for Isolated ADC / ΔΣ Modulators

An isolated ADC or delta-sigma modulator is the building block that digitises high-voltage, noisy shunt or divider nodes and delivers clean data across an isolation barrier into a low-voltage controller. It sits between the sensing element on the high-energy side and the digital signal processing on the control side, combining accuracy, bandwidth and safety.

This page targets engineers designing inverters, BMS, industrial drives, UPS and PV systems who must sense current and voltage across isolation while balancing accuracy, latency, CMTI and safety ratings. The focus is on how isolated ADCs and delta-sigma modulators fit into the overall sensing stack, not on motor-control algorithms or BMS state-of-charge theory.

Inverter three-phase current sampling

Phase-leg shunt or phase-line shunt voltages feed isolated delta-sigma modulators, which stream bitstreams into digital filters inside the MCU or DSP. Synchronous sampling and bounded group delay are critical for FOC current loops, while high CMTI resists fast dv/dt from the power stage. Deeper motor-phase current layouts and trade-offs are covered in the Motor Phase Current Sensing page.

BMS high-voltage bus current and voltage

Pack bus shunt or divider nodes are digitised by isolated modulators and transported across reinforced isolation into the pack controller. Designers care about long-term drift, isolation lifetime and failure modes as much as resolution. System-level topics such as SOC/SOH estimation and stacked monitor architectures are handled in the Battery Pack Current Monitor page.

Industrial drive, UPS and PV DC link sensing

DC link current and voltage are captured through shunts and dividers into isolated ADCs to support power limiting, efficiency tracking and fault detection. Long cable runs, harsh EMC environments and grid-related events drive the choice of CMTI, bandwidth and digital filtering. System-level metering and grid-interaction are explored in PV & Storage Metering and DC Power Meter pages.

Across these use cases, the isolated ADC or delta-sigma modulator always plays the same role: turn an analogue shunt or divider voltage on the high-energy side into a digital representation that survives common-mode jumps, dv/dt and ground shifts while staying within the control loop’s bandwidth and accuracy targets. The next section looks inside the device itself and the main signal-chain options.

Figure 1. High-voltage shunt or divider feeding an isolated delta-sigma modulator, which crosses an isolation barrier and is reconstructed by a digital filter and MCU on the low-voltage control side.

Architecture and Signal Chain Options

At the device level, isolated ADCs and delta-sigma modulators come in a few distinct flavours: bare 1-bit modulators that require external digital filtering, and devices with integrated decimation and serial interfaces that output filtered codes. Choosing between them is mostly about how much flexibility you want in bandwidth and filtering versus how much logic and firmware complexity you can tolerate.

Figure 2. Two common signal chains: a 1-bit delta-sigma modulator plus external digital filtering, and an isolated ADC that integrates the delta-sigma core, digital filter and serial interface across the isolation barrier.

Bare 1-bit delta-sigma modulators

A 1-bit delta-sigma modulator accepts a differential analogue input from a shunt or divider and produces a bitstream plus clock. External logic or the MCU implements a sinc-style digital filter and decimation to recover the measurement. This option offers maximum control over bandwidth, noise shaping and synchronisation, at the cost of consuming digital resources and firmware effort.

Isolated ADCs with integrated filtering

Isolated ADC devices combine a delta-sigma modulator with on-chip digital filtering, decimation and a serial interface such as SPI or I²C. They present already filtered codes to the host, reducing design time and simplifying firmware. In return, OSR, filter shape and group delay are usually limited to a small set of selectable options instead of being fully customised.

Both variants still rely on the same front-end and isolation fundamentals. The analogue input must be presented within the allowed common-mode and differential ranges, protected against surges and ESD, and routed with care from the shunt or divider to the device pins. The isolation technology defines how well the device tolerates dv/dt and common-mode transients between primary and secondary domains.

Input front-end: shunt versus divider

In current sensing applications, the input is typically the small differential voltage across a shunt resistor placed in the DC bus, phase leg or return path. The modulator must support the required full-scale range and withstand transient overloads while maintaining linearity and low noise. Practical topics such as shunt value selection, power rating, TCR and package choice are covered in the Shunt Selection page to avoid duplicating detailed design rules here.

For voltage sensing, a high-value resistor divider scales the high-voltage bus to the input range of the isolated ADC or delta-sigma modulator. Input impedance, divider tolerance and thermal noise all contribute to the overall accuracy and noise floor. Surge and ESD protection, RC filtering and leakage paths around the divider are treated in more depth in the Front-End Protection and Voltage Sensing pages, which handle the full set of stress and layout considerations.

Isolation technologies at a glance

Modern isolated modulators and ADCs are usually built on capacitive or magnetic isolation structures, with optocoupler-based solutions mostly reserved for legacy designs. Capacitive isolation offers high bandwidth and strong CMTI, making it a natural fit for fast-switching inverters and drives. Magnetic isolation is also common in industrial and motor-control ecosystems, with its own trade-offs in low-frequency behaviour and temperature performance.

Optocoupler-based schemes are less attractive for precision sensing due to lifetime drift, limited bandwidth and higher drive currents. Regardless of the isolation mechanism, detailed topics such as creepage and clearance, working voltage and insulation coordination are handled in the Safety & Isolation page so this section can focus on the electrical architecture and signal-chain choices.

Mapping to related sensing pages

If you are looking for a complete isolated current-sense channel from shunt through amplifier or modulator into the controller, the Isolated Current Sense (ΣΔ / Amplifier) page covers full-chain architectures, error budgets and layout patterns. Shunt Selection focuses on resistor value, power, TCR and pulse ratings. Front-End Protection describes surge clamps, input limit networks and anti-alias filtering, while the Safety & Isolation page details creepage, clearance and insulation ratings. This page keeps a narrower scope on the isolated ADC or delta-sigma modulator itself and its immediate signal-chain options.

Clocking and digital filtering determine how an isolated ADC or delta-sigma modulator trades bandwidth, noise and latency. Designers must choose where the clock comes from, how strongly the signal is oversampled and which sinc-style filter shape and data rate best match the control or metering task. Poor choices here can waste resolution or destabilise loops even if the analogue front-end is well designed.

Clock source and synchronisation

Isolated modulators often offer either an internal clock or the option to accept an external clock that can be shared with the MCU, DSP or FPGA. Internal clocks minimise routing and EMI risk, but operate independently from other converters in the system. External or shared clocks make it easier to synchronise multiple channels and align time stamps, at the cost of managing jitter, duty-cycle distortion and skew across the isolation barrier.

Synchronised sampling is particularly important for three-phase current sensing and multi-shunt systems, where phase errors can directly disturb FOC or vector-control loops. In slower metering applications, the benefit of strict synchronisation may be smaller than the cost of distributing a very low-jitter clock through noisy power-electronics environments, so the data sheet clocking options should be weighed against the system-level timing requirements.

Figure 3. Clock source choices feed the isolated delta-sigma modulator or isolated ADC, while OSR and sinc filter order control bandwidth, latency and in-band noise for metering and control applications.

Clock jitter, noise and practical ENOB limits

Clock jitter effectively moves sampling instants around in time and is most harmful when the input contains significant high-frequency content. For narrow-band metering, intrinsic converter noise and shunt or divider tolerances usually dominate the error budget. In fast protection or wideband control channels, jitter from the clock source, digital isolation and routing can become the limiting factor for ENOB and THD, even when the underlying delta-sigma architecture is capable of higher resolution.

When evaluating devices, look for data-sheet guidance on maximum usable input frequency versus SNR or ENOB, and any specifications on allowed jitter or recommended clock sources. If detailed calculations of jitter versus SNR are required, it is usually better to treat them as part of a broader ADC theory topic and keep this page focused on the selection and configuration of isolated ADCs and delta-sigma modulators.

Accuracy, Noise and CMTI Considerations

An isolated ADC or delta-sigma modulator contributes offset, gain, non-linearity, noise and drift to the overall error budget, and must also ride through large common-mode transients without corrupting data. Metering channels prioritise absolute accuracy and stability over lifetime, while control and protection channels care more about repeatability, bandwidth and robust behaviour under fast dv/dt conditions.

Figure 4. Offset, gain, linearity, drift and noise all consume part of the error budget, while CMTI and dv/dt robustness determine how well the isolated ADC or delta-sigma modulator survives fast events from the power stage without corrupting measurements.

Error budget: offset, gain, linearity and drift

From a system perspective, the isolated converter adds offset and gain error, INL and long-term drift on top of the shunt or divider and any calibration scheme. In metering channels, these errors must remain within a tight total budget over temperature and lifetime, so data-sheet limits for offset, gain and INL are usually combined with reference drift and resistor tolerances. Control and protection channels may accept larger absolute error as long as thresholds are stable and repeatable over the operating range.

Long-term drift matters when measurements are used for billing, energy logging or diagnostics that span years. Where drift is critical, designers often rely on initial calibration plus periodic recalibration or cross-checks against known references rather than treating the isolated ADC as the only source of truth. How often recalibration is needed is application-specific and is best planned at the error-budget level rather than by looking at converter specifications in isolation.

Noise: input-referred and in-band RMS

Noise specifications for isolated delta-sigma converters are most useful when expressed as input-referred RMS noise or spectral density. Combined with the shunt value or divider ratio, this allows engineers to estimate the minimum resolvable current or voltage. Oversampling and the selected sinc filter setting then define the effective bandwidth over which that noise is integrated, trading lower noise against increased group delay and slower step response.

Data sheets commonly provide tables of noise versus data rate or filter configuration. For energy metering and slow logging, lower data rates and narrower bandwidths can significantly reduce in-band noise. For fast protection paths, limits on false-trip probability and response time may force wider bandwidth, so noise improvements must come from better devices, careful layout and well-chosen analogue front-end values rather than simply increasing OSR.

CMTI and dv/dt: surviving the power stage

Common-mode transient immunity (CMTI) describes how much dv/dt the isolation barrier can withstand while still delivering correct data. In motor drives, inverters, PFC stages, UPS and PV inverters, the switching edges of IGBTs or MOSFETs can easily reach tens or hundreds of kV/µs, and the isolated ADC must cope with these events without producing spurious codes, lock-ups or resets. Layout, grounding and decoupling are just as important as the headline CMTI rating printed on the data sheet.

Higher CMTI ratings provide more margin but also tend to increase device cost and may reflect aggressive internal design choices. It is usually better to estimate realistic worst-case dv/dt for the target power stage, add sensible margin and choose parts that meet that requirement rather than blindly chasing the highest possible CMTI number. Detailed topics such as creepage, clearance, working voltage and insulation coordination belong in the Safety & Isolation page, which complements this section’s focus on accuracy, noise and transient robustness at the converter level.

Digital Interface, Sync and Multi-Channel Use

On the digital side, isolated delta-sigma modulators and isolated ADCs present either a bitstream plus clock or a framed serial interface such as SPI or I²C. The choice of interface affects how easily you can implement filtering, synchronise multiple channels and align measurements with control loops or metering algorithms. This section focuses on the device-level capabilities rather than full system time-stamping infrastructure.

Figure 5. Isolated delta-sigma modulators expose bitstreams for external digital filters, while isolated ADCs provide framed codes over SPI or I²C. Shared clocks, SYNC pins and DRDY signals help align multi-channel measurements for three-phase and multi-rail systems.

Digital output types and basic interfacing

One class of isolated devices outputs a 1-bit delta-sigma bitstream plus a clock, intended to feed an FPGA or MCU-based digital filter. This gives maximum freedom over OSR, filter order and synchronisation, but it also consumes logic resources and requires careful design of the filter and decimation. The interface timing and jitter of the bitstream path are just as important as the analogue specifications when targeting high bandwidth or low THD.

Isolated ADCs with integrated filtering and a serial interface present a more familiar SPI or I²C register map. They output already filtered codes, often with optional alert thresholds, status flags and CRC fields. These parts can drop into existing MCU or PMIC architectures with minimal firmware changes but usually offer a limited set of data rates and filter shapes compared with bare modulators. Interface selection therefore depends on how much configurability you need versus how simple the firmware and digital hardware must be.

Multi-channel synchronisation and sampling alignment

Many designs use multiple isolated channels, such as three-phase current sensing or multiple DC bus rails. Here, the key question is how tightly channel-to-channel sampling must be aligned. Devices that share a clock plus a common SYNC or CONVST input can start conversions at the same instant, allowing the host to treat each set of samples as a coherent frame. This is especially important for FOC and vector-control schemes, where phase errors between channels translate directly into torque ripple and control deviations.

Data sheets may specify channel-to-channel skew, conversion start to data-ready delay and whether multiple devices can be driven from a common clock and sync pin. For metering and slower diagnostics, looser alignment may be acceptable; for fast protection or tightly tuned current loops, you should verify that the device’s sync features and timing tolerances meet the system-level requirements before committing to a particular interface topology.

Interrupts, frames and data handling patterns

Data-ready (DRDY) or ALERT pins allow the isolated ADC or modulator to act as an interrupt source instead of forcing the host to poll status bits. In control paths, DRDY-driven interrupts can feed a fixed-rate sampling loop, while in metering applications, DMA and burst reads can transfer blocks of samples into RAM for RMS or energy calculations. For bitstream interfaces, fixed-length frames per sample help align filter outputs and simplify error detection.

Many isolated ADCs also provide packet-level integrity features such as CRC, parity bits or header fields. These are particularly valuable in noisy environments where glitches or timing violations on the digital lines are possible. Well-designed data framing and interrupt handling reduce the risk of silent data corruption and free the host processor to focus on control and metering algorithms rather than low-level housekeeping.

Mapping to the Sync & Timestamp page

This section is limited to the device-side digital interface and synchronisation hooks of isolated ADCs and delta-sigma modulators. System-wide clock trees, hardware time bases, PTP or 1588 distribution and global time-stamping frameworks are treated in the Sync & Timestamp page, which builds on the SYNC, DRDY and data-framing primitives introduced here to coordinate measurements across multiple boards and subsystems.

Layout, Isolation Barrier and Safety Hooks

PCB layout determines how closely an isolated ADC or delta-sigma modulator reflects its data-sheet performance. The shunt or divider must be connected with clean Kelvin routing, high dv/dt hotspots should be kept away from the inputs, and the isolation barrier needs proper copper clearance and ground domain separation. At the same time, device-level insulation ratings must tie into the system’s overall safety and regulatory story.

Figure 6. Kelvin sense traces route from the shunt to the isolated converter while avoiding noisy switch nodes. An isolation slot and copper keep-out region separate primary and secondary ground domains and support the device’s insulation ratings and CMTI performance.

Analogue front-end layout and Kelvin routing

The shunt or divider should be placed close to the power path it monitors, with short, tightly coupled Kelvin sense traces running from the dedicated sense pads to the isolated converter inputs. These traces should avoid long parallel runs near switching nodes, gate-drive tracks or other high dv/dt conductors that can inject common-mode noise. Differential routing and compact local current loops reduce both pickup and conducted noise into the measurement front-end.

Kelvin routing ensures that the voltage presented to the converter reflects the drop across the sensing element rather than IR drops in the load or supply copper. Sense traces should carry only microamp-level measurement current, not the main load current, and they should return to an appropriate local reference point. Practical surge and ESD protection, clamping networks and RC filters are discussed in the Front-End Protection page to avoid duplicating detailed circuitry here.

Implementing the isolation barrier on the PCB

The isolation barrier inside the device must be supported by matching PCB layout practices. Primary and secondary ground regions should be clearly separated, often with a routed slot or clearance gap under and around the package. Copper keep-out regions and the absence of stitching vias across the barrier help maintain creepage and clearance while limiting unwanted capacitive coupling between domains.

High dv/dt power nodes and their return paths should be kept away from the isolation barrier and from sensitive analogue inputs. Shield copper or guard structures can be used where appropriate, but must be planned so they do not compromise isolation distances or provide unintended conductive paths. In practice, achieving the advertised CMTI performance depends as much on the PCB layout around the isolation barrier as on the intrinsic device structure itself.

Safety hooks: basic / reinforced and working voltage

Isolated ADCs and delta-sigma modulators are typically specified with basic or reinforced insulation and a rated working voltage, along with surge or impulse test levels. Basic insulation provides a single level of protection between primary and secondary circuits, while reinforced insulation aims to deliver the equivalent of double insulation within one barrier. Selecting the right class depends on how the device fits into the overall system safety concept and protection scheme.

Designers should treat data-sheet working-voltage limits, pollution degree assumptions and creepage and clearance recommendations as inputs to a wider insulation coordination exercise. Detailed guidelines on choosing basic versus reinforced insulation, calculating creepage distances and matching isolation ratings to mains, DC bus and transient levels are consolidated in the Safety & Isolation page so that this section can focus on the layout and device-level hooks most relevant to isolated ADC and delta-sigma implementation.

Applications and 7-Brand IC Options

This section connects typical use cases of isolated ADCs and delta-sigma modulators to concrete IC options from seven major vendors. The goal is not to list every device, but to give a short list of proven part numbers and how they map to inverter, DC link, BMS and power monitoring designs, so that engineers and buyers can quickly narrow down candidates for detailed comparison.

Figure 7. Isolated ADCs and delta-sigma modulators map naturally to a few core applications. Texas Instruments, ST, NXP, Renesas, onsemi, Microchip and Melexis each offer devices or reference designs that target inverter drives, DC link and PV/UPS stages, BMS high-voltage buses and server or telecom power monitoring.

Typical application patterns for isolated ADC / ΔΣ modulator

Isolated ADCs and delta-sigma modulators appear in a limited set of high-impact locations. Thinking in terms of application patterns makes it easier to decide what bandwidth, CMTI, latency and interface features you actually need, before you dive into a parametric search.

Three-phase inverter phase current sensing: shunt-based IA/IB/IC measurement near the lower or upper devices of a motor inverter. Here, high CMTI, synchronised channels, moderate-to-high bandwidth and predictable group delay are more important than ultra-low noise at very low frequencies.
DC link / PV / UPS bus measurement: current and voltage on the high-voltage DC link of PFC, solar inverter or UPS systems. These channels often share devices with energy metering and efficiency logging, so long-term drift and ENOB across the line frequency bandwidth may matter more than very low latency.
BMS high-voltage bus sensing: total pack current and bus voltage in EV and industrial battery systems. Devices here must provide robust isolation, high CMTI against contactor events and automotive-grade reliability, and they are usually paired with dedicated BMS controllers or battery monitor ICs.
Server / telecom DC power monitoring: shunt-based measurement on 12 V, 48 V or 380 V distribution rails. Typical requirements include multi-channel support, power and energy calculation and black-box event logging, often in combination with dedicated power monitor or PMBus devices covered in the Power Monitor and Energy Metering pages.

Other use cases such as isolated CT or Rogowski front ends, PoE PSE/PD and USB-PD port sensing tend to reuse the same underlying device families and will be covered in their own application-focused pages to avoid overlap. This page keeps its scope on the isolated ADC / delta-sigma building block itself.

Selection axes before you pick a specific vendor

Before comparing TI versus ST versus Renesas datasheets, it is useful to frame the decision along a few simple axes. These axes summarise the preceding chapters on clocking, filtering, noise and CMTI and help you decide whether you need a bare delta-sigma modulator or a fully integrated isolated ADC.

Measured quantity and range: phase current, DC link current, high-voltage bus or low-side leakage; required input range (±50 mV, ±250 mV, ±1 V, 2 V) and whether you need bipolar or unipolar behaviour.
Bandwidth and latency: fast control and protection loops demand relatively low group delay and higher bandwidth, while metering-driven channels can trade latency for lower noise and better effective resolution in the 50/60 Hz band.
Isolation and CMTI: basic versus reinforced insulation, maximum working voltage and the CMTI level needed to survive your worst-case dv/dt events. These must line up with the system safety concept as developed in the Safety & Isolation page.
Digital interface and channel count: raw 1-bit bitstream plus clock (for DFSDM / FPGA / custom sinc filters) versus SPI / I²C isolated ADC with a register map. Multi-phase systems may benefit from built-in synchronisation and data-ready signalling.
Tooling and ecosystem: availability of evaluation boards, motor-control and PV / UPS reference designs and how well the parts plug into your preferred MCU, DSP or BMS platform.

With these axes fixed, the seven-brand table below can be used as a short list: first pick the vendors that match your application pattern and ecosystem, then run a deeper comparison within those families.

7-brand IC options for isolated ADC / ΔΣ modulator chains

The table summarises representative devices and their main application focus. It is deliberately compact: typically two to four part numbers per vendor, with a short note on where they fit best. More advanced system-level energy metering SoCs and magnetic current sensors are cross-referenced but covered in their own dedicated pages.

Brand	Key part numbers (representative)	Typical applications	Interface / architecture	Why short-listed	Notes / caveats
Texas Instruments (TI)	AMC1303E0510 · AMC1204 · AMC131M03	Shunt-based phase current and DC link sensing in industrial motor drives, PV inverters, UPS and high-accuracy polyphase energy metering using isolated shunts.	Isolated delta-sigma modulators (±50 mV / ±250 mV) and 24-bit isolated ADC with integrated DC/DC, supporting external clocking and multi-device synchronisation.	Very broad portfolio, strong CMTI and insulation ratings, rich set of reference designs for servo, solar and metering; easy to combine with C2000 and Sitara controllers.	Many variants share pinouts; pick voltage range and isolation class carefully. Energy metering SoCs are covered in Power & Energy Measurement pages.
STMicroelectronics	ISOSD61 · STDES-AKI003V1 (ref design)	High-end industrial motor control and servo drives using three phase-shunt current sense with isolated sigma-delta modulators feeding STM32 DFSDM peripherals.	16-bit isolated second-order sigma-delta modulator with up to 25 Msps 1-bit stream; designed to pair with on-chip digital filters in STM32 MCUs for current and voltage sensing.	Tight ecosystem with STM32 motor-control toolchain and evaluation kits; good choice when the rest of the design already uses ST microcontrollers and gate drivers.	Portfolio is more focused than TI; most designs expect STM32 DFSDM or dedicated digital filters to reconstruct the signal.
NXP Semiconductors	NAFE11388 · NAFE33352	Isolated multichannel analogue front ends for PLC I/O, process control and high-precision isolated industrial data acquisition, as well as traction and motor-control platforms using NXP MCUs.	Configurable multichannel ΣΔ-based AFEs with integrated references and isolation, typically with SPI interface, intended to connect directly to NXP microcontrollers.	Good match for systems already committed to NXP for motor-control, traction or industrial control, where a unified tool and driver stack is valuable.	More AFE-centric than simple modulators; check whether you need full multifunction AFE capability or a simpler isolated modulator as on other rows.
Renesas	RV1S9353A · RV1S9355A · PS9551AL4	Motor drives and industrial automation where optically isolated delta-sigma modulators are used for high-accuracy current and voltage feedback in harsh noise environments.	Optically isolated delta-sigma modulators with 1-bit MDAT/MCLK outputs, high ENOB and high CMTI, intended to be followed by external sinc digital filters in MCUs or FPGAs.	High accuracy and insulation performance, backed by industrial safety certifications, make these devices attractive for factory automation and precision motor control.	Optocoupler-style solutions can be slightly larger and more power-hungry than capacitive isolators but are familiar to designers used to traditional optical isolation.
onsemi	System ref. designs with isolated shunt	Traction inverters, on-board chargers and high-power DC/DC converters where onsemi MOSFETs/IGBTs, gate drivers and current-sense solutions are combined with isolated ADC chains.	Reference designs typically combine shunt resistors, analogue front ends and suitable isolated ΣΔ ADCs to build complete current measurement paths around onsemi power stages.	Strong at the power stage level; design notes and application guides show how to integrate shunt sensing and isolated conversion in demanding automotive and industrial platforms.	onsemi’s core strength is power devices and drivers; their isolated conversion is often implemented using partner ΣΔ ADCs rather than branded stand-alone modulators.
Microchip	MCP39F511A · MCP39F521 · LX7720	Single- and three-phase AC energy metering, smart plugs, industrial power monitoring and radiation tolerant motor-control platforms needing current feedback and metrology.	Mixed-signal SoCs and motor drivers with embedded ADCs and metrology engines that interface to shunts or current sensors; isolation is usually realised at the board level via digital or analogue isolators in front of or after the ADC.	Attractive when you want “ADC + metrology + MCU” as an integrated solution, especially in metering and space/industrial motor-control markets, with extensive reference designs.	These parts are not stand-alone isolated delta-sigma modulators; they fit better when you are ready to adopt Microchip’s SoC-centric architecture instead of discrete ADC plus isolator.
Melexis	MLX91220 · MLX91221 · MLX91235	Isolated current sensing using integrated Hall and IMC-Hall sensors in automotive and industrial drives, where magnetic isolation and low insertion loss are more attractive than purely resistive shunts plus isolated ADC.	Magnetic current sensors with galvanic isolation and analogue or digital outputs that can either feed conventional ADCs or complement isolated delta-sigma chains for diagnostics.	Useful as an “alternative path” to isolation when shunt losses, thermal constraints or mechanical layout make classic shunt + isolated ADC solutions difficult to implement.	These are not isolated ADCs themselves but fully integrated current sensor ICs; detailed guidance is given in the Hall / MR / TMR Current Sensor IC page to avoid scope overlap.

In practice, many real designs mix and match these families: for example, using TI or Renesas isolated modulators on the phase currents, Melexis magnetic sensors for auxiliary loads and Microchip or other metering SoCs for overall energy statistics. This page stays focused on the isolated ADC and delta-sigma building blocks themselves, while cross-linking to specialised pages when you move into full metering SoCs or magnetic current sensors.

Selection and BOM Planning for Isolated ADC / Modulators

This section turns design requirements into BOM ready fields for isolated ADCs and delta sigma modulators. Instead of generic phrases such as high isolation or fast response, you specify measurable targets that suppliers and internal teams can understand, compare and quote. The focus is only on the converter device itself rather than the full power stage.

BOM field groups at a glance

Practical requirement sets fall into a few recurring groups. Thinking in these buckets helps you check that nothing important is missing before you send a request to distributors or manufacturers.

Measurement and input conditions: what quantity is measured, topology, differential and common mode ranges.
Resolution, noise and dynamics: ENOB target, bandwidth, group delay and oversampling or data rate.
Isolation and safety: insulation class, working voltage, isolation test and CMTI requirements.
Digital interface and channel configuration: bitstream versus SPI or I²C, multi channel sync expectations.
Environment and logistics: temperature range, qualification level, package form factor and lifecycle risk.

Recommended must have BOM fields

The following fields capture the minimum information that should be present in a BOM or RFQ when sourcing isolated ADC and delta sigma modulator devices.

Measurement type and input topology
Describe whether the device senses shunt current or divided voltage and whether the behaviour is unipolar or bipolar. Example wording: shunt based phase current, bidirectional, low side; or high voltage DC bus voltage via resistor divider.
Differential input range and common mode range
Specify the expected differential input span and the associated common mode. Example wording: plus or minus fifty millivolts differential with common mode up to four hundred volts DC at the DC link. This helps vendors select the correct shunt range and front end.
Resolution or ENOB target with bandwidth and data rate
State the effective number of bits required over a realistic bandwidth rather than only quoting nominal resolution. Example wording: at least thirteen ENOB over zero to five kilohertz with oversampling ratio two hundred and fifty six or better, or equivalent output data rate and filter configuration.
Signal bandwidth and maximum acceptable group delay
Differentiate clearly between control or protection paths and metering paths. Example wording: control path bandwidth at least twenty kilohertz with group delay not exceeding forty microseconds, or metering path with narrower bandwidth where a higher delay is acceptable in exchange for lower noise.
Isolation type, working voltage and isolation test level
Indicate whether basic or reinforced insulation is required along with the intended working voltage and isolation test level. Example wording: reinforced insulation for eight hundred volt peak working voltage with isolation withstand of four kilovolts root mean square according to the relevant safety standards.
CMTI requirement
Replace vague comments about high CMTI with numeric thresholds. Example wording: CMTI at least one hundred kilovolts per microsecond for motor inverter phase node edges or at least fifty kilovolts per microsecond for DC link sensing near fast switching devices.
Digital interface type and host platform
Clarify whether the design expects a one bit modulator or a framed serial interface together with the intended host. Example wording: delta sigma modulator with external sinc three filter in microcontroller digital filter, or isolated ADC with SPI interface up to two mega samples per second.
Channel count and synchronisation expectations
Specify how many channels are required and whether simultaneous sampling or multi device sync is needed. Example wording: three single channel modulators sharing clock and sync pin for three phase current, or dual channel isolated ADC with guaranteed channel to channel delay matching.
Package type, height and creepage constraints
Capture mechanical and isolation geometry needs. Example wording: wide body small outline package with height not exceeding two point six millimetres and creepage distance at least eight millimetres to support the intended overvoltage category and pollution degree.
Temperature range and qualification level
Define the operating temperature and any automotive or industrial qualification targets. Example wording: minus forty to plus one hundred and twenty five degrees Celsius with AEC Q one hundred Grade one qualification for automotive traction inverter and BMS applications.
Target safety and isolation standards
List which safety standards the final equipment is expected to comply with so that vendors can confirm alignment. Example wording: insulation system must support applications designed to IEC six one eight zero zero dash five dash one and UL fifteen seventy seven for motor drive or power conversion products.
Ecosystem and tooling preferences
Mention any preference for specific ecosystems such as certain microcontroller families or reference designs. Example wording: preference for parts with existing motor control reference designs for the chosen controller family or evaluation boards suitable for photovoltaic and UPS DC link sensing.

Optional and advanced fields

Some projects need extra clarity around second sourcing, diagnostics and lifecycle. These fields are not mandatory but make sourcing smoother for complex or safety critical systems.

Pin compatibility and second source strategy: specify whether pin to pin alternatives or at least same footprint families are preferred.
Diagnostics and alarms: indicate needs for fault flags, out of range detection, cyclic redundancy check or internal self tests.
Power consumption and supply options: set limits on supply current and clarify whether integrated isolated power is needed or an external supply is preferred.
Evaluation boards and reference designs: mention if first builds rely on vendor evaluation kits or application notes tailored to motor drives, photovoltaic inverters or metering.
Logistics and lifecycle: capture minimum order quantities, preferred lead times and tolerance to products that are not recommended for new designs or close to end of life.

A short example requirement line might read as follows: three channels of shunt based phase current sensing using reinforced isolated delta sigma modulators, plus or minus fifty millivolts differential, CMTI at least one hundred kilovolts per microsecond, group delay at most forty microseconds, SPI or DFSDM capable host and AEC Q one hundred Grade one capability.

FAQs on Isolated ADC and Delta Sigma Modulator Design

The questions below condense the main design and sourcing decisions for isolated ADC and delta sigma modulator solutions. Each answer is written so it can be reused directly in design notes, internal reviews, supplier communication or structured FAQ snippets without further editing.

When should I use an isolated ΔΣ modulator instead of an isolated current sense amplifier?

An isolated delta sigma modulator is best when you want very high CMTI and flexible digital filtering rather than a fixed bandwidth analogue output. It shines in multi phase motor drives, DC link sensing and metering where you already have microcontroller digital filters or FPGA resources and can tolerate some group delay in exchange for accuracy and isolation strength.

How do OSR and sinc filter order affect bandwidth and noise in isolated ADC designs?

Oversampling ratio and sinc filter order together set the trade off between bandwidth and noise. A higher oversampling ratio and higher order filter reduce in band noise and improve effective resolution but also narrow bandwidth and increase group delay. For control loops you normally relax oversampling and filter order slightly, while metering channels benefit from aggressive oversampling and notches at line frequency.

What level of CMTI is typically needed for inverter and motor drive current sensing?

For modern inverters and motor drives, CMTI requirements are often in the range of fifty to two hundred kilovolts per microsecond depending on bus voltage, switching speed and layout quality. Higher values give more margin but may not fix poor PCB layout. In practice you combine a device rated at or above one hundred kilovolts per microsecond with careful routing and isolation barrier design around the phase nodes and shunts.

How does clock jitter translate into additional noise or error on the shunt measurement?

Clock jitter modulates the sampling instants of the delta sigma loop so that a changing input looks like an additional random error term. The effect scales with input frequency and jitter amplitude, so it is usually negligible for slow metering signals but can reduce signal to noise in high bandwidth current loops. Using a clean clock source and avoiding excess jitter on isolation boundaries helps preserve effective resolution at higher frequencies.

What is the impact of digital filter group delay on control loop stability and response time?

Digital filter group delay appears to the control loop as extra transport delay between the shunt and the controller, which directly eats into phase margin. As delay increases you must reduce closed loop bandwidth or accept more overshoot and slower responses. For fast current control you normally limit combined converter and filter delay to a small fraction of the PWM period, while metering channels can tolerate much longer delays without stability concerns.

How can I synchronise multiple isolated ADC channels for three phase current sensing?

Multi channel synchronisation typically uses a shared clock plus a sync or convert start pin that triggers all modulators or isolated ADCs together. Many devices also provide data ready outputs so the controller can treat each set of samples as a coherent frame. For three phase current sensing this avoids angle errors between phases and keeps vector control and protection thresholds consistent across the full operating range of the inverter.

Which key data sheet parameters matter most for metering versus fast protection use cases?

Metering channels focus on in band noise, effective resolution over the line frequency range, gain and offset drift and long term stability. Fast protection and control paths instead prioritise bandwidth, group delay, CMTI and overload behaviour. When selecting parts you can often share devices across both roles but you should tune filter settings and calibration strategy separately for metering and protection branches of the signal chain.

How should I route the shunt and input traces into an isolated modulator on the PCB?

Route short, tightly coupled differential traces from the Kelvin sense pads of the shunt directly to the isolated converter inputs, keeping them away from switch nodes, gate drive tracks and long parallel power traces. Sense lines should carry only measurement current and return to a quiet reference. Avoid routing over splits in reference planes and use small input filters only where necessary, coordinated with the chosen digital filter bandwidth.

What isolation voltage and safety ratings are required for common DC bus and mains applications?

Required isolation levels depend on bus voltage, overvoltage category, pollution degree and whether the isolation is basic or reinforced in the overall safety concept. Many industrial drives and photovoltaic inverters use reinforced isolation with working voltages of several hundred volts and test levels around four kilovolts root mean square. Final values must be derived from the applicable safety standards and insulation coordination rules for the target market and installation.

How do I budget gain and offset error and drift from the isolated ADC in my overall accuracy target?

Treat the isolated converter as one contributor in a full error budget that also includes the shunt, reference, layout and temperature effects. Convert gain, offset, integral nonlinearity and noise into equivalent percentage or ampere terms across the operating range and combine them statistically or worst case. This reveals whether you need multi point calibration, temperature compensation or a higher grade device to meet the final accuracy requirement.

When is it better to choose an isolated ADC with integrated filter and SPI instead of a one bit modulator?

An isolated ADC with integrated filter and SPI is attractive when you want to minimise digital design effort, reuse existing serial interfaces and keep the host side simple. You trade some flexibility in filter shape and oversampling for easier firmware, fewer logic resources and often simpler timing. This suits many DC link, power monitoring and lower bandwidth control loops where ultra fast response is not required.

Which BOM fields should I specify when sourcing isolated ADC and ΔΣ modulator devices from suppliers?

At minimum you should specify measurement type and topology, differential and common mode ranges, effective resolution and bandwidth targets, isolation class, working voltage, CMTI level, digital interface, channel count, package constraints, temperature range, qualification level and relevant safety standards. Adding ecosystem preferences and lifecycle expectations helps suppliers filter families quickly and propose parts that align with both the technical design and the long term sourcing strategy.

Isolated ADC and Delta-Sigma Modulators for Current Sensing