System Role – Why Common-Mode & Grounding Matter

Data sheets often promise common-mode rejection ratios around 80–120 dB, yet real boards still show a few percent of error. The gap comes from the difference between device-level CMRR and system-level CMRR: layouts, returns, long traces and cable routing all turn common-mode disturbances into extra differential error.

A current-sense amplifier that looks perfect on a lab bench with short wiring can behave very differently once it is wired into a motor drive, battery pack or server backplane. Long loops, noisy ground returns and mixed reference points give common-mode disturbances more “leverage” to appear at the output, even though the silicon itself has not changed.

When a measurement is off by a few percent, it is tempting to blame the IC. In practice, you should first suspect connection and loop topology: where the shunt sits in the power loop, how the sense nodes are tapped and where the returns are tied together. Once those are under control, the amplifier’s specified CMRR can actually show up at system level.

• Device-level CMRR: the rejection measured between input and output of the IC itself under controlled test fixtures.
• System-level CMRR: the effective rejection after including shunt location, routing, returns, cable harness and grounding strategy.

Two recurring patterns show up in failing designs. First, a low-side shunt is placed deep in the power return so that the “measurement ground” rides on large load currents. Second, differential inputs are routed along different paths, so that common-mode noise couples more strongly into one side than the other and appears as extra differential offset.

A useful mental model is to treat the system as having a residual common-mode gain. The differential error at the output is approximately:  VERR ≈ VCM-SWING × GCM,SYS, where GCM,SYS is dominated by layout and grounding, not by the amplifier data sheet.

Common-Mode Error Mechanisms in Real Layouts

Once the basic current-sense topology is chosen, the dominant error mechanisms are usually geometric: where the shunt sits in the power path, how the sense nodes are tapped, how the return paths close and how the differential traces are routed. Each mechanism gives common-mode noise a specific “entry point” into the differential signal.

This section walks through four failure patterns that repeatedly show up on real boards: shunt and sense node misplacement, contaminated return paths, asymmetric differential pairs and long inductive loops near noisy conductors. Recognising these patterns makes it easier to diagnose whether an error is layout-driven rather than silicon-limited.

Shunt & Sense Node Misplacement

A classic trap is to drop a low-side shunt into the main return path and then take “sense” connections from convenient ground points instead of from the true shunt terminals. The measurement now includes voltage drops from other load currents sharing the same copper, so any change in load pattern moves the reading even if the shunt current has not changed.

Kelvin sense only works when both sense conductors run directly from the amplifier to the physical shunt pads. If one sense line is taken from the pad and the other from a wide ground pour several centimetres away, the amplifier sees “shunt plus unknown return impedance” rather than just the intended resistor.

Return Path Contamination

When measurement ground and power ground are merged without a clear star point, large load currents can roam across the same copper that the sense amplifier uses as its reference. Common-impedance coupling converts those shared voltage drops into apparent signal changes, especially under load transients or PWM operation.

Remote reference points on a backplane, chassis or shield are also risky. Their potential can shift by tens or hundreds of millivolts relative to the local electronics during surge, ESD or motor events, effectively injecting a slow or fast common-mode disturbance into every channel that references them.

Differential Pair Asymmetry

A differential input only delivers its rated CMRR when both legs see nearly identical impedance, coupling and geometry. In practice, one trace may be longer, cross more splits in the reference plane or run closer to a switching node than the other. Each asymmetry lets common-mode noise couple more strongly into one side.

Over a backplane, for example, it is common to route one sense leg around a connector cut-out while the other takes a shorter, cleaner path. The resulting skew, extra via stack and plane transitions are enough to erode tens of decibels of effective CMRR at the frequencies where the system is most noisy.

Long Cable & Inductive Loops

Long runs of sense wiring and large loop areas around the shunt give external magnetic fields room to work. Motor phase cables, high-current busbars and transformer leads all produce time-varying fields that can thread the measurement loop and translate into extra differential voltage.

On distributed systems, a good starting point is to trace the entire sense loop from one amplifier input, through the shunt and back to the other input, making sure that the loop area is minimised and that the pair is tightly coupled. If the loop passes close to PWM nodes, long parallel segments of power conductors or large apertures in the reference planes, common-mode coupling will be much worse.

Star & Kelvin Returns for Current / Voltage Sensing

Once the main current-sense topology is chosen, the next task is to decide where measurement returns meet power returns. A good star or Kelvin scheme isolates high-current loops from measurement loops so that the reference for each amplifier or ADC is set by the shunt and the sense nodes, not by whatever happens to be flowing through the ground copper.

This section focuses on four practical patterns: star grounding for low-side shunts, true Kelvin routing for high-side shunts, multi-channel star schemes for power monitors and ADCs, and remote-sense returns for long cables and drop compensation. Each pattern answers the question “where should the measurement reference really be taken?” for a different class of design.

Star Ground for Low-Side Shunt

In a well-behaved low-side configuration, the high-current loop is closed locally between the supply, load and shunt, and the sense amplifier references only the “clean” end of the shunt. The measurement ground does not sit somewhere in the middle of a power return flood; it fans out as a relatively light trace from the shunt terminal to the amplifier or ADC and returns to a clearly defined star point.

All measurement currents should flow in their own branch rather than sharing copper with unrelated load currents. When the shunt, amplifier and star ground are arranged this way, common-impedance coupling is minimised and the system-level CMRR is limited mainly by the silicon and by parasitics around the shunt itself, not by arbitrary voltage drops in the ground network.

Kelvin Sense for High-Side Shunt

High-side shunts sit on a noisy supply rail rather than at ground, but the same principles apply. Each shunt terminal should have its own dedicated sense trace running directly to the amplifier inputs. These traces should be narrow, closely coupled and kept away from the heavy supply copper so that they do not acquire extra drop or field coupling from the power path.

Avoid sharing vias between sense traces and the high-current rail, and avoid running Kelvin traces through the middle of switching or surge regions. On devices that monitor several high-side shunts, plan whether the shared reference is taken at the IC or at a local star near the shunts, and keep the Kelvin network looking like a deliberate star or comb rather than a random daisy-chain through power copper.

Multi-Channel Star for Power Monitors & ADCs

When a single power monitor or ADC observes several currents and voltages, its analog ground pin is usually the most sensible star point for measurement returns. Each channel’s sense return can be brought back to that node with a modest, well-controlled trace, while high-current returns are closed locally near each source or load instead of converging under the IC.

In practice, it is often helpful to build a two-level structure: small local stars for related rails that are then tied into a global AGND star at the monitor or ADC. The goal is to ensure that changes in one rail’s load current do not appreciably move the reference potential seen by the other measurement channels sharing the same device.

Remote Sense & Drop Compensation

Remote sensing and cable-drop compensation only work properly when both sense conductors originate at the load. A “half-remote” scheme that brings back only a positive sense line while leaving the negative reference at the regulator or monitor turns every milliohm in the cable and return path into an uncontrolled measurement error.

A clean remote-sense topology pulls a tightly coupled pair from the load terminals back to the controller, keeping them away from high dv/dt and high di/dt conductors. The regulator or monitor then uses the differential voltage at the load as its reference, so that line loss and many common-mode disturbances cancel rather than being interpreted as changes in the intended output voltage.

Long-Trace & Loop-Inductance Control

Even with good star and Kelvin practices, long distances between shunt and amplifier or between load and controller can leave large loop areas exposed to external fields. Identifying and shrinking these loops is just as important as choosing the right ICs, especially in motor drives, server backplanes and distributed battery systems where high di/dt and dv/dt are unavoidable.

The following techniques focus on geometry: spotting large loops, routing long sense runs as tightly coupled pairs, using planes and shields to provide close return paths and, when board-level routing is no longer sufficient, moving the sensitive parts of the loop into twisted pairs or shielded cables.

Identifying Large Loops

A simple way to diagnose susceptibility is to trace the full current and sense loops directly on the layout. For the power path, follow the route from the source through the load and back to the source; for the measurement path, follow the route from one amplifier input through the shunt and back to the other input. The larger these closed shapes are, the more flux they collect from nearby magnetic fields.

Long, skinny loops that wander across several board regions or across different reference planes are especially vulnerable. They also tend to be hard to spot if you only look at individual nets instead of thinking in terms of complete current paths, so it is worth explicitly sketching these loops during layout reviews.

Routing Strategies for Long Runs

When the shunt and amplifier cannot be close together, route the sense lines as a tightly coupled differential pair over a solid reference plane. Keep the pair on the same layer as much as possible, and avoid running it in long parallel segments next to switching nodes, motor phases or other high-slew-rate conductors that can drive common-mode noise into the loop.

When a layer change is unavoidable, move both traces together with adjacent vias and keep the transition near a continuous reference plane. Do not let one leg of the pair take a scenic route with extra length and via stacks while the other leg stays short and clean; that asymmetry effectively increases the loop’s sensitivity to both electric and magnetic fields.

Using Planes & Shields

Continuous ground or reference planes provide a close return path under the sense pair, shrinking the effective loop area. Placing the pair one or two dielectric layers away from a solid plane is usually a better choice than routing it on an outer layer above a patchwork of copper islands and plane splits.

In particularly noisy regions, guard traces or short copper shields tied to the same reference can reduce capacitive coupling into the sense pair. The shields themselves must not form large, poorly controlled loops; they should be stitched into the underlying plane with short, frequent vias rather than left floating or tied at only one distant corner.

When to Consider Cable & Twisted Pair

At some distance, it becomes more practical to move the sensitive part of the measurement loop off the PCB entirely and into a cable. Twisted pairs provide a balanced, tightly coupled path for differential sensing, while shielded cables add an extra barrier against aggressive EMI in environments such as motor cabinets, outdoor battery enclosures or long feeder runs between racks.

The decision to use twisted or shielded cabling should be based on the required measurement bandwidth, the dominant noise sources and the overall CMRR and EMC targets. In many high-noise systems, a short, robust connection from the shunt to a small local front-end, followed by a digital or low-impedance link back to the main controller, is far easier to stabilise than a very long analog sense loop on the main board.

Layout Playbook for High-CMRR Sensing

This playbook collects the practical layout rules that most strongly affect common-mode rejection and grounding. It is written so that you can paste it directly into design-review checklists and layout guidelines without turning it into a full, general-purpose PCB checklist. The focus is strictly on current-sense paths, star and Kelvin returns and the geometry of the sense loops.

Do & Don’t for CM & Grounding

Use the following points as review items when checking schematics and layouts for high-CMRR current and voltage sensing. Each pair contrasts a recommended practice with a pattern that typically degrades system-level CMRR.

Small- vs Large-System Patterns

The same CM and grounding principles apply to both small boards and large systems, but the way you implement them changes with scale. It is easier to achieve textbook star and Kelvin layouts on compact PCBs than on backplanes, motor cabinets or distributed battery enclosures.

Small boards (short power paths, single motor or bus)

• Shunts, sense amplifiers and ADCs can be placed close together, making true Kelvin routing straightforward.
• A single AGND star near the monitor is often sufficient to keep measurement and power returns separated.
• Continuous planes are easier to maintain, and loop areas can be kept small with modest placement discipline.

Large systems (backplanes, motor cabinets, battery enclosures)

• Star points become hierarchical: local stars on power or sense cards tie into a higher-level system ground map.
• Signal ground, power ground and chassis / protective earth need an explicit topology instead of a single “GND”.
• Cable entries, connectors and shields must be planned so that measurement references stay local to the front-end.
• In high-noise environments, it is often better to put a small front-end near the shunt and move data digitally rather than running very long analog sense loops.

Verification Tips for CM & Grounding

Layout intent should be backed up by measurement. A few simple oscilloscope checks and a basic system-level CMRR experiment can confirm whether the implemented star and Kelvin schemes are doing their job.

Using a scope to observe the measurement reference

1. Connect a differential probe (or two channels in A−B mode) between the intended measurement reference node (for example the ADC AGND star) and a well-defined system reference such as the main supply return or chassis ground.
2. Exercise the system with load steps, PWM activity, motor start/stop or other worst-case conditions and observe how many millivolts of movement appear at the measurement reference.
3. Large, fast excursions indicate that load currents are still sharing impedance with the measurement reference, and that the system-level CMRR will be limited regardless of the amplifier data sheet.

A simple system-level CMRR experiment

1. Configure the current-sense or voltage-sense path so that its nominal differential input is close to zero (for example, by shorting the shunt or tying both inputs together through a small resistor).
2. Apply a controlled common-mode step within the allowed input range (for example, by moving both inputs together by a few hundred millivolts or several volts, depending on the device).
3. Measure the resulting residual change at the output, ΔV_OUT, and compare it to the applied common-mode step, ΔV_CM, to estimate a system-level CMRR: CMRR_SYS ≈ 20·log10(ΔV_CM / ΔV_OUT).
4. Repeat the test at frequencies of interest (for example step edges, PWM rates or disturbance bandwidths) to see whether the layout meets the CMRR targets under realistic conditions.

Cross-Page Hooks & BOM / Spec Fields

Common-mode and grounding behaviour is often left implicit in system requirements and BOMs. This section converts the key layout and topology concepts from this page into concrete fields that can be written into specifications, design checklists and BOM comments so that purchasing, layout and system engineers all work to the same expectations.

Recommended BOM & Spec Fields for CM & Grounding

• System-level CMRR requirement: “Required measurement CMRR at system level ≥ X dB over [frequency range]” — clarifies that the target applies to the entire signal chain, not only the IC data sheet.
• Sense return topology: “Sense returns shall be Kelvin-connected to shunt terminals or to the ADC / monitor AGND star point; shared power-ground pours shall not be used as sense returns.”
• Remote sense completeness: “Remote sense shall use both positive and negative sense conductors from the load terminals; ‘half remote’ schemes with a local negative reference are not permitted.”
• Differential trace matching: “Differential sense traces shall be routed as matched pairs over a continuous reference plane with maximum skew ≤ Y mm and length mismatch ≤ Z % across the full route.”
• Sense loop area constraint: “Maximum allowed loop area for sense circuits (from amplifier inputs through the shunt and back) shall be ≤ Z cm²; loop geometry shall be reviewed explicitly in layout sign-off.”
• Ground-domain mapping: “Measurement AGND, power PGND and chassis / PE shall follow the grounding map in document [ID/link]; deviations require design review approval.”
• Cable and connector guidance (where applicable): “For off-board sensing, twisted pairs or shielded cables shall be used for sense lines; shield terminations and reference connections shall follow the system EMC / grounding guideline [ID/link].”

Example Parts & Why CM / Grounding Choices Matter

The following devices illustrate how different classes of current and power monitors depend on the CM and grounding practices described on this page. They are not a complete selection guide, but they show what kinds of notes and constraints belong in the specification when these devices are used.

• Low-side zero-drift current-sense amplifiers (for example, devices in the INA21x / INA19x class or similar): These parts offer very high device-level CMRR and microvolt-level offsets, but only if their low-side references are tied to a clean star point at the shunt. BOM notes should call out Kelvin returns on both shunt pads and a dedicated measurement ground branch to the device AGND.
• High-side current-sense amplifiers for PWM environments (for example, motor-bridge sense amplifiers such as INA240-class or AD8418-class devices): Their data sheets often emphasise high CMRR around the PWM frequency, but require short, paired Kelvin traces from the shunt pads and careful separation from half-bridge switching nodes. Specs should explicitly require matched differential routing and maximum loop area around the shunt.
• Isolated ΣΔ or isolated current-sense front-ends (for example, parts in the ADuM77xx or AMC13xx families): These devices depend on a compact primary-side measurement loop and a well-defined secondary AGND domain. BOM and layout guidance should state how primary sense returns are closed locally, how the isolation barrier is referenced on each side and how the secondary AGND star connects into the wider system ground map.
• Multi-channel power monitors / ADCs with integrated calculations (for example, devices similar to INA226/INA229, LTC2947 or MAX344xx classes): When several rails share one monitor, the AGND pin effectively becomes the measurement star for all channels. Documentation should require per-channel Kelvin sense returns and prohibit routing high-current returns under the monitor package to avoid cross-coupling between channels.
• Controllers with remote-sense inputs for bus regulation (for example, digital power controllers and PMBus regulators with VSENSE+/VSENSE− pairs): Their performance depends on a complete remote-sense pair from the load terminals. Specs should forbid using chassis or cable shields as sense returns and should state the maximum allowed resistance and loop area in the sense pair to maintain regulation accuracy and dynamic response.

In detailed application pages such as motor phase current sensing, BMS current monitoring or server-rail power monitors, these generic CM and grounding fields can be extended into full BOM and procurement notes, including rail definitions, accuracy targets and specific rail-by-rail constraints. This page provides the shared vocabulary and baseline requirements so that those application-specific BOMs do not have to re-explain the same CM and grounding principles.

FAQs × 12: Common-Mode & Grounding