What this page solves for the DFIG rotor-side converter

This page focuses on the electrical and control implementation of the rotor-side converter in a doubly-fed induction generator (DFIG) wind turbine. It explains how the rotor-side converter injects controlled currents into the rotor to decouple mechanical speed from grid frequency, enable extended speed range, and support active and reactive power control under changing wind conditions.

The content highlights how isolated current and voltage sensing, robust gate drivers for IGBT or SiC switches, and well-defined protection schemes work together to keep rotor slip stable. This stability is essential to avoid overcurrent in stator windings, prevent torsional oscillation of the drive train, and meet grid-code requirements during low-voltage ride-through and other grid disturbances.

The page also shows how thermal management, fault detection, and event reporting are embedded directly into the rotor-side converter hardware. Appropriate thermal sensing, desaturation detection, overcurrent thresholds, and fault latching are mapped to IC roles so that nacelle-level controllers and SCADA systems receive actionable and time-aligned diagnostics instead of opaque fault codes.

To avoid overlap with other pages in the Renewable Energy / Solar & Wind tree, this page deliberately limits its scope and passes system-level aspects to dedicated sibling topics:

• AC-side grid synchronization, LCL filters, and grid-code protection (UV/OV/OF/ROCOF) are covered in the DFIG Grid-Side Converter page.
• Mechanical safety chains, emergency stop loops, and pitch interlocks are covered in the Pitch/Yaw Safety Chain page.
• Complete SCADA architectures, system-of-events records, and remote diagnostics are covered in the Nacelle Controller & SCADA Gateway page.
• Vibration, strain, and structural health monitoring for hub, blades, and tower are covered in the Hub Sensing & Health Monitoring and Blade Load & SHM pages.

The goal is to provide a single, deep technical reference on rotor-side converter hardware and IC selection, while relying on these sibling pages for the rest of the wind turbine system.

DFIG architecture recap and rotor-side responsibilities

In a doubly-fed induction generator, the stator is connected directly to the AC grid while the rotor is connected to the grid through a back-to-back power converter. The back-to-back converter consists of the rotor-side converter, a shared DC link, and the grid-side converter. The stator delivers most of the active power, while the converters handle only a fraction of the total power but have a decisive impact on dynamic performance and grid-code compliance.

The rotor-side converter operates at the slip frequency that results from the difference between electrical synchronous speed, dictated by the grid, and the mechanical speed of the turbine shaft. By injecting controlled currents at this slip frequency, the converter shapes stator currents, extends the speed range around synchronous speed, and provides reactive power support. The grid-side converter maintains DC-link voltage and interfaces the system with the external grid but is covered separately.

Control objectives for the rotor-side converter typically include keeping stator currents within thermal limits, regulating active power according to wind conditions and turbine-level commands, providing reactive power according to grid-code requirements, and limiting rotor and stator currents during faults and low-voltage ride-through events. These objectives translate directly into requirements for isolated sensing, gate drivers, and overcurrent and overvoltage protections inside the rotor-side converter hardware.

Within this architecture, the rotor-side converter has a clear responsibility boundary:

• Generate the commanded rotor currents in dq coordinates, based on references from the control algorithm.
• Provide reliable rotor current and voltage feedback through isolated sensing chains with adequate bandwidth.
• Detect and react to overcurrent, desaturation, and overvoltage events at the power device level.
• Offer well-defined status, fault, and thermal information to the nacelle controller and SCADA systems.

AC-side synchronization, LCL filter design, and grid protection logic belong to the grid-side converter and are intentionally not expanded here. The rest of this page takes this DFIG architecture as given and dives into sensing, gate driving, and protections specific to the rotor-side converter.

Rotor-side converter control objectives

The rotor-side converter in a DFIG wind turbine closes fast current-control loops in dq coordinates around the rotor windings. By regulating rotor currents in a field-oriented reference frame, the controller decouples flux-producing and torque-producing components, allowing precise control of stator currents, active power, and reactive power over a wide speed range around synchronous speed.

Field-oriented control requires a reliable estimate of the flux angle and slip angle between mechanical speed and grid-synchronous speed. Rotor currents are controlled at the slip frequency, so the control algorithm must continuously align the dq reference frame with the stator flux or grid voltage vector. Any noise, jitter, or delay in current and voltage feedback directly degrades this alignment and can excite torsional oscillations or cause oscillatory stator currents under changing wind conditions.

Under weak grids and low-voltage ride-through (LVRT) events, the rotor-side converter must limit stator and rotor currents within milliseconds. Control actions reduce current references and adjust active and reactive power targets, while device-level protections such as desaturation detection, fast overcurrent comparators, and soft shutdown inside the gate drivers act as a second line of defense. The sensing and actuation chain must remain linear and unsaturated during LVRT so that current limiters and protection thresholds operate as intended.

The converter also enforces rotor overvoltage and overcurrent limits and coordinates with thermal management. Multiple temperature channels monitor power modules, cold plates, and cabinet air, feeding derating logic that reduces allowable current and power setpoints before junction temperatures approach critical limits. These control objectives translate into concrete requirements on isolated current and voltage sensing, ADCs, gate drivers, and thermal-monitoring ICs, which are detailed in the following sections.

Isolated current and voltage sensing chain

The rotor-side converter depends on accurate, low-latency measurements of rotor currents and voltages under high dv/dt and large common-mode swings. A typical sensing chain converts phase currents and voltages into low-level signals, passes them through isolation devices, and then digitizes them for the controller. The resulting feedback must support control-loop bandwidths in the 10 to 20 kHz range without excessive phase lag or jitter, while maintaining safety isolation levels compatible with the DFIG insulation system.

For rotor current sensing, isolated sigma-delta modulators, Rogowski-coil front-ends, and shunt resistors with isolated amplifiers are common options. Isolated sigma-delta modulators provide high resolution and strong common-mode rejection with a digital bitstream that is filtered in the controller, making them well suited for precise dq current control. Rogowski-based front-ends offer very wide bandwidth and are attractive for protection and transient diagnostics, while shunt plus isolated amplifier solutions provide a cost-effective option for auxiliary or backup current channels when power dissipation and dv/dt can be kept under control.

Rotor voltage sensing typically uses high-voltage divider networks combined with isolated amplifiers. The divider must withstand the maximum rotor terminal voltage and expected transient overvoltages, while still presenting a suitable signal level and impedance to the amplifier. RC networks and layout are tuned to filter switching spikes without compromising the bandwidth required for flux observers, slip estimation, and fault detection. High isolation ratings and robust dv/dt performance are essential to avoid false trips and measurement corruption.

Across both current and voltage channels, the analog front-end must deliver common-mode rejection above 100 dB, withstand isolation voltages on the order of ±3200 V or more depending on the system, and support the control-loop bandwidth without introducing unpredictable delay. Low-jitter sampling and tight synchronization to PWM edges are especially important for dq control. Unlike grid-side sensing, which focuses on line-frequency quantities for LCL control and power-factor correction, rotor-side sensing operates at slip frequency and in a more aggressive dv/dt environment, so the isolation and noise requirements are different and are addressed specifically in this rotor-side context.

Gate driver requirements for the rotor-side converter

Gate drivers in a DFIG rotor-side converter operate close to high-voltage power modules and must provide reinforced isolation, fast fault protection, and robust control of IGBT or SiC switches. The insulation rating typically lies in the 5 to 6 kV RMS range so that the driver withstands long-term electrical stress and meets creepage, clearance, and pollution requirements inside nacelle installations. Within this isolation barrier, desaturation detection, overcurrent comparators, undervoltage lockout, Miller clamps, and active short-circuit responses are combined to keep devices inside their safe operating area during grid faults and transient events.

When SiC power modules are used on the rotor side, the gate driver must tolerate dv/dt levels of tens of kilovolts per microsecond and maintain a high common-mode transient immunity. High dv/dt and long cable runs inside the turbine structure increase the risk of false triggering and EMI coupling into control circuits. Gate drivers therefore require strong input filtering, well-defined thresholds, and options for negative gate turn-off voltages in the range of approximately −2 V to −6 V to suppress unwanted turn-on during fast transitions. Layout and return-path control around the driver and power module are equally important to limit loop inductance and noise injection.

Isolated gate-drive power supplies must support bipolar outputs where needed, handle load transients during LVRT, and exhibit predictable behaviour during brown-out conditions. When auxiliary supplies sag, drivers are expected to pull gates to a safe off state and to keep devices disabled while supply levels remain in the undervoltage region. Soft turn-on and soft turn-off options, combined with separate turn-on and turn-off resistors, allow switching loss, EMI, and overvoltage stress to be balanced. These requirements shape the selection of gate driver ICs, isolated supplies, and protection components for the rotor-side converter.

Synchronous and phase control AFEs for the rotor-side converter

Rotor-side control in a DFIG depends on an internal synchronisation mechanism that tracks flux and slip angle rather than directly tracking the AC grid as a grid-side PLL does. The control system must estimate the relationship between mechanical speed, stator flux, and rotor electrical angle so that dq current control aligns correctly with the magnetic field. This requires clean phase and zero-crossing information, as well as stable voltage and current measurements, to feed observers and rotor-side tracking algorithms.

Analog front-ends for synchronisation therefore include zero-crossing detectors, phase-sequence monitors, and high-speed comparators that generate timing signals with low jitter. These timing signals help the controller derive slip frequency and slip angle and validate that the phase sequence matches the assumed ordering in the control software. At the same time, low-noise voltage and current sensing channels support flux observers and model-based estimation, where offset, gain drift, and channel-to-channel mismatch can degrade tracking accuracy over time.

The rotor-side synchronisation chain is distinct from the AC grid PLL used on the grid-side converter. Grid-side PLLs track grid voltage for LCL control and power-factor regulation, whereas rotor-side synchronisation focuses on internal flux orientation and slip management. Information exchange between rotor-side and grid-side control may still include status, slip frequency, and power targets, but the implementation details of the grid PLL remain on the grid-side converter page. This section concentrates on AFE requirements inside the rotor-side converter that support robust internal synchronisation.

Protection and fault-map for the rotor-side converter

The rotor-side converter in a DFIG wind turbine requires a structured fault-map that separates hard faults at device level from system-level and control-level faults. Typical hardware faults include desaturation events that indicate short circuits in IGBT or SiC modules, fast overcurrent conditions, rotor terminal overvoltage, and thermal shutdowns based on IGBT and cold-plate sensors. Desaturation and severe overcurrent events are handled first by local gate-driver protection, which performs soft shutdown and flags the rotor-side controller for immediate converter shutdown and high-priority fault signalling to the nacelle controller.

Beyond these hard faults, the rotor-side converter monitors unbalanced rotor currents, moderate overloads, and overvoltage conditions at the rotor terminals. Sustained negative-sequence current components or large phase imbalances suggest winding, cabling, or sensor problems, and are mapped to derating and maintenance-level alarms. Rotor-side monitoring of the DC-link voltage uses the same measurements as the grid-side converter, but primary detection and crowbar or brake-chopper strategies remain on the grid-side converter page. Rotor logic consumes DC-link status to reduce rotor current and power references when limits are approached, avoiding duplicated protection implementations.

Control-level faults cover flux observer divergence, slip runaway, and gate-driver communication failures. Diverging flux observers or inconsistent slip estimates indicate loss of confidence in the internal machine model and trigger controlled derating or a switch to reduced-performance control modes. Slip runaway, where slip angle and frequency depart significantly from expected values, is treated as a high-severity event because it can lead to oscillatory stator currents and mechanical stress. Communication faults between the rotor-side controller and gate-driver boards, or loss of heartbeat and CRC errors on isolated links, are mapped to conservative actions such as disabling affected legs and issuing faults that require operator acknowledgement.

All rotor-side faults are classified into immediate shutdown, derating and warning, or maintenance and advisory categories before being sent to the nacelle controller. Immediate shutdown faults include desaturation trips, hard short circuits, severe rotor overvoltage, loss of critical gate-driver communication, and confirmed slip runaway. Derating and warning faults include repeated overloads, thermal warnings, moderate current imbalance, and observer divergence with limited impact on stability. Maintenance and advisory flags cover slower trends such as increasing imbalance or sensor drift. This fault-map allows the nacelle controller and SCADA system to align rotor-side protection behaviour with overall turbine safety and availability policies.

Thermal management for the rotor-side converter

Thermal management on the rotor-side converter starts with a clear view of the heat path from device junctions through the module case and cold plate into the nacelle environment. Junction temperature cannot be measured directly, so case temperature sensors and loss models for IGBT or SiC devices are used to estimate junction temperature. Power-loss estimates based on current, DC-link voltage, switching frequency, and modulation patterns, combined with the device and system thermal impedance, provide a real-time estimate of junction temperature that is compared against manufacturer limits and design margins.

Multiple NTC or RTD channels monitor the temperature of power modules, cold-plate inlets and outlets, key airflow locations, and the nacelle cabinet air. These temperature measurements do not require high bandwidth but must offer consistent accuracy and low drift over time because they affect junction estimates and derating thresholds. Channel-to-channel matching is important when correlating module case temperatures with cold-plate temperatures to detect degraded thermal interfaces, blocked flow, or partial loss of cooling on selected legs of the converter.

The rotor-side converter typically shares cooling resources with the grid-side converter and other high-power equipment. In liquid-cooled systems, inlet and outlet temperatures and flow-switch or flow-sensor signals from the shared coolant loop are used to adjust derating behaviour and to trigger protective actions if cooling capacity degrades. In forced-air-cooled designs, nacelle air temperature, duct temperatures, and fan status signals are taken into account. These interfaces allow rotor-side control to distinguish between local thermal overload and system-level cooling issues when applying power reductions or issuing faults.

Thermal derating curves map estimated junction or case temperatures, and in some cases coolant or ambient temperature, to allowable current and power limits. Within a green region, full output is permitted; within a yellow region, the rotor-side converter progressively reduces current and power references to keep junction temperatures below critical limits; and within a red region, overtemperature faults are asserted and converter shutdown is initiated. These curves are implemented as tables or piecewise-linear functions in the controller and may be updated based on field data or service recommendations. The resulting cooling demand and derating requests are exported to the inverter thermal and fan-control subsystem, which drives fans and pumps and reports cooling-system faults. Detailed fan and pump driver topologies and control loops are documented on the “Inverter Thermal and Fan Control” page.

IC selection and design checklist for the rotor-side converter

Integrated circuits in a DFIG rotor-side converter are selected around functional roles that support high-bandwidth current control, robust isolation, gate-drive protection, and reliable synchronisation. Isolation current sensing typically uses sigma-delta modulators placed close to shunt resistors on the high-voltage side, providing bitstreams across the isolation barrier to the controller. Isolated amplifiers are used for voltage sensing or cost-optimised current measurements where moderate bandwidth is sufficient. Digital isolators transfer PWM, fault, and configuration signals between the controller and gate-driver boards and must withstand high dv/dt environments without false triggering.

IGBT and SiC gate drivers are chosen based on reinforced isolation rating, desaturation detection, adjustable blanking, Miller clamp capability, undervoltage lockout thresholds, and active short-circuit response. High-speed ADCs inside the controller or as external devices provide multi-channel sampling for currents, voltages, and temperatures, with synchronised sampling and adequate resolution for dq control and diagnostics. Angle and speed measurement front-ends interface to encoders or resolvers and provide robust mechanical speed and position data for flux and slip estimation. Hot-swap and eFuse devices protect auxiliary supplies feeding control and gate-driver circuitry, limiting inrush and isolating faults on individual boards.

IC roles mapping for the rotor-side converter

• Sigma-delta modulators for isolation current sensing – placed next to shunt resistors on the rotor-side legs, offering high CMTI, matched group delay, and sufficient modulator frequency to support 10–20 kHz current control loops after digital decimation.
• Isolated amplifiers – used with high-voltage dividers and selected for high CMRR, linearity, and reinforced isolation. These devices provide rotor voltage and auxiliary measurements where continuous-time waveforms are beneficial.
• Digital isolators – provide galvanic isolation for PWM, enable, fault, and configuration signals between controller and gate-driver boards. Channel-to-channel skew and propagation delay matching are checked so that complementary gate signals remain symmetrical under high dv/dt stress.
• IGBT / SiC gate drivers – integrate desaturation detection with adjustable blanking time, undervoltage lockout, Miller clamp, and support for negative gate turn-off voltages. Devices with high CMTI and active short-circuit handling are preferred for SiC-based rotor converters.
• High-speed ADCs – internal or external ADCs capture multi-channel currents, voltages, and temperatures with synchronised sampling. Conversion timing is aligned with PWM cycles so that dq transformations and observers see consistent data.
• Angle and speed measurement front-ends – interface to EnDat, BiSS, incremental encoders, or resolvers, delivering validated speed and angle information to the rotor-side control loops and slip estimator.
• Hot-swap and eFuse devices for auxiliary power – manage inrush into control and driver boards, enforce current limits, and report FAULT status when auxiliary rails experience short circuits or severe overloads.

Rotor-side converter design checklist

• Control-loop bandwidth verified at 10–20 kHz – confirm that current and power loops achieve the target bandwidth with adequate phase margin, taking sigma-delta, ADC, and digital filter delays into account.
• Slip angle synchronisation stability – validate that rotor-side PLL and flux observers keep dq alignment and slip angle stable under wind-speed and grid-voltage disturbances, including recovery from transient loss of lock.
• Desaturation response time below 2 µs – include detection delay, blanking configuration, and gate-driver reaction so that short-circuit energy remains within the power-module capability.
• dv/dt immunity tested at maximum operating stress – perform switching tests with SiC or fast IGBTs at maximum voltage and current and confirm that sigma-delta modulators, isolated amplifiers, digital isolators, and gate drivers do not show false triggering or loss of communication.
• Gate-driver isolated PSU margin and brown-out behaviour – check that isolated gate-drive supplies maintain sufficient voltage margin over temperature and line variation and that brown-out events force a safe and prompt gate turn-off instead of leaving devices partially on.
• Rotor overvoltage clamp and coordination – verify the path for rotor overvoltage energy, including soft reduction of excitation, current limiting, and any clamp or crowbar elements, and ensure coordination with DC-link and grid-side protections.
• Thermal derating thresholds and hysteresis – ensure derating curves start at appropriate junction or case temperatures, apply suitable slopes, and include hysteresis that avoids excessive cycling under borderline conditions.
• SCADA and nacelle fault reporting interfaces – assign standardised fault codes, severity levels, and logging content for key rotor-side faults and confirm that these are presented consistently to the nacelle controller and SCADA or EMS systems.

Application examples for DFIG rotor-side converters

1. 2 MW turbine with SiC-based rotor converter for improved LVRT

A 2 MW onshore wind turbine originally used IGBT-based rotor-side converters that met only minimal low-voltage ride-through requirements. During deep voltage dips, short-circuit events and thermal stress on the rotor modules limited availability. A redesign introduced SiC-based rotor-side converter legs and upgraded the sensing and gate drive chain. Isolation current sensing was implemented with sigma-delta modulators such as the AMC1306 or AD7403 family devices mounted near shunt resistors. Rotor voltage sensing used isolated amplifiers in the class of AMC1302 or ISO224, providing high CMRR and reinforced isolation.

SiC gate drivers were selected from families such as UCC21710 or UCC21732 and comparable dual drivers, combining high CMTI ratings, desaturation detection, programmable blanking, Miller clamp, and support for negative gate turn-off voltages. Digital isolators of the ISO78xx or ADuM14xx class carried PWM and fault signals across the isolation barrier. After tuning the current-control loop to account for sigma-delta group delay and verifying dv/dt immunity, LVRT tests showed smoother rotor currents, lower torque ripple, and reduced desaturation events. Peak junction temperatures during LVRT sequences decreased by several degrees compared with the earlier IGBT design, improving reliability margin.

2. Rotor current imbalance detection using sigma-delta sensing and DSP

In another project, a fleet of DFIG turbines showed unexplained heating and vibration linked to rotor current imbalance. Conventional protection based on phase overcurrent thresholds did not reliably detect early-stage asymmetries. The rotor-side converter was upgraded with three synchronised sigma-delta current channels using modulators such as AD7401A or AMC1305-type devices, combined with a controller from the TI C2000 or Infineon AURIX families that offered sufficient processing headroom for sequence-component analysis.

The controller reconstructed phase currents from the sigma-delta bitstreams and computed negative-sequence components over sliding windows of a few hundred milliseconds. Digital isolators comparable to ISO774x or ADuM13x families were used for clock and data paths, and their propagation delay and CMTI were verified under worst-case dv/dt. When the calculated negative-sequence current exceeded a configured threshold for several windows, the system raised a rotor current imbalance warning rather than waiting for hard overcurrent trips. This approach enabled maintenance teams to locate winding and connection issues early and reduced the number of converter faults caused by long-term uncorrected asymmetries.

3. Reduced damage rate by upgrading gate drivers with faster DESAT response

A separate rotor-side converter platform experienced a higher-than-expected rate of power-module damage after short-circuit events. Analysis showed that the existing gate driver had limited desaturation detection speed and restricted configuration flexibility for blanking times. An engineering change replaced the gate driver with newer devices such as UCC217xx or similar 1ED / 2ED family gate drivers that offered shorter internal delay, programmable blanking, and active short-circuit control. The desaturation network, including the sense diode and blanking capacitor, was retuned to achieve sub-2 µs detection at the required short-circuit current.

Laboratory tests on representative short-circuit scenarios confirmed lower V_CE overshoot and reduced short-circuit energy. Field data collected after deployment showed that rotor-side short-circuit events still occurred due to cabling and connection issues, but most resulted in converter shutdown with reusable power modules rather than catastrophic failures. The upgrade turned a significant fraction of destructive events into recoverable desaturation faults and aligned real-world performance with the protection and fault-map strategy defined for the rotor-side converter.

FAQs about DFIG rotor-side converters

This FAQ section collects typical questions that appear when designing, validating, or retrofitting DFIG rotor-side converters. Each answer is written from a practical design perspective and links back to topics such as isolated sensing, PLL and slip control, gate-driver protection, thermal management, and fault reporting to nacelle controllers and SCADA systems.

1. Why do DFIG rotor-side converters use isolated sigma-delta current sensing instead of simple Hall sensors or non-isolated shunts?

DFIG rotor-side converters use isolated sigma-delta current sensing because the shunts sit at high potential and see fast dv/dt. Isolated modulators offer reinforced insulation, high CMTI and precise, matched delay for all phases. This combination keeps current loops stable while surviving switching noise and meeting safety isolation requirements.

2. What differentiates the rotor-side PLL and flux observer from the grid-side PLL in a DFIG system?

The rotor-side PLL and flux observer track machine flux and slip relative to the rotor, while the grid-side PLL locks directly to the grid voltage. Rotor PLL dynamics are tuned for current control and torque response, not protection relays. Separating both loops avoids conflicts between machine control and grid synchronisation tasks.

3. When does it make sense to migrate a DFIG rotor-side converter from IGBT-based legs to SiC devices?

Migration from IGBT to SiC on the rotor-side converter is justified when switching losses or thermal margins limit power or LVRT performance. SiC devices enable higher switching frequency, better efficiency and lower thermal stress, but demand higher CMTI, faster drivers and careful dv/dt management. Retrofit designs should reassess insulation, snubbers and EMI filters.

4. How can slip runaway be detected and distinguished from normal transient behaviour in a DFIG rotor-side controller?

Slip runaway is detected by comparing estimated slip angle and frequency against commanded values and against measured electrical quantities. Persistent deviation, combined with rising negative-sequence current or torque oscillations, indicates loss of synchronism rather than a transient. Protection logic masks short disturbances but latches confirmed runaway events as high-severity rotor-side faults.

5. How should DESAT protection be dimensioned for 690 V wind-turbine systems using IGBT or SiC modules?

DESAT protection for 690 V wind-turbine systems starts from the power module short-circuit ratings and maximum DC-link voltage. Sense resistor, diode and blanking capacitor are chosen so desaturation triggers within a few microseconds at the desired fault current. Tests must validate energy dissipation, Vce overshoot and coordination with upstream breakers.

6. What sampling frequency and ADC resolution are recommended for rotor-side current and voltage loops in a DFIG converter?

Recommended sampling frequency for rotor-side current and voltage loops is typically several times the control-loop bandwidth, often tens of kilohertz. Effective resolution of 12 to 16 bits is used so observers, imbalance detection and protection functions see accurate waveforms. Synchronised sampling aligned with PWM edges keeps dq transformations and flux estimation consistent.

7. How should dv/dt immunity be tested for sigma-delta modulators, isolated amplifiers, and digital isolators in a DFIG rotor-side converter?

dv/dt immunity is verified by running switching tests at worst-case voltage, current and temperature while monitoring sigma-delta outputs, amplifier signals and isolated logic. Test cases include both normal PWM and fault conditions. The design is only accepted when no false desaturation trips, data corruption or communication loss occurs under the harshest edges.

8. How many temperature sensors are typically needed on a DFIG rotor-side converter, and where should they be placed?

A practical rotor-side design normally uses multiple temperature sensors: at least one per power module case, sensors on cold-plate inlet and outlet, and one or more nacelle air sensors. Additional sensors near hotspots in the airflow or busbars improve diagnostics. These measurements feed junction-temperature estimates and thermal derating logic.

9. How should rotor overvoltage protection be coordinated with DC-link and grid-side protections in a DFIG wind turbine?

Rotor overvoltage protection is coordinated with DC-link and grid-side protections by sharing measurements and defining clear priorities. Rotor-side control first reduces excitation and current references when thresholds are approached. If DC-link or grid-side limits are exceeded, crowbars or brake choppers act, and rotor-side logic follows the system-level trip or derating decision.

10. How should rotor-side faults be classified and reported to the nacelle controller and SCADA system?

Rotor-side faults are classified into immediate shutdown, derating and maintenance categories before being sent to the nacelle controller and SCADA. High-severity faults such as desaturation, severe rotor overvoltage or slip runaway trigger converter shutdown. Repeated overloads, imbalance or observer issues generate warnings and logs that guide predictive maintenance decisions.

11. What are the main design checks when retrofitting a legacy IGBT-based rotor-side converter with SiC modules?

Retrofitting a legacy IGBT-based rotor-side converter with SiC modules requires checking gate-driver capability, dv/dt immunity, insulation clearances and thermal margins. Gate drivers must support negative gate bias and faster desaturation response. Layout, snubbers and filters are reviewed to control overshoot and EMI, and cooling systems are validated against higher power density.

12. Which lab and HIL tests are essential before releasing a DFIG rotor-side converter to the field?

Essential tests before field release include short-circuit and DESAT timing validation, LVRT profiles, dv/dt robustness, thermal cycling and long-duration load runs. Hardware-in-the-loop tests exercise slip control, fault-map behaviour and communication with the nacelle controller and SCADA. The converter is only released once protection, control and logging behave as specified.