Fully-Differential Filters: Common-Mode Control for ADC Inputs
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Fully-differential filters shape the differential response while actively controlling the common-mode (VOCM/CMFB), so distortion, headroom, and ADC-interface behavior stay predictable on real boards. This page turns DM/CM budgeting into concrete design, verification, and IC-selection steps to prevent the most common “simulation OK, hardware fails” traps.
One-paragraph thesis: what this page delivers (and what it won’t)
Fully-differential filters shape the differential transfer while explicitly controlling common-mode (VOCM/CMFB), so distortion, headroom, and ADC interface behavior stay predictable.
The goal is not “a duplicated single-ended filter,” but a design where the differential path and the common-mode path are both engineered, budgeted, and verified.
What this page delivers
- DM/CM dual-path modeling: treat differential-mode (DM) shaping and common-mode (CM) control as two coupled budgets, so board results match simulation intent.
- Low-distortion + high-CMRR design hooks: symmetry, VOCM placement, CMFB stability, stage swing allocation, and mismatch control that directly move SFDR/THD.
- ADC front-end interface checklist: kickback isolation, settling/phase integrity, and measurement methods that avoid “false” improvements caused by probing imbalance.
Scope guardrails (to prevent topic overlap)
Covered here: fully-differential filter behavior, VOCM/CMFB control, DM↔CM coupling paths, and ADC-facing interface constraints.
- Not covered: full SE↔Differential conversion tutorial and FDA selection deep-dive (handled by the dedicated FDA converter page).
- Not covered: complete derivations of each filter family (MFB/SVF/biquad/notch, etc.). Those live on their own pages.
Definition and when it’s mandatory (not just “two copies of single-ended”)
Definition: two signals, two behaviors
A fully-differential filter is defined by its differential-mode shaping and its common-mode control. Both must be designed and verified because real boards introduce DM↔CM coupling through mismatch, parasitics, and load imbalance.
- HDM(s): differential in → differential out (sets magnitude/phase/Q for the intended signal).
- HCM(s): common-mode disturbances → common-mode behavior (and the practical leakage of CM into DM through asymmetry).
- VOCM: the output common-mode target that defines headroom and the operating point for CMFB and the ADC input window.
When a fully-differential filter is mandatory
Use a fully-differential filter when system success depends on predictable distortion, controlled common-mode behavior, or a differential ADC interface that must meet a defined common-mode window.
If two or more conditions below are true, fully-differential is usually the safer default.
- High dynamic performance target: SFDR/THD is a primary requirement, and 2nd-harmonic suppression matters in the system budget.
- Common-mode interference risk: long cables, ground potential differences, or strong switching noise make CMRR and CM handling critical.
- Differential ADC input window: the ADC specifies an allowed input common-mode range and benefits from a defined VOCM.
- Single-supply headroom pressure: maximum symmetric swing is needed without clipping or distortion near the rails.
When it is not worth the complexity
- Short traces, modest bandwidth, and distortion is not a key metric.
- Cost/power is the dominant constraint and the next stage is not a differential ADC or differential link.
- System error is dominated elsewhere (e.g., sensor physics or quantization), not by the analog front-end’s linearity/CM behavior.
Core principle: two loops, two budgets (DM vs CM)
Fully-differential filtering is governed by two coupled loops: the differential-mode path (DM) and the common-mode control (CM). Each requires its own budget and its own verification.
Many “simulation looks fine, PCB looks worse” failures are not DM mistakes; they are CM mistakes: the CM path was not modeled, not measured, or was unintentionally coupled into DM through mismatch, parasitics, layout, or load imbalance.
- Budget DM first: response, Q, noise, linearity, settling.
- Budget CM independently: VOCM accuracy/stability, CM swing, CMFB stability, CM→DM leakage.
- Then locate coupling: any mismatch/parasitic/layout/load/probing asymmetry becomes a conversion channel.
DM budget (what the differential signal must achieve)
- Magnitude/phase targets: passband ripple, fc, stopband needs, and any group-delay constraint.
- Q accuracy and drift: tolerance sensitivity (ratio errors) + finite loop gain/GBW induced shifts.
- In-band noise: integrated RMS noise mapped to SNR/ENOB at the ADC input.
- Linearity: THD/SFDR at defined amplitude, frequency, and load (not “typical only”).
- Settling: step response and recovery time to the required error band.
- Small-signal sweep: measure differential gain/phase (and compare to the intended transfer).
- Large-signal sweep: sweep amplitude and track harmonics to find the “swing hotspot” node.
- Side-to-side symmetry check: compare Vop and Von amplitude/phase; asymmetry is a DM/CM coupling indicator.
Pass criteria (template): |ΔGain| < X dB in passband, |ΔPhase| < Y°, THD/SFDR meets target at App and f, and settling error < Z within T.
CM budget (what must remain controlled even when DM looks perfect)
- VOCM accuracy & noise: DC error, ripple, and recovery under load/signal changes.
- CM swing headroom: ensure CM motion + DM swing never pushes either output into early clipping.
- CMFB stability: adequate phase margin with real load and decoupling; avoid ringing at VOCM.
- CM→DM conversion: quantify how much CM disturbance leaks into DM due to asymmetry.
- Load/decoupling coupling: CMFB sensitivity to supply/ground impedance and output loading imbalance.
- VOCM observation: measure VOCM ripple and step recovery during large-signal output and load change.
- CM injection check: introduce controlled CM disturbance (or emulate imbalance) and observe DM leakage.
- Imbalance sensitivity: deliberately skew load/probing to reveal conversion channels quickly.
Pass criteria (template): VOCM error < X mV, VOCM ripple < Y mVrms in band, CM step recovery < T without sustained ringing, and CM→DM leakage below the system CMRR/HD2 budget.
Minimal model (fast diagnosis without full simulations)
- DM model: an R/C network driven by finite open-loop gain/GBW and limited output drive. Expect additional phase shift and gain compression near the band edge and at high swing.
- CM model: CMFB approximated as a dominant pole loop, coupled to load/decoupling impedance. Expect VOCM ripple and recovery dynamics to shift with real PCB parasitics.
- Coupling channel: any asymmetry (component mismatch, parasitic C, routing, load/probing imbalance) converts CM errors into DM errors.
Topology patterns (concept-level): reusable fully-differential structures
These patterns focus on fully-differential implementation hooks: symmetry points, VOCM/CMFB nodes, swing hotspots, and CM→DM risk. They intentionally avoid full transfer-function derivations (handled by dedicated topology pages).
Use the patterns below to map an existing circuit to its most likely failure modes and the fastest verification checks.
Pattern A — Fully-differential MFB
- Matching focus: mirrored feedback pairs set both DM accuracy and CM→DM leakage.
- VOCM node: ensure common-mode reference impedance is low and symmetric.
- Swing hotspot: high-Q or high gain can overload one side first if asymmetry exists.
- Quick check: compare Vop vs Von amplitude/phase; any mismatch is a coupling clue.
Pattern B — FDA-based biquad (staged)
- Scaling: stage gain/Q allocation sets where distortion and clipping appear first.
- CM stacking: VOCM noise/impedance can accumulate across stages if decoupling is weak.
- Swing hotspot: intermediate nodes often clip earlier than the final output.
- Quick check: measure per-stage THD to locate the first non-linear stage.
Pattern C — Differential SVF concept (multi-output)
- CMFB burden: multiple outputs and integrator nodes amplify CM stability sensitivity.
- Headroom: integrator nodes can saturate early under single-supply constraints.
- CM→DM risk: small asymmetry produces large output imbalance near resonance.
- Quick check: sweep amplitude and watch VOCM ripple and node overdrive signs.
Pattern D — Passive RC + FDA buffer
- Concept: passive shaping reduces active-network distortion risk; the FDA enforces VOCM and drive.
- Tradeoffs: resistor thermal noise and impedance must be balanced against bandwidth and loading.
- Stability: buffer + load interaction still matters; add isolation where needed.
- Quick check: validate passive response first, then insert buffer and compare deltas.
Common-mode control: VOCM, CMFB, stability
VOCM is not “just a bias.” It defines headroom, sets the ADC interface common-mode, and strongly shapes even-order distortion when CM moves or becomes asymmetric.
- Output common-mode target: aligned to ADC input common-mode window and downstream constraints.
- Headroom allocation: CM motion + DM swing must keep both outputs away from rails and ICMR edges.
- Distortion sensitivity: VOCM error/ripple can re-enable even-order terms via CM→DM conversion.
- Source impedance & noise: VOCM impedance/decoupling defines how supply/ground noise becomes output CM.
- In-scope: VOCM/CMFB behavior that changes filter distortion, headroom, and ADC-facing stability.
- Out-of-scope: full SE↔Diff converter tutorials and full CMFB control-theory derivations.
CMFB engineering hooks (what usually breaks on real boards)
- Too slow: VOCM recovery is sluggish, CM swing grows, and HD2 often worsens under large-signal/load steps.
- Too fast: more sensitive to load/decoupling poles and imbalance, raising CM ringing/oscillation risk.
- Practical target: CMFB should cover dominant CM disturbances (load steps, sampling kick, supply ripple) while avoiding regions where output/load impedance introduces steep phase shift.
- Capacitance asymmetry: unequal parasitic C to ground/rails, ADC input C/ESD mismatch, or uneven routing.
- Return path pollution: VOCM/CM sense sharing noisy ground return or crossing discontinuities.
- Load imbalance: different loading on Vop vs Von (cable/probe/ADC network), creating conversion.
- Supply/clock injection: digital edges coupling into VOCM reference or CM sensing nodes.
Failure modes and fast verification (minimum test set)
- Quick check: observe VOCM pin and output CM: Vcm_out = (Vop+Von)/2.
- Likely cause: high VOCM source impedance, weak decoupling loop, return-path coupling.
- Fix direction: lower VOCM impedance, tighten VOCM decoupling loop, isolate CM sense return.
- Quick check: step the output/load and watch VOCM recovery for sustained ringing.
- Likely cause: CMFB interacting with load/decoupling poles, imbalance amplifying CM phase lag.
- Fix direction: rebalance loading, adjust isolation/comp, improve local decoupling and symmetry.
- Quick check: correlate HD2 with Vcm_out swing and with Vop/Von imbalance.
- Likely cause: asymmetry + CM motion creating CM→DM conversion; early clipping on one side.
- Fix direction: restore symmetry, reduce CM motion, re-center VOCM for headroom.
- Vop, Von (two channels with matched probing)
- Vdiff_out = (Vop − Von), Vcm_out = (Vop + Von)/2
- VOCM pin and nearby supply/ground ripple (to identify injection paths)
Pass criteria (template): VOCM error < X mV, VOCM ripple < Y mVrms in-band, CM step recovery < T without sustained ringing, and Vop/Von symmetry within the system imbalance budget.
Distortion & linearity in differential filters (actionable causes)
Differential filters can suppress even-order distortion when the two halves remain symmetric and the common-mode stays controlled. Any asymmetry or CM motion converts “clean” differential behavior into elevated HD2 and degraded SFDR.
- Symmetric impedance: matched R/C ratios and matched parasitic C/R on both sides.
- Balanced loading: equal load and probing on Vop and Von (ADC Cin networks included).
- Controlled CM: VOCM and CMFB stay in linear region with low ripple and stable recovery.
Primary distortion drivers (and the design moves that fix them)
- Symmetry move: use matched networks (C0G/NP0), mirrored placement, and equal trace environments.
- Conversion control: keep any “to ground/rail” parasitic capacitance balanced across both outputs.
- Expected symptom: HD2 rises early and tracks Vop/Von imbalance.
- Swing move: reduce per-stage swing or redistribute gain (stage scaling) to keep nodes away from rails.
- Drive move: add isolation where needed, avoid excessive capacitive load, and validate output current margin.
- Expected symptom: HD3 grows with amplitude; clipping signs appear first on one node/output.
- VOCM move: pick an ADC-friendly VOCM that centers output swing in the most linear region.
- CMFB move: reduce VOCM ripple (low-Z + good decoupling), ensure stable CM recovery under load steps.
- Expected symptom: HD2 correlates strongly with Vcm_out or VOCM ripple.
- Balance move: keep input C/R networks symmetric and ensure identical probing on both outputs.
- Check move: deliberately skew one side to confirm sensitivity (fast root-cause isolation).
- Expected symptom: HD2 changes with probing/cabling, while DM magnitude barely moves.
Verification that identifies the cause (correlation-driven)
- Single-tone amplitude sweep: log HD2/HD3 and track Vcm_out and VOCM ripple at the same time.
- Two-tone (IMD) check: confirm whether nonlinearity behaves like drive/current limitation or symmetry/CM conversion.
- Symmetry experiment: intentionally change one-side load/probing; a large HD2 sensitivity indicates load-imbalance conversion paths.
- VOCM/decoupling experiment: adjust VOCM impedance/decoupling quality; HD2 tracking indicates CM injection dominance.
Pass criteria (template): THD/SFDR meets the target at the specified App, frequency, and load; HD2/HD3 behavior remains stable against minor probing changes; and no strong correlation is observed between HD2 and Vcm_out/VOCM ripple beyond the system budget.
Noise: input-referred model & source impedance
Noise budgeting must use the correct differential (DM) and common-mode (CM) definitions. A single-ended FFT can mix DM and CM, hiding CM→DM conversion and leading to the wrong “dominant noise” conclusion.
- Vdiff = (Vop − Von) for differential noise.
- Vcm = (Vop + Von)/2 for common-mode noise.
- VOCM pin ripple as a CM injection indicator.
- DM noise maps directly into SNR/ENOB for ADC-facing chains.
- CM noise becomes harmful when imbalance converts it into DM noise.
- Asymmetry can raise DM noise without changing DM magnitude response.
Major contributors and the resistor-scaling triangle
- Op-amp voltage noise (en): often dominates in mid/high band when noise gain is elevated.
- Op-amp current noise (in): dominates with high source impedance or large equivalent input resistance.
- Resistor thermal noise: rises with R and bandwidth; easy to underestimate in diff networks.
- CM→DM conversion: imbalance can turn CM noise (VOCM/supply/ground) into DM noise.
- R ↑: resistor thermal noise ↑, in·R noise ↑, but static power ↓.
- R ↓: thermal noise ↓ and in sensitivity ↓, but load/drive stress ↑ and distortion risk ↑.
- Practical rule: scale R to meet noise while staying in the linear drive region and within power constraints.
Engineering workflow: input-referred density → integrate RMS → map to SNR/ENOB
- Build an input-referred noise density (DM definition) by referring each contributor back to the input.
- Apply noise gain (distinct from signal gain) to capture how the network amplifies noise across frequency.
- Integrate over the target bandwidth to obtain Vn,rms (use the system band, not the scope/FFT window).
- Map to system metrics: SNR ≈ 20·log10(Vsignal_rms / Vn_rms), ENOB ≈ (SNR − 1.76)/6.02.
Pass criteria (template): Vn,in,rms (DM-referred) fits the noise budget and leaves guardband for CM→DM conversion and measurement uncertainty.
Verification: isolate op-amp noise vs resistor/source noise
- Goal: suppress in·Rs terms so en + network thermal dominate.
- Observe: DM noise floor and any CM noise that leaks into DM.
- Interpret: if DM noise is still high, check noise gain and resistor thermal terms.
- Goal: reveal in sensitivity and noise rise with source impedance.
- Observe: changes in DM noise and correlation with Vcm/VOCM ripple.
- Interpret: strong dependence on probing/cabling suggests load imbalance and CM→DM conversion.
Frequency response & Q accuracy: tolerance, matching, trimming
Differential filters are often more sensitive to matching than absolute values. Pair matching (R+ vs R−, C+ vs C−) controls Q and notch depth, and also limits CM→DM conversion that can degrade distortion and noise.
- Same-pair matching: R+ vs R−, C+ vs C−.
- Ratio matching across the network: feedback/integrator ratios.
- Absolute tolerance: sets f0 scale but usually matters less than ratios for Q/notch depth.
Materials, tempco, and layout symmetry (manufacturable accuracy)
- Capacitors: NP0/C0G for low tempco and low nonlinearity.
- Resistors: thin-film and resistor arrays for stronger ratio matching and thermal tracking.
- Networks: matched arrays reduce gradient-driven drift across temperature.
- Mirror placement: keep R/C pairs in identical geometry and environment.
- Parasitic balance: equalize C-to-ground and routing around both halves.
- Thermal tracking: avoid heating one side (near regulators, clocks, or hot copper planes).
Where Q and f0 errors come from (what to blame first)
- Ratio mismatch: Q shifts and notch depth becomes shallow (zeros do not cancel).
- Parasitics and imbalance: response warps and CM→DM conversion increases.
- Finite op-amp gain/GBW: Q reduces (peaking flattens) and phase accuracy degrades.
- Loading and probing: asymmetric load can mimic “Q error” without a large magnitude change.
Lightweight trimming strategies (calibrate one axis)
- Method: capacitor bank or digital micro-trim that shifts the frequency scale.
- Benefit: restores center frequency without re-shaping pole/zero topology.
- Risk control: keep symmetry in the trim elements to avoid creating new mismatch.
- Method: adjust a gain-setting element without moving pole/zero locations.
- Benefit: amplitude alignment for production without destabilizing the filter.
- Risk control: verify that headroom and CM behavior stay within budget.
Pass criteria (template): f0 within the tolerance window, Q within the matching-driven error budget, and notch depth (if applicable) meets the minimum attenuation target under the specified load and temperature range.
ADC interface: drive, sampling kickback, RC isolation, stability
A differential ADC input is a time-varying load: sampling switches charge and discharge the sampling capacitors, creating kickback current. If the two halves are not perfectly symmetric, common-mode activity converts into differential error and shows up as higher 2nd-order distortion and spurs.
- Csample + sampling switch network → dynamic charge pulses.
- ESD / clamp structures → additional nonlinear loading near full-scale.
- Leakage and bias paths → CM operating point sensitivity in real hardware.
- SFDR drops after connecting the ADC, even when the filter response looks correct.
- Settling slows or shows periodic “ticks” synchronized to sampling.
- Intermittent ringing that changes with sample rate or cable/probe setup.
Interface structure: Diff filter → Riso → ADC (optional shunt C)
- Riso per side isolates the filter output from Csample switching impulses.
- Symmetry requirement: Riso, routing parasitics, and input loading must mirror.
- VOCM awareness: any CM motion at the output can convert to DM if imbalance exists.
- Small C to GND: absorbs high-frequency kickback; keep both halves identical and the return path short.
- Small C to VOCM: steers HF energy into VOCM only if VOCM is low-impedance and well-decoupled.
- Do not “fix” ringing with asymmetric C; it often trades stability for worse distortion.
Stability and settling: the Riso double-edge
- Benefit: higher isolation improves phase margin against dynamic Csample loading and reduces kickback coupling into the filter core.
- Cost: resistor thermal noise increases, and an extra pole/zero can alter phase and group delay near the band edge.
- Settling impact: too much Riso can slow large-signal settling and increase droop during the sampling aperture.
- Engineering order: ensure symmetry and return-path quality first, then tune Riso, then consider shunt C strategies.
Pass criteria (template): no sustained ringing with the ADC connected, settling meets the timing window at full-scale, and SFDR remains above the target under the specified sampling rate and input frequency.
Verification: correlate symptoms with sampling behavior
- Check Vdiff settling and Vcm/VOCM recovery simultaneously.
- Look for periodic “ticks” or spikes synchronized to sampling edges.
- Repeat with different Riso and confirm monotonic improvement without symmetry loss.
- Measure SFDR/HD2/HD3 and track changes vs fs and fin.
- Strong correlation with fs suggests kickback/return-path dominance.
- Compare probe setups: changes imply measurement-induced imbalance.
Layout & measurement traps: diff symmetry, grounding, probing
Differential performance collapses when physical symmetry is only “visual.” Small parasitic differences change CM balance and convert CM activity into DM distortion and noise, often without a large change in magnitude response.
- Mirror placement: R/C pairs placed as matched geometry with identical surroundings.
- Return-path continuity: avoid plane splits and keep high-frequency returns short and symmetric.
- VOCM decoupling: shortest possible loop; isolate from digital clock and high di/dt currents.
- CMFB routing: keep CM sense lines short, quiet, and away from switching nodes.
- ADC network symmetry: Riso/Cshunt/ESD and routing to IN+/IN− must mirror.
Parasitics are destructive because they create imbalance
- Extra C-to-ground on one side shifts phase and increases CM→DM conversion, raising HD2/SFDR spurs.
- Asymmetric loading (probe/cable/ESD) creates unequal swing and adds even-order distortion.
- Return-path detours inject CM noise through ground bounce and long loops.
Pass criteria (template): Vop and Von match in amplitude/phase within the allowed imbalance window, and SFDR does not degrade when switching between approved probing methods.
Measurement traps (how “testing” creates the problem)
- Loads one half with extra C/R and breaks symmetry.
- Can raise HD2 and spurs without obvious magnitude changes.
- Creates false “stability” conclusions when ringing is probe-dependent.
- Adds CM injection paths and return-loop resonance.
- Turns environmental noise into measurable “signal.”
- Alters the effective shunt capacitance and return impedance.
Quick triage (fast isolation without guesswork)
- Swap probe method: diff probe vs math-diff; large changes indicate measurement-induced imbalance.
- Compare Vop vs Von: if amplitude/phase mismatch grows with frequency, suspect routing parasitics and loading.
- Short vs long interconnect: a large delta points to return-path and CM injection issues.
- Correlation test: if spurs track clock/sample rate, prioritize kickback and return-loop control.
Engineering checklist (design → bring-up → production)
Production-grade differential filters require two gates: common-mode health first (VOCM/CMFB stability), then differential transfer accuracy (response/Q), then dynamic performance (SFDR, noise, settling). If the common-mode gate fails, tuning R/C values rarely fixes the root cause.
- VOCM settles quickly and remains low-ripple under load and sampling.
- No CM oscillation and no strong spur correlation with sampling edges.
- Symmetry in return paths and loading; Vop/Von behave as matched halves.
- VOCM ripple < X mVrms (specified load, fs, temperature).
- Settling meets the timing window to ±Y% (or ±Z LSB) at full-scale.
- SFDR ≥ target under defined Ain/fin/fs and approved probing method.
Design intent (before schematic freeze)
- BW / fc / Q (or passband ripple and stopband attenuation).
- SFDR/THD target with conditions (Ain, fin, fs, load).
- SNR/ENOB target with bandwidth definition (RMS integration).
- ADC constraints: input range, recommended VOCM, sample rate fs.
- Swing plan: allocate Vdiff headroom by stage to avoid near-rail distortion.
- Noise plan: en/in + resistor noise → integrate in-band → map to SNR.
- Settling plan: define timing window and allowable overshoot/peaking.
- Distortion plan: identify swing hotspots and output current stress points.
- VOCM error/ripple: define allowable ripple under sampling and load.
- CM swing: keep CMFB in its linear region across temperature and tolerances.
- CMFB bandwidth: choose a ratio vs signal band (use a range, not a single number).
- CM→DM sensitivity: treat symmetry and return path as top-level constraints.
Bring-up sequence (measure in the right order)
- Common-mode sanity: observe VOCM settling and ripple under intended load and sampling; stop if CM oscillates.
- Differential response: verify amplitude and phase/Q; confirm Vop and Von match in amplitude/phase.
- Dynamic performance: run full-scale sine SFDR/THD and step settling; correlate spurs with fs/clock edges.
- VOCM ripple is unstable or changes drastically with probe placement.
- Vop/Von mismatch grows with frequency even at small signal.
- Spurs track fs strongly, suggesting kickback or return-path coupling.
- Use balanced differential probing or calibrated math-diff only.
- Keep ground return loops short; avoid single-ended loading of one half.
- Document fixture and cable configuration for repeatability.
Production readiness (consistency across lots)
- Lock matched resistor networks/arrays and capacitor dielectrics (NP0/C0G).
- Keep Riso/Cshunt tolerance and tempco controlled and symmetric.
- Freeze package and placement symmetry as a controlled requirement.
- Define soak criteria as stability thresholds, not fixed minutes.
- Validate SFDR and VOCM ripple at required temperature points.
- Track aging-sensitive parts and verify long-term drift guards.
- Prefer minimal calibration (gain-only or f0-only) when coefficients remain stable.
- Version all coefficients with firmware/EEPROM identifiers for traceability.
- Standardize fixture, probing method, FFT settings, and pass/fail conditions.
Applications & patterns (strictly differential chains)
These applications are limited to strictly differential signal chains where VOCM/CMFB behavior, symmetry, and ADC kickback are first-order constraints. The focus is differential chains into differential ADCs, not general-purpose filtering.
- Chain: source/driver → diff filter → ADC.
- Why differential: VOCM control, low even-order distortion, predictable interface behavior.
- Top risks: sampling kickback, CM→DM conversion from asymmetry, Riso/Cshunt tradeoffs.
- Pass criteria: SFDR holds under defined Ain/fin/fs with approved probing and fixture.
- Chain: balanced source → diff filter → ADC / diff link.
- Why differential: even-order suppression and stable headroom around VOCM.
- Top risks: VOCM ripple coupling, output swing hotspots, probe-induced imbalance.
- Pass criteria: HD2 and spurs do not track VOCM/CM activity; settling meets window.
- Chain: remote sensor → diff filter → ADC.
- Why differential: CM interference rejection on long cables and harsh environments.
- Top risks: return-path discontinuity, CM injection through shields/fixtures, asymmetry.
- Pass criteria: Vop/Von match and SFDR remains stable when cable length changes within spec.
- Chain: matched channels → diff filters → multi-ADC.
- Why differential: channel-to-channel phase and amplitude consistency with CM control.
- Top risks: BOM mismatch, temperature drift differences, fixture/probe variability.
- Pass criteria: channel phase/amplitude mismatch stays within window across temperature points.
- Chain: differential sensor → diff filter → ADC.
- Why differential: improved rejection of CM noise and better preservation of small signals.
- Top risks: source impedance imbalance, leakage paths, CM motion under bias conditions.
- Pass criteria: integrated noise meets ENOB target and does not jump with cable/probe changes.
- Chain: baseband/IF source → diff filter → ADC.
- Why differential: stable linearity under swing with controlled VOCM and balanced loading.
- Top risks: kickback-driven spurs and CM→DM conversion at higher frequencies.
- Pass criteria: spurs remain below target across fs/fin sweep in the allowed operating range.
IC selection notes (VOCM/CMFB-first) — Fully-Differential Filters
Fully-differential filter IC selection is not “pick any FDA.” The selection must close two loops: the differential transfer function (noise/linearity/Q/settling) and the common-mode loop (VOCM accuracy, CMFB stability, CM→DM conversion, headroom). This section turns datasheet fields into a screening + verification + vendor-ask checklist, with concrete part-number examples (starting points only).
A) Role clarity (what the IC is expected to “own”)
- FDA / Differential driver: owns VOCM centering + CMFB stability while shaping the DM transfer function.
- Filter block + buffer: passive/RC network sets poles/zeros; IC owns linear drive, VOCM behavior, and ADC stability margins.
- High-speed fully-diff amp: owns bandwidth/linearity under real load; requires tighter layout + probing discipline.
Boundary: no full SE↔Diff tutorial here; focus stays on differential filter requirements (VOCM/CMFB + DM performance under real loads).
B) Must-have fields (diff-filter specific) — read them like a failure-prevention list
- VOCM range + behavior under load: check whether VOCM stays stable with the intended output swing and loading.
- CMFB architecture + stability notes: look for explicit guidance vs Cload/Riso and recommended decoupling/placement.
- ICMR at target VOCM: ensure input CM range supports the chosen VOCM (and expected CM ripple) with margin.
- Output CM swing & linear region: CM motion or CMFB nonlinearity often correlates with HD2/SFDR collapse.
Red flag: VOCM described only as a “setting pin” with no load-dependent behavior guidance.
- THD/SFDR vs swing + frequency + load model: only trust curves with conditions matching the intended chain.
- Output current drive: confirm it can drive the filter network + isolation resistor + ADC dynamic input without slewing/compression.
- Symmetry sensitivity: watch notes about imbalance, load mismatch, or external network mismatch impact on even-order distortion.
Red flag: “Great THD” shown only at light resistive load (no mention of sampling-network-like dynamics).
- en / in + 1/f corner: match to source impedance and chosen resistor scaling; avoid “mystery noise dominance.”
- Input bias current + drift: high-value networks amplify Ib-related errors and temperature drift.
- Stability guidance: check rules for capacitive loads, recommended Riso ranges, and compensation expectations.
- Supply/thermal: self-heating and supply headroom can shift both VOCM behavior and linearity.
Red flag: no clear “stable operating region” guidance for Cload/Riso (common in ADC-interface failures).
C) 3-minute screening rules (fast elimination)
- Lock VOCM first: ICMR and output swing must have margin at the intended VOCM (including expected CM ripple).
- Demand realistic THD conditions: fin, amplitude, supply, temperature, and especially the load model must match the chain.
- Check current-drive headroom: the IC must remain linear while driving the filter network + isolation + ADC dynamics.
- Validate a noise story: en/in + resistor scaling must predict which term dominates across the band (no surprises on the bench).
- Require stability guidance: explicit advice for Cload/Riso (and any “minimum stable gain” constraints) is mandatory.
- Prefer same-class reference designs: same VOCM strategy and ADC-style loading beats generic “demo” circuits.
D) Verification hooks (turn selection into measurable pass/fail)
- VOCM ripple: measure VOCM node ripple vs load and frequency; correlate with HD2/SFDR changes.
- CM stability sweep: vary Cload and any shunt-to-VOCM options; confirm no CM peaking/oscillation.
Pass criteria template: VOCM ripple < X mVRMS, no CM peaking > Y dB (X/Y from system budget).
- Vop/Von symmetry: compare amplitude/phase of each leg; imbalance is a common HD2/CMRR killer.
- Step settling: verify settling to the required error band with the real downstream load present.
Pass criteria template: settle to ±X% in < Y µs; leg mismatch < Z dB / Z° (X/Y/Z from spec).
- SFDR/THD at full swing: repeat at multiple frequencies and (if an ADC is used) multiple sample rates.
- Correlation test: if spurs move with fs/clocking or change with probing method, suspect CM/kickback artifacts.
Pass criteria template: SFDR > X dBc and HD2/HD3 below Y dBc across stated conditions.
E) What to ask vendors + concrete reference part numbers (starting points)
- Complete test conditions: supply, temperature, VOCM, input amplitude, frequency, and any ADC-related clocking.
- Explicit load model: R/C load, isolation resistor, any sampling-network-like dynamic load assumptions.
- THD/SFDR at the intended VOCM: confirm curves are valid at the chosen output common-mode point.
- CMRR vs frequency: request CMRR(f) in the band of interest (not DC-only).
- Stability guidance: recommended Cload/Riso ranges, decoupling placement, and any minimum stable gain constraints.
- Reference design alignment: request a reference schematic + layout notes matching similar VOCM and loading.
A “good” response must include: conditions + load model + VOCM-specific distortion + stability boundaries + layout/decoupling notes.
The part numbers below are examples to speed up datasheet lookup and bench evaluation. Selection must still be driven by DM/CM budgets and the verification hooks above.
- THS4521 (TI) — low-power FDA family; common in dense DAQ front-ends.
- THS4531 (TI) — ultra-low-power FDA option for tight power budgets.
- ADA4940-1 (Analog Devices) — low power FDA with adjustable output common-mode.
- LTC6363 (Analog Devices) — fully differential amplifier family optimized for SAR ADC driving (includes fixed-gain variants).
- THS4551 (TI) — precision FDA style often used when DC behaviors and drift matter.
- THS4552 (TI) — dual-channel variant for matched multi-channel designs.
- THS4561 (TI) — fully differential amplifier targeting lower bandwidth, wide supply use cases.
- ADA4945-1 (Analog Devices) — FDA with selectable power modes; common in data acquisition chains.
- OPA1632 (TI) — fully differential amplifier commonly used in high-performance audio ADC driving and low-distortion differential stages.
Note: these are reference examples. Always verify VOCM/CMFB stability and distortion under the intended load model and measurement method before locking a BOM.
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FAQs (Fully-Differential Filters) — 4-line actionable answers
Scope: VOCM/CMFB behavior, differential symmetry, ADC kickback interface, layout/probing traps, tolerance & drift. Each answer follows a fixed 4-line structure: Likely cause / Quick check / Fix / Pass criteria.
