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Digital Filters & Decimation for ADCs (SINC/CIC, FIR, Notch)

Digital Filters & Decimation for ADCs (SINC/CIC, FIR, Notch)

← Back to:Analog-to-Digital Converters (ADCs)

Digital filters and decimation define an ADC’s usable bandwidth, noise (ENBW), and latency. This page shows how to choose modes and ODR/OSR settings, verify passband/stopband/latency in the lab, and shortlist ICs using filter behavior as a first-class spec.

Quick browse
  1. What this page solves
  2. Key vocabulary (OSR, decimation, ENBW, passband/stopband, group delay)
  3. Why decimation exists
  4. Filter families in datasheets (SINC/CIC, FIR, IIR, half-band, FFE)
  5. SINC/CIC deep dive (SINC1/2/3, notches, droop)
  6. Multi-stage decimation (CIC + half-band + FIR)
  7. Notch & band-pass options (tuning range, Q, stability)
  8. Latency, group delay & phase
  9. What digital filters cannot fix (aliasing, blockers, overload)
  10. How to choose settings (ODR, OSR, mode)
  11. Verification (FFT, sweep, step, ENBW)
  12. Engineering checklist (spec → configure → measure → lock)
  13. Application patterns (minimal mapping)
  14. IC selection logic (filters as first-class specs)
  15. FAQs
Tip: If some links do not jump, ensure the matching section id exists in the page.

What this page solves (Digital Filters & Decimation)

This page focuses on the ADC digital backend step that turns raw high-rate samples into a usable output stream: decimation and digital filtering. It explains how filter modes and decimation ratios reshape three system-level outcomes: noise bandwidth, latency, and usable bandwidth.

Scope boundary (to avoid content overlap)
  • Covered: SINC/CIC, FIR/IIR/half-band options, notch/band-pass modes, decimation ratio & output data rate, passband/stopband tradeoffs, latency/group delay, and verification methods.
  • Not expanded here: ΣΔ modulator noise-shaping internals, DDC/NCO channelization, clock jitter/PCB/link integrity, and analog driver/anti-alias filter design (only brief boundary notes when needed).

Practical outcomes delivered by this page

  • Interpret filter tables and mode names in ADC datasheets (SINC order, FIR options, notch modes).
  • Select decimation/output data rate based on required bandwidth and allowable latency.
  • Validate passband/stopband behavior and latency using repeatable lab measurements.
  • Compare ADCs with digital filters as a first-class specification (modes, tuning, delay, multi-channel alignment).
ADC digital filter and decimation placement Block diagram showing ADC core or sigma-delta modulator feeding a decimation filter, producing output data over SPI or JESD. Three KPI tags highlight noise bandwidth, latency, and bandwidth. ADC Core or ΣΔ Modulator Decimation Filter Output Data SPI / JESD Noise BW Latency Bandwidth Filter mode and decimation ratio define noise bandwidth, delay, and usable bandwidth.

Key vocabulary: OSR, Decimation, ENBW, Passband/Stopband, Group Delay

Datasheet filter tables become predictable once a small set of terms is standardized. This section defines the minimum vocabulary needed to interpret decimation modes, bandwidth claims, and latency specifications without re-explaining concepts in every chapter.

  • OSR (Oversampling Ratio): sampling rate relative to the signal bandwidth target; often linked to filter options and output data rate tables.
  • Decimation ratio (M): the downsample factor after filtering; sets output data rate and strongly affects latency.
  • ENBW (Equivalent Noise Bandwidth): the noise bandwidth implied by the filter; changes how “noise” and “resolution” appear for the same analog input.
  • Passband / stopband: frequency regions the filter passes vs suppresses; common specs are ripple (passband) and attenuation (stopband).
  • Group delay: the effective delay introduced by the filter; critical for control loops, synchronization, and time-aligned multi-channel capture.

The following diagram anchors these terms in two views: a simplified frequency response (passband/transition/stopband) and a time-domain view showing filtering before downsampling and the resulting group delay.

Vocabulary diagram for ADC digital filters and decimation Left panel shows passband, transition band, and stopband with ripple and attenuation labels. Right panel shows input samples passing through a filter, then decimation by M to output samples, with group delay indicated. Frequency view Time view frequency gain Passband Transition Stopband Ripple Attenuation Input samples Digital Filter Decimate by M Output samples Group delay Filtering happens before downsampling; specifications map to passband, stopband, ENBW, and delay.

Why decimation exists: from high-rate samples to useful bandwidth

Decimation turns an internal high-rate stream into an output data rate that matches the usable signal bandwidth. The key rule is simple: filtering must happen before downsampling. Without a low-pass filter, out-of-band energy folds into the band of interest and becomes indistinguishable from real in-band content.

  • Filter first: remove out-of-band content that would alias after downsampling.
  • Then downsample: reduce the stream by a factor M to reach the target output data rate.
  • Tradeoff reminder: higher M typically reduces visible noise bandwidth, but increases latency and narrows usable bandwidth.

In datasheets, the decimation factor is often presented as filter “modes” or output data rate tables. The practical workflow is to start from the required signal bandwidth and allowable delay, then select a decimation ratio and filter mode that meet passband and stopband needs.

Why decimation requires filtering first Two-stage block diagram shows low-pass filtering before downsampling by factor M. A side panel compares dense input samples versus sparse output samples to illustrate output data rate reduction. Filter → Downsample High-rate samples Low-pass filter ↓M decimate Output stream ODR = Fs / M No filter → aliasing after ↓M Sample density Before After ↓M Decimation reduces data rate only after filtering prevents out-of-band energy from folding into the band of interest.

Filter families in ADC datasheets (SINC/CIC, FIR, IIR, Half-band, FFE)

ADC datasheets typically present digital filters as selectable modes rather than as full DSP designs. The most common families can be recognized by what they optimize: implementation cost, passband flatness, stopband rejection, or narrowband suppression.

  • SINC / CIC: very efficient for large decimation; typical tradeoffs are passband droop and higher group delay; common in ΣΔ decimation chains.
  • FIR: strong, controllable stopband and predictable phase; costs are higher computation and latency; used when flat passband and clean rejection matter.
  • Half-band FIR: efficient FIR stage often used in multi-stage decimation; balances cost and rejection for 2× steps.
  • IIR: sharp responses and narrow notches with low order; tradeoffs can include nonlinear phase; often used for selective notch/band shaping modes.
  • FFE: equalization-oriented filtering in some high-speed digital chains; used when inter-symbol effects or link shaping are part of the data path.

The decision tree below summarizes which family typically matches a given priority. The best choice is the one that meets passband and stopband requirements without violating latency constraints.

Decision tree for common ADC digital filter families A three-branch decision tree maps priorities to filter families: lowest power to SINC/CIC, flat passband to FIR or half-band, and narrow notch to IIR. A side card notes FFE as a link-shaping filter type seen in some chains. Priority What matters most? Lowest power Simple SINC / CIC Flat passband Strong stopband FIR / Half-band Narrow notch Low order IIR FFE Equalization / link shaping in some chains Select the family that meets passband/stopband needs without violating latency constraints.

SINC / CIC deep dive: SINC1/2/3, notches, droop, and when it is enough

SINC and CIC filters are common in ADC decimation because they deliver strong rejection with very low implementation cost at large decimation ratios. Datasheets often label these options as SINC1, SINC2, or SINC3 to indicate filter order.

  • Higher order → stronger stopband, higher delay: SINC3 typically rejects out-of-band content better than SINC1, but adds more group delay.
  • Notches are structural: deep nulls appear at predictable frequency locations tied to the decimation relationship.
  • Passband droop is structural: amplitude rolls off near the passband edge; it is an expected characteristic, not a defect.

SINC/CIC is often enough when power and simplicity matter most and the application tolerates modest passband droop. When flatter passband or tighter control of stopband and delay is required, multi-stage decimation is typically used.

SINC filter order, notches, and passband droop Overlay of three simplified frequency response curves for SINC1, SINC2, and SINC3. Labels highlight passband droop and notch locations tied to k·fs/M. Simplified magnitude response frequency gain Passband SINC1 SINC2 SINC3 Droop Notches at k·fs/M Higher order improves rejection but increases delay; droop and notches are expected characteristics.

Multi-stage decimation: CIC + half-band + FIR (how “good filters” are built)

High-performance ADCs rarely rely on a single filter stage. A common approach is to decimate in stages: use a very efficient CIC/SINC stage for large rate reduction, then apply half-band FIR stages for cost-effective 2× steps, and finish with an FIR stage that shapes the final passband and stopband.

  • Front stages: prioritize efficiency for large decimation factors.
  • Middle stages: add rejection with low incremental cost.
  • Final stage: targets the required passband flatness and stopband attenuation.

Datasheet filter “modes” often correspond to different multi-stage combinations. Stronger stopband and flatter passband usually come with higher delay.

Multi-stage decimation chain: CIC, half-band, and FIR Block diagram shows three cascaded stages: CIC (big M), Half-band, and FIR final shaping. Under each stage, compact tags indicate relative cost, stopband rejection, and delay trends using arrows. Multi-stage decimation CIC (big M) Half-band (×2 stages) FIR (final shaping) Flat passband Strong stopband Cost ↓ Stopband △ Delay △ Cost △ Stopband △ Delay △ Cost ↑ Stopband ↑ Delay ↑ ↓ low △ mid ↑ high Vendors stack stages to balance efficiency, rejection, and latency across the full decimation chain.

Notch & band-pass options: what they are for, what to check

Notch and band-pass features in ADCs are typically exposed as selectable digital modes rather than as custom DSP designs. They are used to suppress a narrow interfering tone (notch) or to focus processing on a specific band (band-pass) while reducing out-of-band noise and clutter.

What to check before enabling notch / band-pass
  • Center frequency range: the tuning span must cover the target tone or band.
  • Step size: coarse tuning steps may prevent precise alignment to the interference frequency.
  • ODR-linked vs absolute: some options lock the center to a ratio point of ODR (or Fs/M), so changing data rate shifts the notch/band location.
  • Q / bandwidth: higher Q gives a narrower notch/band but increases ringing risk in time-domain transients.
  • Added latency: enabling these modes may increase group delay or switch to a longer filter chain.

When a notch appears ineffective, the most common causes are center-frequency mismatch (step size), an ODR change that moved the notch, or a mode that trades depth for lower delay. When the signal looks slow or “ringy,” Q and filter latency are the first items to audit.

Notch and band-pass options as selectable ADC digital modes Left panel shows a filter bank with LPF, Notch, and BPF selectable modules feeding a common output port. Right panel shows minimal frequency response sketches: a deep notch and a band-pass bump. Filter bank (mode selection) Input Modes SEL LPF Notch BPF Output Response sketches Notch BPF Notch and band-pass are commonly offered as selectable modes; always verify tuning, ODR linkage, and added delay.

Latency, group delay & phase: the hidden cost of “better filtering”

Stronger filtering and larger decimation often improve stopband rejection and reduce visible noise bandwidth, but they also increase delay. Different filter modes can produce dramatically different end-to-end latency, which directly impacts control loops and time alignment across channels.

  • Latency: the time (or samples) from input sampling to the corresponding output code.
  • Group delay: frequency-dependent delay implied by the filter phase response; critical for phase-sensitive measurements and timing alignment.
  • Phase behavior: linear-phase filters keep relative timing across frequencies more predictable; nonlinear-phase behavior can distort waveform timing relationships.

For closed-loop systems, delay is not just “slower response” — it reduces effective phase margin. For multi-channel capture, consistency matters: channels must use the same output data rate and filter mode to avoid relative delay mismatches.

Debug checklist when timing looks wrong
  • Control feels “slow”: compare mode latency (samples) and decimation ratio across configurations.
  • Channels do not align: confirm identical ODR and identical filter mode on every channel and every card.
  • Phase results drift: audit filter phase behavior (FIR vs IIR modes) and verify group delay over frequency.
Latency pipeline and phase behavior overview Top panel shows a sample flowing through N stages to the output with latency in samples annotated. Bottom panel compares a linear phase line to a nonlinear curved phase line. Latency pipeline Sample n Stage 1 Stage 2 Stage 3 Stage N Out n Latency (samples) Phase behavior (illustration) Linear phase Nonlinear phase Better rejection often costs delay; phase behavior affects time alignment and waveform timing relationships.

What digital filters cannot fix: aliasing, blockers, overload, and front-end constraints

Digital filters optimize what has already been sampled. They can reduce in-band noise bandwidth and reject content that remains out-of-band after sampling, but they cannot undo problems created before or during the sampling process.

Three common misconceptions (and why they fail)
  • “Digital filtering can fix aliasing.”
    Aliasing happens at sampling time. Once out-of-band energy folds into the band of interest, it is indistinguishable from real in-band content.
  • “A strong blocker can be removed after the ADC.”
    Large out-of-band interferers can drive the analog front-end or ADC input stage into nonlinearity or saturation. Digital filters cannot restore a waveform that was clipped or distorted before conversion.
  • “Lower ODR always means better noise.”
    Decimation changes the observation bandwidth (ENBW). Noise may appear smaller or larger depending on bandwidth and measurement settings, even if the hardware is unchanged.
Troubleshooting order (fast isolation)
  1. Sampling boundary: check for aliasing risk and whether analog bandwidth is constrained before sampling.
  2. Linearity boundary: check headroom against full-scale, overload behavior, and recovery from large blockers.
  3. Measurement boundary: compare noise only with consistent ODR, filter mode, and bandwidth/FFT integration settings.
Digital filters cannot replace the analog front-end Side-by-side block diagrams compare the correct chain with analog anti-alias filtering versus the incorrect assumption of no analog filtering. Keyword tags highlight aliasing, overload, and blockers. Correct Analog AA ADC Digital filter Output Wrong assumption ! No AA ADC Digital filter Output Aliasing Overload Blocker Digital filtering helps after sampling; it cannot undo aliasing or overload created at the front-end.

How to choose settings: output data rate, OSR, filter mode (a practical workflow)

The most reliable way to configure digital filters is to start from system requirements and work backward to settings. This workflow produces a defensible output data rate, a filter family selection, and a verification plan that avoids “mode chasing.”

Practical decision workflow
  1. Define target BW: set the usable signal bandwidth and required passband flatness margin.
  2. Choose ODR: select an output data rate that supports the target BW with margin and manageable data throughput.
  3. Pick a filter family / mode: prioritize efficiency (SINC/CIC), flat passband (FIR/half-band), or selective shaping (notch/band-pass).
  4. Check latency: confirm the chosen mode stays within loop and timing budgets; compare latency across candidate modes.
  5. Validate stopband needs: confirm out-of-band rejection is adequate for expected blockers; do not rely on digital filters to prevent front-end overload.
  6. Verify in the lab: validate passband, stopband, and delay using repeatable tests (sweep/FFT/step/alignment).
Quick checklist (always comparable)
  • BW: consistent passband edge and margin.
  • ODR: consistent data rate when comparing noise and performance.
  • Mode: consistent filter family and option set across channels.
  • Latency: measured in samples (and time) for the selected mode.
  • Stopband: validated against realistic blocker conditions.
Decision workflow for selecting ODR and digital filter mode Flowchart shows a practical configuration workflow: BW to ODR to Mode to Latency to Stopband to Validate. Each node is labeled with a single keyword. BW ODR Mode Latency Stopband Validate Start with BW, then choose ODR and mode; confirm latency and stopband before validating in the lab.

Verification: prove the filter is doing what is expected (FFT, sweep, step, ENBW)

Verification should confirm four things: passband behavior, stopband rejection, latency (in samples and time), and time-domain response (ringing/settling). Use repeatable stimuli and consistent capture settings so results remain comparable across modes.

Verification checklist (stimulus → metrics → pass/fail)
FFT (frequency-domain)
  • Stimulus: single-tone or multi-tone points inside the intended passband; optional tone placement in stopband for rejection checks.
  • Metrics: passband droop/ripple, notch depth (if used), stopband attenuation, noise floor.
  • Pass/Fail: response matches the selected mode expectation under identical ODR and identical FFT/integration settings.
Sweep (response shape)
  • Stimulus: frequency sweep or stepped tones across passband and into transition/stopband.
  • Metrics: passband edge location, transition width, notch center alignment, mode-to-mode response differences.
  • Pass/Fail: edges and centers land within expected ranges; ODR changes shift ODR-locked features predictably.
Step / pulse (time-domain)
  • Stimulus: step, pulse, or a clean edge transition.
  • Metrics: latency in samples, overshoot/ringing, settling time to an error band.
  • Pass/Fail: latency fits the system budget; ringing/settling does not violate control or timing constraints.
ENBW check (noise comparability)
  • Stimulus: quiet input condition and consistent capture length/window.
  • Metrics: integrated noise under a consistent bandwidth/integration method.
  • Pass/Fail: comparisons only made under consistent ODR/mode and consistent bandwidth assumptions; otherwise noise may be misread.
Verification chain for ADC digital filters Block diagram shows signal source feeding ADC and capture, then branching to FFT, sweep, and step analyses. Three compact result cards highlight passband, stopband, and latency. Test chain Signal source ADC Capture Split FFT Sweep Step Passband Stopband Latency Use repeatable stimuli and consistent capture settings; verify passband, stopband, latency, and time-domain response.

Engineering checklist (filters & decimation)

A practical workflow should end in a reproducible configuration: requirements are frozen, settings are recorded, measurements are repeatable, and a known-good baseline is locked for future regression checks.

Closed-loop checklist (spec → configure → measure → lock & monitor)
Spec
Target BW · Passband flatness · Stopband · Max latency · Expected blockers · Channel alignment
Configure
ODR · OSR/Decimation · Filter mode · Notch/BPF · Center/Step/Q · Latency (samples)
Measure
FFT passband · FFT stopband · Notch depth · Sweep edge · Step latency · Ringing/settling · ENBW condition
Lock & Monitor
Known-good baseline · Firmware/version · Regression tests · Change triggers · Consistent mode across channels
Closed-loop engineering checklist for filters and decimation Four-step loop shows Spec, Configure, Measure, and Lock & Monitor. Each step includes compact keyword tags such as BW, ODR, Mode, FFT, Step, ENBW, Baseline, and Regression. Spec → Configure → Measure → Lock & Monitor Spec Configure Measure Lock & Monitor BW Stopband ODR Mode Latency FFT Step Baseline Regression Freeze requirements, record settings, verify results, then lock a baseline for regression monitoring.

Application patterns (minimal mapping, no system overlap)

This section keeps application details out of scope and only maps common scenarios to filter/decimation choices. The goal is to translate “what matters” into a practical mode direction without turning this page into an application design guide.

Precision DC
Direction: SINC + Notch (50/60 Hz rejection)
Check: ENBW comparability · line-cycle options · mode latency
Control low-latency
Direction: Low-delay mode (fast settling)
Check: group delay · mode-to-mode latency spread · channel consistency
Vibration narrowband
Direction: BPF / Notch (selective shaping)
Check: center step · tuning range · Q/stability · added delay
Wideband capture
Direction: Light decimation (preserve bandwidth)
Check: throughput · stopband needs · latency budget
Minimal application-to-filter mapping Four cards map common scenarios to filter directions: precision DC to SINC+Notch, control low-latency to low-delay mode, vibration narrowband to BPF/Notch, and wideband capture to light decimation. Scenario → Filter direction (keywords only) Precision DC SINC Notch ENBW 50/60Hz Control low-latency Low delay Latency Alignment Vibration narrowband BPF Notch Center step Q Wideband Light decim. Throughput Stopband Mapping only: scenario keywords → filter direction keywords.

IC selection logic (filters as a first-class spec)

When filter and decimation choices affect noise bandwidth, latency, and timing alignment, they must be treated as primary selection criteria. Use the field list below to request consistent, comparable answers from vendors and distributors.

Inquiry / comparison fields (copy-ready)
  • Filter modes: SINC/CIC · FIR/half-band · IIR · notch · band-pass options.
  • Decimation steps: supported ratios and the resulting ODR range.
  • Group delay / latency: per-mode latency in samples and time (mode table required).
  • Notch tuning: center range · step size · Q/bandwidth · ODR-linked behavior.
  • Channel consistency: per-channel vs global filter settings; mode switching behavior (discard samples, settling).
  • Output word-width: data width/format after filtering and decimation.
  • Power vs mode: power across representative ODR/mode points.
Example part numbers (for quick shortlisting)
Precision DC / low-frequency (strong digital filtering, line rejection options)
  • TI ADS1262 / ADS1263 (ΔΣ with programmable digital filter options)
  • Analog Devices AD7177-2 (ΔΣ with selectable digital filter behavior)
Multi-channel measurement (fast-settling / low-delay modes)
  • TI ADS131M04 / ADS131M08 (multi-channel ΔΣ family with configurable filter behavior)
Wideband precision DAQ (mode trade-offs between rejection and delay)
  • Analog Devices AD7768 / AD7768-1 (high-performance DAQ-class ADC family with filter/latency trade-offs)
Wideband / RF sampling (decimation used to manage output data rate)
  • Analog Devices AD9680 / AD9208 (RF ADC families with digital downconversion/decimation options)
  • TI ADC12DJ3200 (wideband RF-sampling ADC class)
  • TI ADC32RF45 (RF ADC class with decimation-oriented configuration)
Note: this page keeps DDC/NCO details out of scope; only shortlist fields relevant to filter/decimation selection.
Selection field card wall for digital filters and decimation A card wall highlights selection fields such as filter modes, decimation steps, group delay, notch tuning, ODR range, per-channel configuration, alignment, output width, and power versus mode. Selection fields (cards) Filter modes Decimation steps ODR range Group delay Latency (samples) Notch tuning Per-channel setup Alignment Output width Mode switching Settling behavior Power vs mode Ask for per-mode tables: latency, stopband behavior, and power at representative ODR points.

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FAQs (Digital Filters & Decimation)

These FAQs target long-tail questions about decimation, SINC/CIC behavior, notch options, ENBW, droop, aliasing limits, and verification. Answers stay focused on digital filtering and avoid application system design details.

What is decimation in an ADC, and why must filtering happen before downsampling?

Decimation reduces the sample rate by a factor M to produce a lower output data rate (ODR). A low-pass filter must run before keeping every Mth sample; otherwise, out-of-band content folds into the band of interest as aliasing. In practice, “decimation” in ADC datasheets usually means a combined filter + downsample chain, not a simple divider.

What does OSR mean, and how does OSR relate to ODR and usable bandwidth?

OSR (oversampling ratio) is the ratio between an internal sampling rate and the output data rate after decimation. Increasing OSR typically lowers in-band noise (because the observation bandwidth shrinks and/or noise is shaped and then filtered), but it also increases group delay/latency and reduces output throughput. Usable signal bandwidth is set by the selected filter response, not only by ODR.

  • Higher OSR: usually lower noise and narrower bandwidth, often higher delay.
  • Lower OSR: wider bandwidth and lower delay, often higher noise and weaker rejection.
What is ENBW, and why can noise numbers change when switching filter modes or ODR?

ENBW (equivalent noise bandwidth) is the bandwidth of an ideal rectangular filter that passes the same total noise power as the real filter. When a mode or ODR changes, ENBW usually changes too, so integrated RMS noise can appear smaller or larger even if the analog hardware is unchanged. Noise comparisons are meaningful only when the bandwidth/integration method is consistent.

What do SINC1 / SINC2 / SINC3 mean, and why do higher orders add more delay?

SINC1/2/3 describes the order of a SINC (often CIC-derived) decimation response. Higher order generally improves stopband rejection and deepens the response notches, but it increases filter length and therefore group delay. In datasheets, higher-order SINC modes commonly trade latency for cleaner out-of-band suppression.

What is passband droop in CIC/SINC filters, and when does it matter?

Passband droop is the gradual gain loss across the passband that is inherent to CIC/SINC-style responses. It becomes important when accurate amplitude flatness is required near the top of the usable band, or when comparing tones across frequency. If droop is unacceptable, a vendor mode that adds FIR/half-band correction (or a flatter FIR mode) is often required.

Why does “better filtering” often increase latency, and how is group delay specified?

Stronger filtering usually means a longer impulse response, which increases the time (and number of samples) needed to produce a settled output. Group delay is commonly expressed in output samples for a given mode, and can be converted to time by dividing by ODR. Always compare latency using the same unit set: samples and milliseconds.

How should a notch or band-pass option be evaluated (tuning range, step, Q, stability)?

In ADCs, notch/BPF options are often predefined digital modes with limited tuning. Evaluation should focus on whether the center frequency is absolute or ODR-locked, the smallest tuning step, the effective bandwidth (Q), and the latency impact. If the notch is ODR-locked, changing ODR can move the notch relative to a fixed interference frequency.

  • Center range and step size
  • Q / bandwidth and whether it is mode-fixed
  • Added delay (samples) versus the low-delay baseline mode
Can digital filters fix aliasing or remove a strong out-of-band blocker after the ADC?

No. Aliasing happens at sampling time; once energy folds into the band of interest it cannot be separated from real in-band content by digital filtering. A strong out-of-band blocker can also cause front-end or ADC overload (nonlinearity/clipping), and digital filters cannot reconstruct a waveform that was distorted before conversion.

How should settings be chosen for low-latency control versus best noise performance?

Low-latency control prioritizes minimum group delay and fast settling, so it typically uses lower-order or “low delay” modes with lighter decimation. Best-noise configurations accept higher latency in exchange for narrower ENBW and stronger stopband behavior. Selection should start from bandwidth and latency budgets, then choose the highest-rejection mode that still meets timing.

How can passband, stopband, and latency be verified in the lab (FFT, sweep, step)?

Use FFT to quantify passband droop/ripple, notch depth, and stopband attenuation under consistent capture settings. Use sweep (continuous or stepped tones) to visualize passband edge and notch placement. Use step/pulse tests to measure latency in samples and observe ringing/settling. Always keep ODR, record length, and integration bandwidth consistent when comparing modes.

Why can multi-channel timing alignment change after switching filter modes?

Different modes can have different group delays, and some devices apply filter settings globally while others allow per-channel differences. Alignment can also shift during mode changes because additional settling/discard samples are required before outputs become valid. For multi-channel systems, the safest approach is to keep ODR and mode identical across channels and treat mode switching as a re-alignment event.

Which filter/decimation specs should be requested when shortlisting ADCs?

Shortlisting should request per-mode tables and tuning limits, not only “filter names.” The highest value items are mode families, decimation steps/ODR range, group delay/latency in samples and time, notch/BPF tuning range and step size, and whether configuration is per-channel or global. Power versus mode/ODR is also critical when filter choices change throughput and internal processing.

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