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Insulation / Leakage Monitor (HV)

← Back to: Battery Charging / Gauging / Protection / BMS

Use Cases & Risk Map

In HV charging and ESS environments, insulation is a time-varying quantity affected by cables, chassis bonding, external equipment, moisture and vibration. That is why this page focuses on online insulation / leakage monitoring instead of one-time factory tests.

Once insulation degrades during charging, the charging domain should first identify the leakage direction and severity, not immediately shut down the whole BMS. This avoids nuisance trips and supports real field operation.

1.1 Scenarios that require online monitoring

  • EV / PHEV onboard charging where the charger and cable introduce time-varying leakage to chassis.
  • Industrial / commercial ESS that connects to grounded cabinets or damp environments.
  • HV DC charging posts where the post-side leakage can be brought back into the vehicle.
  • Mobile / trailer-based storage systems that are exposed to rain, salt, temperature swings.
  • HV DC/DC feeding external loads or tools, where the external device becomes a fourth leakage path.

1.2 Why online, not “measure once”

A one-shot factory insulation test assumes stable environment and fixed wiring. Online monitoring assumes dynamic wiring and external equipment. Charging cables, PE bonding, moisture or even a temporary tool can shift the equivalent Riso and make the previous value invalid. This is the typical case when a charger with stronger CM noise is connected.

1.3 Leakage routes we must detect

For an HV bus we should always resolve at least these routes:

  • +Bus → Chassis / PE (typical cable or connector contamination)
  • −Bus → Chassis / PE (negative-side harness or enclosure leakage)
  • +Bus ↔ −Bus asymmetric leakage (moisture or partial discharge only on one side)
  • External-equipment-brought leakage (from DC post / inverter / field device)

Direction matters because a charging controller can behave differently for internal degradation vs external-brought leakage. That is the value of this child page.

HV bus leakage map HV battery pack to chassis leakage map showing positive-bus, negative-bus and external-equipment leakage paths during charging. HV Pack + HV Bus − HV Bus Chassis / PE during charging standby fault Leakage paths to chassis / PE HV buses under monitoring
Figure 1. HV battery pack to chassis leakage map (positive, negative and external-equipment routes).
Risk vs operating state Risk comparison of insulation degradation across charging, standby and fault states in HV BMS systems. Shock Misreport Nuisance trip Charging Standby Fault / Suspected High Med Med Low Low Low High High Med Note: charging → shortest measurement window; standby → longest window; fault → requires direction + level.
Figure 2. Risk level changes with operating state — charging needs fast+robust detection, standby can average, fault needs direction.

This chapter intentionally does not cover EV HMI/cluster warning styling, DC post PLC/CP/PP protocol details, or low-voltage (12/24/48 V) insulation monitoring.

Measurement Architectures (DC vs AC vs Direction)

HV insulation monitoring has to work under high voltage, high common-mode and high noise. For that reason we separate the discussion into DC equivalent method, AC injection / demodulation method and direction-identification matrix. A real design can combine them on the same PCB.

2.1 DC equivalent method

The DC method uses a high-resistance divider plus a known HV reference to back-compute the equivalent Riso. It is attractive for simple and low-noise systems. However, the divider’s own leakage and tolerance must be budgeted into the final accuracy or the system will report false degradation.

After the divider, the tap must go through RC protection and isolation (isolation amplifier or Σ-Δ modulator) before reaching the MCU / BMS host. This is also the point where surge and ESD are handled.

DC-division insulation measurement DC high-resistance divider based insulation measurement scheme for HV bus with isolated ADC backend. HV Bus R1 R2 RC Isolation Amp / Σ-Δ MCU / BMS ADC + report • Divider leakage must be budgeted • RC protects isolation under surge
Figure 3. DC high-resistance divider based insulation measurement for HV bus — simple, but divider leakage matters.

2.2 AC injection / demodulation method

When the charger or grid-tied converter injects strong common-mode noise, a DC method can show false degradation. An AC method injects a small known signal (from the isolated side or a local supply), routes it through the HV network and picks it up with narrow-band or synchronous detection. Because the detection is done at a chosen frequency, it is more robust to CM noise.

This method also prepares the ground for directional measurement, since the injection can be switched to +Bus, −Bus or chassis.

AC injection with selector AC injection insulation monitor with input selector for determining leakage direction toward chassis. AC injection known freq Selector (+ / − / PE) to +HV bus to −HV bus to PE / chassis Narrow-band / sync detection MCU • Better robustness in noisy charging • Selector enables direction identification
Figure 4. AC injection with selector — inject at known frequency, switch between +/−/PE, detect with narrow-band filter.

2.3 Direction-identification matrix

After we can measure a clean signal (DC or AC), we still have to tell which side is leaking. That is done by switching the injection / reference among +Bus, −Bus and chassis, observing the response and then making a two-stage decision: fast detect → confirm. This is where analog-switch leakage or relay contact resistance must be considered.

A two-stage decision avoids reporting a wrong direction during strong CM bursts from the charger.

Direction decision flow Decision flow to identify whether leakage is from positive bus, negative bus or external load in HV charging systems. Fast detect Riso below threshold? Switch ref / injection (+Bus, −Bus, chassis) Leak at +Bus → PE Leak at −Bus → PE External / unknown (post / device) Report to charging / BMS with direction + severity
Figure 5. Direction-identification flow — fast detect, re-inject / re-reference, then report which side is leaking.

This chapter does not cover full IMD controller internal algorithms, multi-cell voltage MUX for BMS, or EV charging communications (PLC/CP/PP). It is limited to the generic, board-level insulation / leakage measurement chain.

Signal Chain & Analog Front-End

For HV insulation / leakage monitoring in the charging domain we recommend a three-layer board topology: HV interface on the edge → protection / divider → isolation / ADC in the safe zone. This supports creepage / clearance, makes assembly inspection easier, and avoids mixing high-voltage components with low-voltage logic.

Front-end topology overview

Place the HV divider at the board edge where the HV harness or DC post enters. Keep the isolation amplifier / Σ-Δ modulator inside the “safe” area, separated by clear silkscreen and keep-out. This makes it obvious for small-batch factories and avoids them routing small digital signals too close to high voltage.

HV divider & resistor network

The HV divider is not only for scaling — it is part of the leakage budget. Each resistor must meet: voltage rating, series count, tolerance, temperature coefficient, leakage and power. For higher bus voltages, use multiple resistors in series and, if needed, add parallel equalizing resistors to prevent single-part over-stress.

  • Voltage rating: use series strings (e.g. 4–6 pcs) so each part stays under its continuous rating.
  • Tolerance / tempco: 1% / 50 ppm is preferred for multi-channel direction monitoring.
  • Leakage: divider leakage must be added to the Riso model.
  • Power: use P = V² / R to show purchasing the minimum wattage.

BOM remark (copy into WP): “Do not replace HV divider with low-voltage chip resistors. Keep series count, voltage rating and power rating.”

HV front-end protection stack HV front-end protection stack with divider resistors, RC snubber, TVS and isolation amplifier for insulation monitoring. HV interface Connector / Bus TVS ≥ HV bus CM choke Protection divider · RC · surge HV divider (series) multi-resistor, HV rated RC snubber Isolation / ADC Isolation amp AMC1311 / RV1S9xxx Σ-Δ / ADC ADS131M / MCP39xx Place HV divider at board edge; keep isolation in the safe zone for creepage / clearance.
Figure 6. HV front-end protection stack: interface → protection/divider → isolation/ADC.

Isolation, sampling and brand placements

TI: AMC1311 / AMC3330 for isolated voltage; AMC3301-family for Σ-Δ; ADS131M02 / ADS131A for multi-channel synchronous sampling.

ST: STISO621 as digital isolator; pair with TSC2011 if you also want to sense small leakage current.

NXP: use as MCU / control side after isolation, or as the analog switch for selecting +Bus / −Bus / PE in the direction pass.

Renesas: ISL28022 / ISL28030 type monitors when you need more calibrated V/I readings on the LV side.

onsemi: high-voltage tolerant op amps and drivers can be reused for the isolated power supply front-end.

Melexis: MLX91220 is a candidate when you want a non-contact way to see leakage / residual current on harnesses.

Isolated ADC signal chain Isolated ADC signal chain for HV insulation monitoring using Σ-Δ modulator and digital isolator. HV divider HV-rated series Σ-Δ modulator e.g. TI AMC3301 or isolated ADC Digital isolator STISO621 / ISO77xx Sync ADC / MCU ADS131A / MCP39F511 + direction logic BMS / host reports & alarms Isolated side needs stable supply; on brown-out, report “unknown / error” instead of “OK”.
Figure 7. Isolated ADC signal chain — divider → Σ-Δ → digital isolator → sync ADC / MCU → BMS.

This section does not cover HV contactor drivers, main power-path FET thermal design, or pack-level protection logic — those are handled in the Protection domain.

CM Noise & EMC Handling

HV chargers and grid-tied inverters inject repetitive common-mode noise, high dv/dt edges and occasional spikes. A DC insulation method can be pulled away if this energy enters the divider and isolation path. Therefore, noise suppression must be layered: routing → analog → CM / DM separation → digital → re-confirm.

Noise sources in HV charging / ESS

Typical sources: (1) charger/inverter bridge switching, (2) long HV cable acting as antenna / CM path, (3) external DC post or field device. Any of these can drive noise right into the monitoring front-end even if the isolation is correct.

CM noise injection points Common-mode noise injection points around HV charger, cable and insulation monitor front-end. HV charger dv/dt + spikes HV cable CM conduction External DC / ESS extra CM Insulation monitor front-end Chassis / PE — CM reference for all injections CM noise can enter the monitor even when signal isolation is correct.
Figure 8. CM noise injection points around charger, cable and monitor front-end.

Why DC methods get pulled by CM

DC methods assume the measured node is “quiet”. When CM energy falls into the detection bandwidth, the divider output moves, the isolation amplifier reproduces it, and the ADC believes the insulation has degraded. That is why a DC-only implementation must be combined with front RC, CM choke and digital re-check.

Layered filtering strategy

Recommended order: routing separation → RC at the divider tap → CM choke at the line → digital moving-average / narrow-band → second confirmation. RC and choke values should not be hard-coded for production until field tests are done, because charger spectra and cable lengths vary.

Analog + digital filtering stack Filtering stack combining analog RC, CM choke and digital moving-average filter for stable insulation readings. Routing HV vs sense RC filter divider tap CM choke select on-site ADC / isol. clean path Digital filter moving avg / sync Confirm report dir. RC / CM choke values must be tuned on-site according to charger spectrum and cable length.
Figure 9. Filtering stack — start from routing, then analog, then CM, then digital, then confirm.

EMC verification items to declare

Declare the following in the project / product page so purchasing and test labs know what to run:

  • Conducted / radiated EMC: insulation value should remain within window.
  • EFT / surge: module must not report “OK” when insulated side brown-outs.
  • CM injection: direction decision must still detect +Bus vs −Bus correctly.

This section does not describe full-vehicle EMC test flows or national DC charging EMC clauses. It is limited to the insulation / leakage monitoring module itself.

Safety & Isolation Requirements

For an HV insulation / leakage monitor inside the Battery Charging / Gauging / Protection / BMS domain, isolation shall follow the project’s SOP and qualification plan. We do not hard-code kV or creepage numbers here — instead we describe the logic: “the isolation level of the measurement chain shall not be lower than the HV bus insulation class minus the margin defined by the project.”

Safety concept alignment

Projects may demand basic isolation for internal parts or reinforced isolation where human-accessible connectors or service ports are involved. The monitoring circuit must be designed so that its own insulation path is never weaker than the path required for the HV bus it is observing. This is especially important for charging interfaces, mobile ESS and industrial cabinets exposed to humidity / pollution.

Keep the statement generic in your WP page: “Isolation class shall follow project SOP / DVP&R; monitoring chain shall not be configured below HV bus class.”

Creepage & clearance on PCB

Place the HV divider and surge parts at the board edge to make creepage inspection easier. Use slots between HV and low-voltage areas, and if the enclosure / environment is humid or dusty, add conformal coating to preserve creepage over time. Series HV resistors must also keep pad-to-pad spacing — otherwise the effective creepage is limited by the closest pads.

  • Board edge: HV entry + divider + TVS.
  • Isolation line: silk + slot to mark the safe zone for ADC / MCU.
  • Coating: use on mixed-voltage boards or outdoor charging gear.
PCB isolation boundaries for HV insulation monitoring circuit PCB isolation boundaries for HV insulation monitoring circuit with creepage and clearance zones. HV zone divider · surge · TVS HV divider (series) HV-rated parts only Isolation boundary slot / creepage gap Safe / LV zone isolation amp · Σ-Δ · ADC · MCU Isolation amp AMC13xx / RV1S9xxx Sync ADC ADS131A / MCP39xx MCU / BMS Creepage zone keep slot / coating Keep divider on HV side; keep isolation and ADC on safe side for inspection and SOP matching.
Figure 10. PCB isolation boundaries for HV insulation monitor: HV zone → isolation boundary → safe zone.

Failure modes for this module

We only list the failure modes of this insulation / leakage monitor, not the whole vehicle/BMS:

  • Divider open: Riso appears too high → must raise a sensor-doubt flag.
  • Divider short: dangerous input current + false “severe leakage” → must cause a trip.
  • Isolation power lost: monitoring is unavailable → report “monitor unavailable”, not “OK”.
  • ADC saturated: discard this sample, let algorithm clamp it.

Online self-check / injection

Periodically inject a known safe leakage (for example through a high-value resistor or internal test network) and compare the measured Riso with the expected value. Use long windows for standby, short windows for charging, and log any deviation into the safety log.

Safety log fields

Minimum fields to log:

  • Timestamp (UTC or system)
  • Leakage direction (pos-bus / neg-bus / external)
  • Estimated Riso (Ω)
  • Noise / quality level
  • Operating state (charging / standby / fault)
  • Upload target (project-defined CAN / diagnostic channel)

This section does not cover vehicle-level ASIL process or full-vehicle FMEA templates; it only covers failure points of the insulation / leakage monitor module.

Algorithm & Thresholding

The purpose of this chapter is to turn raw voltage / current readings into Riso, add direction confidence, filter out noise and then map the result to three actionable thresholds (warning, derate, trip). All numeric values shall remain configurable in the project SOP.

Riso estimation basics

For injection-based methods, the monitor knows the injection current Iinj and measures a voltage Vmeas that is proportional to the leakage path. The basic relation is:

Riso,raw = Vmeas / Iinj

In practice you must multiply by divider ratio, amplifier gain and ADC LSB scaling, and subtract offsets caused by divider leakage and temperature drift. These correction factors should be stored in non-volatile memory and loaded during startup.

Leakage estimation math Computation path from sensed voltage and injection current to final insulation resistance with temperature compensation. Vmeas from ADC / SD Iinj known / injected R = V / I apply divider / gain / ADC LSB remove offset / noise Temp comp. Humidity state Warning log + keep charging Derate / Slow limit charging Trip stop charging Short-window result → Trip; long-window result → display / log.
Figure 11. Leakage estimation math — sensed V and known I map to Riso, then to three thresholds.

Multi-window / multi-cycle averaging

Use a short window (tens to hundreds of ms) to detect real leakage quickly during charging, and a long window (seconds) to remove CM / EMI bursts and to feed UI/logs. Final trip should only be issued when both windows agree, or when short window sees an obviously dangerous drop.

Direction strategy and re-check

First pass: detect leakage and estimate positive-bus / negative-bus / external. Second pass: re-inject or re-reference and repeat the measurement. Only if the two results match, report “direction confirmed”. Otherwise report “leakage detected, direction uncertain”.

Two-stage decision timeline Two-stage decision timeline for HV insulation monitor with fast detect and slow confirm windows. time → Fast detect short window t1 Re-inject / re-ref direction confirm t2 Final report apply thresholds t3 Warning Derate / Slow charge Trip Two-stage decision avoids nuisance trips: fast detect (t1), re-check (t2), then thresholded report (t3).
Figure 12. Two-stage decision timeline with fast detect, re-check and final report mapped to three thresholds.

Debounce and reporting

To avoid flapping in noisy or humid environments, require N consecutive breaches of the same threshold within M seconds before reporting to the project-defined CAN / diagnostic channel. N and M shall be configurable per project.

This section does not cover battery gauging SOH / SOC fusion algorithms or cloud reporting formats; it is limited to on-board Riso estimation, direction confirmation and thresholding for the insulation / leakage monitor.

Validation & Compliance Playbook

This playbook describes how to validate the insulation / leakage monitor itself, not the entire vehicle or charger. It shows how to build a bench, how to inject controlled leakages in different operating states, and how to produce repeatable reports that can be archived into your project documentation.

Bench validation

Build a bench with an adjustable HV source (simulating the battery / DC bus), a leakage box (with switchable resistors and direction selector), and a noise injection path (to replay charger / inverter common-mode noise). With this you can emulate: positive-bus→PE, negative-bus→PE and external equipment→PE leakage, at repeatable levels.

Bench test setup for HV insulation monitor Bench setup for HV insulation monitor validation with adjustable HV source, leakage box and noise injection. Adjustable HV source 0…800 Vdc project-set Leakage box fixed R, dir select R1 R2 Noise injection CM / burst DUT insulation monitor (board under test) Logger / PC tool Test in: charging / standby / fault Bench must log: HV setpoint, leakage resistor, direction, noise profile, DUT Riso output.
Figure 13. Bench setup for HV insulation monitor validation with adjustable HV source, leakage box and noise injection.

Scenario-based validation

Run the same leakage levels in all three operating states to prove that the algorithm and thresholds behave consistently:

  • Charging: inject leakage → must react fast, with correct direction.
  • Standby: inject leakage → monitor may use long window, but must still log it.
  • Fault / cable unplug / fast re-plug → must not leave stale “OK” in the log.

EMC repeatability

For each leakage value, record the same test under: no noise, CM noise, burst / EFT, and charger-on. If readings drift, flag them with a quality bit. This proves that under realistic charger noise the monitor still produces the same direction and roughly the same Riso.

Production / field check

Define a small, portable “standard leakage wand” — a safe, high-value resistor in a tool — so that service teams can touch the HV point and confirm that the monitor reports the expected Riso and direction. This is faster than bringing the full leakage box to field sites.

Documentation formats

Export two kinds of events into your documentation / WP page:

  • Riso alarm event: timestamp, Riso, direction, state, noise, threshold hit.
  • Self-test fail event: which test, expected vs measured, next retry time.

This validation playbook does not cover full vehicle / charger type approval and does not replace third-party certification lab procedures.

Small-Batch Procurement & Cross-Brand Alternatives

Small-batch users often cannot buy all HV-rated front-end parts, isolation parts and Σ-Δ / metering ADCs in one order window. Lead time mismatches the build schedule, and some IMD-specific ICs are on allocation. This section breaks the monitoring circuit into function slots and gives 2–3 options from the seven brands for each slot, so you can mix and match per availability.

Small-batch pain points

Pain points we target:

  • HV front-end resistors with confirmed voltage and temp rating are not always in stock.
  • Isolation amplifiers and Σ-Δ isolated modulators have longer lead times.
  • Some IMD-specific ICs become “design in only” and cannot be sourced for small pilots.
  • Suppliers swap CM chokes / RC kits without telling, breaking your EMC validation.

Function-slot planning

Split the circuit into 6 slots and pick parts per slot:

  • Front-end protection slot: HV divider, TVS, CM choke.
  • Isolation slot: isolation amplifier / digital isolator.
  • ADC / metering slot: Σ-Δ or multi-channel ADC.
  • MCU / controller slot: handles direction logic and CAN reporting.
  • Injection source slot: small, stable source to test Riso.
  • Switch / matrix slot: analog switch to select +Bus / −Bus / PE.
Function-slot to multi-brand IC matrix Function-slot to multi-brand IC matrix for HV insulation monitoring small-batch procurement. Function → Brand matrix pick any available PN per slot Front-end protection HV-rated divider TVS / CM choke BOM: no low-V parts Isolation slot TI AMC1311B Renesas RV1S9xx STISO621 ADC / metering TI ADS131M04 Microchip MCP39F511A Renesas ISL28022/30 Switch / matrix NXP analog switch select per voltage TI / onsemi mux Leakage current sense Melexis MLX91220 ST TSC2011 If IMD-specific ICs are not available, use “generic measurement chain + MCU algorithm”.
Figure 14. Function-slot → multi-brand IC matrix for HV insulation monitoring small-batch procurement.

Typical PNs to start with

Below are actual, real PNs you can put in the BOM first; later you can replace them per stock / lead time:

  • TI: AMC1311B, AMC3330, ADS131M04
  • ST: STISO621, TSC2011
  • NXP: “HV-tolerant analog switch (CBT/CBTL family, choose per project voltage)”
  • Renesas: ISL28022, RV1S9xx series
  • onsemi: NCS333 (precision amp), NCP51561 (for isolated supply / driver reuse)
  • Microchip: MCP39F511A
  • Melexis: MLX91220 (non-contact leakage current sensing)

BOM remark templates

Copy these into your WP product / solution page so purchasing cannot silently down-grade the front-end:

  • “Do not replace HV divider with low-voltage chip resistors. Keep series count and voltage rating.”
  • “Do not remove CM choke selected during EMC validation.”
  • “Isolation amplifier shall be selected from the listed PNs or project-approved equivalents.”
Submit BOM (48h)

This section does not cover DC/DC, charger main controller or vehicle gateway procurement. It is limited to the insulation / leakage monitor function slots.

Engineering Checklist

Copy-paste this layered checklist into your card / TOC block to tell purchasing, project managers and test engineers that the HV insulation / leakage monitor is ready. The list follows the logic of the previous chapters: hardware → algorithm → EMC → documentation → procurement.

Hardware completeness

  • HV divider resistors are HV-rated, ≤1% tol, tempco logged in BOM.
  • Divider creepage/clearance at board edge confirmed with PCB vendor.
  • Isolation device VIORM ≥ project requirement, lifetime curves archived.
  • Front-end TVS / RC / CM choke matches the EMC chapter values.
  • Isolation brownout reports “monitor unavailable”, not “OK”.

Algorithm readiness

  • DC & AC measurement modes both validated under at least 1 noise scene.
  • Self-test injection can reach +Bus / −Bus / PE / external point.
  • Direction decision uses 2-pass confirmation; uncertain → “direction unknown”.
  • Three thresholds (Warning / Derate / Trip) are project-configurable.
  • Alarm debounce: N consecutive hits within M seconds → report.

EMC completeness

  • Leakage test repeated in charging, standby and fault states.
  • EMC repeatability ≥ 3 sets (no-noise / CM / EFT-burst) and logged.
  • ADC saturation samples recorded; algorithm clamps / discards them.
  • RC / CM choke values written into BOM remarks (“do not change”).
  • Module-level EMC items listed (not full-vehicle tests).

Documentation completeness

  • “Riso alarm event” format defined (time, dir, state, noise, threshold).
  • “Self-test fail event” format defined (expected vs measured, retry).
  • Run-state (charging / standby / fault) is part of every log frame.
  • CAN / diagnostic channel name matches project SOP wording.
  • Bench screenshots / waveforms are archived for lab / supplier.

Procurement readiness

  • BOM lists ≥ 1 cross-brand alternative per function slot.
  • Remarks: “do not use low-voltage chip resistors in HV divider”.
  • Remarks: “do not remove CM choke validated in EMC tests”.
  • Fallback: “generic measurement chain + MCU algorithm” is described.
  • Automotive / industrial temp range noted for all isolation parts.

This checklist does not include full vehicle type approval or third-party lab steps; it is scoped to the HV insulation / leakage monitor module.

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Frequently Asked Questions

These 12 questions cover only the HV insulation / leakage monitor on this page: DC vs AC methods, direction detection, EMC impact, isolation brownout, self-test level selection, and small-batch part choices. They do not cover vehicle-wide BMS or charger PLC/CP/PP flows.

Why does DC divider method give false positives under strong CM noise?

Because the DC chain is sitting at the HV edge, common-mode noise from the charger or long cable gets into the measurement bandwidth. The divider then reports a voltage that is not from the leakage path itself, so the algorithm thinks Riso increased or decreased unexpectedly. Add filtering or switch to AC injection.

When should I prefer AC injection for HV insulation monitoring?

Use AC injection when the HV network is noisy (fast chargers, inverter-fed ESS), when the cable is long, or when you must tell which side is leaking. A narrow-band injected signal plus synchronous detection lets you separate your signal from broadband CM noise and makes direction confirmation more reliable.

How do I lower self-leakage of the divider network without losing dynamic range?

Choose HV-rated, high-value resistors in series, keep pad-to-pad distance, and record tempco in the BOM so the algorithm can compensate. If the divider becomes too high in impedance, add a buffered / isolated front-end so the ADC still sees the full swing. Do not let purchasing swap to low-voltage chips.

How many switching steps are needed to identify the leakage direction?

Typically three points are enough: +Bus, −Bus and chassis/PE. First pass gives a candidate direction, second pass re-injects or re-references to confirm. If the second pass does not match, report “leakage detected, direction uncertain” instead of an incorrect direction.

How do I prevent false alarms when the isolated side browns out?

Treat “isolation supply lost” as a separate diagnostic state. As soon as the isolated side voltage drops below its valid range, report “monitor unavailable / sensor fail” and suspend leakage decisions. Do not let the system continue using the last Riso number, because it is no longer trustworthy.

How do I match CM noise attenuation with the charger’s noise spectrum?

Start from the charger’s known switching frequency and its harmonic cluster. Then size the RC and CM choke so that their corner frequency is just below that cluster, not decades lower. Finally, mirror the same corner in the digital filter to keep the overall phase/gain predictable across test setups.

What’s the trade-off between using an isolated Σ-Δ modulator and an isolation amplifier?

Isolated Σ-Δ modulators give better noise immunity and digital isolation in one piece, but need a receiving ADC/filter and a stable isolated supply. Isolation amplifiers are simpler to drop into an analog chain but rely on the ADC’s own noise and on good CMR. Pick the one matching your EMC target.

When is dual isolation (analog + digital) mandatory?

When the project SOP says the measurement chain may not be weaker than the HV bus class, and when the diagnostic/reporting path must also be galvanically separated. In that case you isolate the measurement itself and the data/control interface, so a single fault cannot couple HV into the low-voltage side.

How do I compensate Riso estimation for temperature/humidity drift?

Take ambient temperature, pack temperature or cabinet humidity from other BMS channels and feed it into the Riso calculation as a correction factor. In wet or condensing conditions, raise the reporting window or lower the trip aggressiveness to avoid nuisance stops, but still log every detection.

Should the self-test injected leak be above or below the warning threshold?

Keep it close to the warning threshold but slightly below, so that you can detect gain / offset drift without triggering a real warning or derate. If the project uses very tight thresholds, add a dedicated “maintenance window” where the self-test level can be temporarily higher.

What diagnostic fields should I log for post-failure analysis?

Log at least: timestamp, operating state (charging / standby / fault), estimated Riso, leakage direction, noise/quality level, threshold hit (warning / derate / trip), and the last self-test result. With these fields you can replay the exact conditions that caused the alarm later.

How do I choose between higher-spec ICs and more available ones for small-batch builds?

First satisfy voltage rating, isolation class and EMC repeatability using any of the seven brands listed on the page. Only then optimize for availability or price. If a dedicated IMD IC is not buyable, fall back to the “generic measurement chain + MCU algorithm” option and document the accuracy impact.