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Zero-Drift / Chopper Instrumentation Amplifiers (INA)

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Zero-drift (chopper/auto-zero) INAs deliver the most stable DC and low-frequency accuracy by suppressing offset and drift, making them ideal for weak, slow sensor signals. The real design work is controlling chopper artifacts (ripple/folding/rectification) and leakage × source impedance so the system’s 0.1–10 Hz resolution matches the budget in real hardware.

What is a Zero-Drift (Chopper / Auto-Zero) INA?

Key takeaway

A zero-drift INA is built to keep DC accuracy stable over time and temperature by continuously removing input-referred offset and drift, while pushing the 1/f corner down so low-frequency resolution becomes predictable. The trade is that switching-based techniques introduce artifacts (ripple, spikes, folding/IMD paths) that must be managed at the system level.

Best-fit use cases

  • Weak DC / slow sensors (temperature, pressure, bridges/load cells, slow current/voltage) where long-term stability sets the real resolution.
  • Low-frequency bandwidth (typically Hz to tens of Hz) where 0.1–10 Hz noise and drift dominate over wideband density.
  • Accuracy-first systems that prefer predictable DC error budgets and reduced recalibration frequency over maximum speed.

Trade-offs snapshot (what comes “with the win”)

What improves
  • Input-referred offset and drift become very small and more repeatable.
  • Low-frequency noise behavior is often cleaner (lower 1/f contribution).
  • DC error budgeting aligns better with calibration-lite strategies.
What must be controlled
  • Ripple / spikes near the internal chopping or auto-zero activity.
  • Folding / IMD: out-of-band interference can return as low-frequency errors.
  • Leakage + source impedance: board-level leakage can dominate µV-class DC goals.

When NOT to use (fast rules)

  • If bandwidth/latency is the primary constraint, prioritize a high-speed / low-latency INA family.
  • If the input sees strong RF/fast transients and robust filtering is not possible, folding/rectification paths can create false DC shifts.
  • If the system cannot tolerate switching-related ripple/spikes at any level, a different architecture may be safer.
Scope boundary

This section defines the selection boundary and trade-offs only. Generic INA architectures (classic 2-op-amp / 3-op-amp details) are not expanded here.

Data schema (selection fields)

Signal & sensor
Signal bandwidth (Hz) · Input amplitude (µV–mV) · Source impedance (Ω) · Cable length / environment
Accuracy targets
Offset (µV) · Drift (µV/°C) · 0.1–10 Hz noise (p-p) · Long-term stability window (time/temperature)
System constraints
Supply & headroom · Allowed ripple/spikes · ADC sampling (fs) · Filtering budget · Leakage budget
Selection map for zero-drift (chopper/auto-zero) INAs A decision flow diagram mapping signal profile and priorities to device families: zero-drift INA for weak DC, high-speed INA for dynamic signals, and classic INA for general cases. Decision map: signal profile → priority → best-fit INA family Keep the page boundary: choose the family first, then drill into artifacts and verification. Signal profile Primary priority Best fit Weak DC / slow Hz–tens of Hz Dynamic / pulses fast steps General purpose mixed needs DC stability offset + drift Bandwidth / latency transients Balanced cost + specs Zero-drift INA watch artifacts High-speed INA fast recovery Classic INA general cases ripple

Inside the Loop: Chopper vs Auto-Zero — How the Offset Is Removed

Two families, one goal

Chopper

Modulates the input so DC offset is shifted away from DC, then demodulates back. The “offset energy” moves to a switching region, leaving a cleaner low-frequency baseline.

Auto-zero

Periodically measures the amplifier’s own offset, stores it, then subtracts it. Offset becomes an estimated term with its own sampling and storage error mechanisms.

“Where does the error go?” (engineering view)

  • Chopper: offset is pushed near fchop (and harmonics). Any residual appears as ripple/spurs that filtering can target.
  • Auto-zero: offset becomes a periodically refreshed correction. New error terms appear from sampling and storage (kT/C, injection, settling).
  • Both techniques reduce low-frequency drift, but both create switching fingerprints that must be verified on real boards.

The unavoidable bill (what switching introduces)

Time-domain artifacts
  • Charge injection / clock feedthrough → spikes or steps.
  • Residual ripple around the internal activity rate.
  • Recovery behavior after overload or rail proximity can be non-ideal.
Frequency-domain risks
  • Spurs near fchop/fAZ that can leak into measurements.
  • Folding: out-of-band interference can reappear as low-frequency errors.
  • IMD/rectification paths that turn RF into “fake DC”.

Data schema (key frequencies & conditions)

Internal activity
fchop / fAZ · spur locations · ripple sensitivity
Signal path
Signal BW · allowed settling · filter corner (fLP) · headroom conditions
Sampling system
ADC fs · anti-alias strategy · interference bands to suppress

Bench hooks (fast verification)

  • Spectrum check: look for lines tied to fchop/fAZ and confirm they fall when low-pass filtering is tightened.
  • Sampling sensitivity: change ADC fs (or decimation/averaging) and observe whether artifacts fold into the measurement band.
  • Interference injection: apply controlled RF/fast-edge interference at the input and verify it does not return as a low-frequency DC shift.
  • Overload recovery: step common-mode or drive near rails and confirm recovery time and baseline return meet system limits.
Chopper versus auto-zero: offset removal and artifacts A split diagram showing two processing chains. The top chain is chopper: modulate, amplify, demodulate. The bottom chain is auto-zero: sample offset, store, subtract. On the right, a small artifact panel shows ripple, spikes, and folding risk. Minimal waveforms illustrate clean input and ripple/spike output. Offset removal: “move it” (Chopper) vs “estimate it” (Auto-zero) Both reduce low-frequency drift, and both create switching fingerprints that must be filtered and verified. Chopper path Auto-zero path Modulate fchop Amplify gain Demodulate residual ripple Sample offset fAZ Store kT/C + injection Subtract settling limits Input (slow) Output (ripple/spike) Artifacts Ripple Spikes Folding

Error & Noise Model for DC Sensors (Offset/Drift/1/f/0.1–10 Hz)

Key takeaway

For slow sensors, the real resolution ceiling is usually set by low-frequency behavior (drift + 0.1–10 Hz noise window), not by wideband noise density alone. Wideband density predicts short-window RMS; the 0.1–10 Hz window predicts long-window stability.

Three error buckets (control strategies differ)

Static
Offset (µV) · Gain error (%) → typically addressed with calibration and ratio-based system choices.
Temperature / time dependent
Offset drift (µV/°C) · Gain drift (ppm/°C) → addressed with thermal strategy, stabilization, and recalibration cadence.
Noise
0.1–10 Hz (p-p) · Wideband density (nV/√Hz) · 1/f corner (Hz) → addressed by bandwidth planning, filtering, and measurement-window design.

Why 0.1–10 Hz often sets the ceiling

  • Averaging reduces wideband white noise as the measurement bandwidth shrinks (short-window RMS improves).
  • Low-frequency components do not shrink the same way: 1/f behavior and drift-like terms remain visible across long windows.
  • Therefore, a design that looks excellent in nV/√Hz can still underperform in long-window DC stability if the 0.1–10 Hz window is not controlled.

Data path: datasheet noise → input-referred resolution (engineering conversion)

Wideband density → RMS
en (nV/√Hz) × √(BWmeas) → VWB,RMS (input-referred)
Use the system measurement bandwidth (after any filtering/averaging), not the small-signal amplifier bandwidth.
0.1–10 Hz p-p → equivalent RMS
Convert window p-p into an equivalent RMS using a single consistent rule across the whole budget (engineering approximation; the exact factor depends on noise distribution and filtering).
Treat 0.1–10 Hz as a long-window stability term (often closer to “visible wander” than to stationary white noise).
Combine terms (budget rule)
Separate static, drift, and noise. Combine only like-with-like: RMS terms via RSS; worst-case terms via guardband.

Error budget table fields (copyable schema)

DC accuracy
Offset (µV) · Gain error (%) · Offset drift (µV/°C) · Gain drift (ppm/°C)
Noise
0.1–10 Hz (p-p) · en (nV/√Hz) · 1/f corner (Hz) · BWmeas (Hz)
System window
Record length (s) · Averaging/decimation · Temperature span (°C) · Target resolution (µVRMS)
Conceptual noise spectrum for DC sensors: 1/f, white noise, and the 0.1–10 Hz window A conceptual plot showing a noise density curve that rises at low frequency due to 1/f noise and flattens at higher frequency to a white noise floor. The 0.1–10 Hz window is highlighted, along with a measurement bandwidth window to illustrate how low-frequency behavior can set resolution for slow sensors. Conceptual noise spectrum: low-frequency window often sets DC resolution Use the window (0.1–10 Hz) and measurement BW to translate datasheet specs into µV-level resolution. Frequency → Noise density 1/f region white floor 0.1–10 Hz window BW measurement Ceiling driver for slow sensors

Chopper Artifacts You Must Control (Ripple, Spikes, IMD, Noise Folding)

Key takeaway

Zero-drift performance is achieved with switching. Switching creates new paths that can turn out-of-band energy into in-band errors. Controlling artifacts means managing what enters (interference), what converts (nonlinear/rectifying paths), and what folds back into the DC/low-frequency band—then proving it on the bench.

Four artifact families (source → symptom → control)

Ripple
Source: modulation/demod residual, internal coupling
Symptom: tones near internal activity
Control: targeted low-pass / notch around artifact region
Spikes / steps
Source: charge injection, recovery events
Symptom: outliers in ADC codes / sample-to-sample jumps
Control: input/output RC shaping, sampling strategy, outlier handling
IMD / rectification
Source: RF/fast edges + nonlinear paths (clamps, input devices)
Symptom: “false DC shift” that tracks interference strength
Control: suppress RF at the input, keep clamps out of conduction, verify with injection tests
Noise folding
Source: sampling/modulation moves out-of-band noise into baseband
Symptom: low-frequency floor changes with fs or filtering
Control: anti-alias planning, bandwidth discipline, validate by sweeping fs

Symptom → likely path → first action (fast localization)

LF “drift” grows like noise
Likely: ripple/spur leaking into band or folding path
First action: identify tone location in spectrum, then tighten/shift filtering to see if it tracks.
Reading jumps when cable is touched
Likely: RF pickup → rectification, or leakage path change
First action: separate RF vs leakage: add temporary RF suppression and compare against a leakage/cleanliness check.
Noise changes when probing/grounding changes
Likely: measurement setup injects interference that rectifies/folds
First action: harden the test setup (shielding, short leads), then re-check spectrum for new tones.
More averaging does not stabilize results
Likely: low-frequency terms dominate (drift/folding), not wideband white noise
First action: sweep ADC fs / decimation and verify whether the LF floor moves.

Bench hooks (repeatable proof)

  • Spectrum capture: locate tones and verify they align with internal activity regions.
  • Filter sensitivity: shift the low-pass corner and confirm tone amplitude tracks predictably.
  • Interference injection: introduce controlled RF/fast edges and confirm no DC shift appears after mitigation.
  • Sampling sweep: vary ADC fs/decimation and watch for folding signatures in the LF band.
Artifact map for chopper and auto-zero amplifiers A block diagram mapping four artifact families (ripple, spikes, IMD/rectification, folding) to typical symptoms and first-line controls. A verification row highlights spectrum, filter shift, RF injection, and sampling sweep. Artifact map: family → symptom → control → verify Keep each box short; use the verify row to prove which path dominates. Family Symptom Control Ripple tones / ripple LF tone stable frequency LPF / Notch targeted attenuation Spikes outliers Code jumps sample hit RC / Timing avoid peaks IMD / Rectify RF → DC False shift tracks RF RF suppress keep clamps off Verify: spectrum shift fc inject RF sweep fs

Input Bias, Leakage, and Source Impedance — Why pA Matters

Key takeaway

In high-impedance sensor front ends, board-level leakage often becomes the real error floor before the device’s own input bias current does. The dominating chain is simple: (Ibias + Ileak,total) × Rsource → Verror.

Error chain (what actually creates the voltage error)

Primary equation
Verror ≈ (Ibias + Ileak,total) × Rsource
Ileak,total includes leakage through protection parts, PCB surface conduction under contamination/humidity, and connector/cable leakage.
Why high-Z is unforgiving
When Rsource is high, tiny currents become measurable voltages. After offset/drift are minimized by a zero-drift INA, leakage-driven voltage errors become visible as baseline wander, slow recovery, or humidity sensitivity.

Magnitude rules (fast intuition that prevents wrong debug paths)

10× rule
If Rsource increases by 10×, the same leakage current produces 10× more Verror.
Budget first, then select
Start from allowed Verror, back-calculate allowed Ileak,total, then distribute it across protection, PCB surface, and connectors.

Leakage culprits (top suspects in real hardware)

  • Protection parts: clamp/TVS leakage and “near-conduction” behavior at certain common-mode levels.
  • PCB surface conduction: flux residue, dust, fingerprints, moisture films, and condensation paths across pads.
  • Connectors/cables: humid contamination becomes a leakage bridge (often movement-sensitive).
  • Geometry effects: large exposed pads and long high-impedance traces collect contamination and increase surface conduction risk.

Leakage budget schema (copyable fields)

Budget inputs
Rsource (Ω) · Verror,max (µV) · Ileak,total,max (A) · humidity/temperature condition · cleanliness/process level · protection topology note
System constraints
stabilization/recovery time limit · recalibration cadence · enclosure/environment notes

Bench hooks (prove leakage dominance quickly)

  • Humidity A/B: compare baseline wander and recovery time in dry vs humid conditions.
  • Cleanliness A/B: re-test after controlled cleaning; a large improvement indicates board-level leakage dominance.
  • Protection A/B: temporarily change clamp topology and observe Verror sensitivity.
  • Cable touch/move: if the reading reacts strongly, treat connectors/surface paths as primary suspects.
Leakage + bias current creates voltage error through source impedance Block diagram showing sensor source resistance feeding an INA input node. Multiple leakage paths from clamp devices, PCB surface, and connector/cable are shown as arrows injecting leakage current into the high-impedance input node, producing an input-referred voltage error proportional to total current times source resistance. High-Z input node: leakage paths become measurable voltage error (I_bias + I_leak,total) × R_source → V_error Sensor DC / slow R_source Input node Zero-drift INA high CMRR µV-level offset V_error Clamp / TVS I_leak PCB surface humidity / residue Connector cable leakage I_bias reduce I_leak,total

Input CM Range & Near-Rail Linearity in Single-Supply Systems

Key takeaway

“Rail-to-rail” describes coverage, not guaranteed linearity or fast recovery right at the rails. In single-supply systems, performance is set by headroom: how far the input common-mode and output swing stay away from the rails under worst-case load and temperature.

What goes wrong near rails (typical failure modes)

Nonlinearity region
Close to a rail, internal devices and protection structures can enter boundary behavior, creating gain/offset nonlinearity that is not visible at mid-supply.
Slow recovery
Near-rail operation can slow overload or step recovery, producing long settling tails that resemble “drift” in DC measurements.
Condition mismatch
Common-mode range and output swing depend on conditions (VDD, load, output current, temperature). A “typical” plot may not match worst-case hardware.

Headroom planning (practical method for VCM / REF bias)

  1. Define required output swing (including ADC full-scale and expected margin).
  2. Set the operating common-mode (VCM or REF pin) so both input and output stay away from rails.
  3. Apply worst-case conditions: min/max VDD, max load/capacitance, max output current, temperature extremes.
  4. Lock the bias point (and guardband) before fine-tuning noise and filtering.

Condition fields (copyable checklist for datasheet-to-board alignment)

Supply & bias
VDD (V) · VCM range under conditions (V) · REF pin range / recommended bias point
Output & load
output swing vs load · output current limit · Cload region notes (if provided)
Linearity & recovery
linearity vs VCM (if available) · overload recovery condition/time · temperature range/guardband

Fast decision actions (if linearity collapses in a VCM segment)

  • Move the bias point: shift VCM/REF away from the rail and re-check gain/offset linearity.
  • Increase headroom: adjust supply or output reference so the output no longer clips or “rides the rail.”
  • Re-validate under load: confirm behavior with the real load and capacitive conditions.
  • If sensitivity remains: treat near-rail operation as out-of-spec for the design target and lock a safer operating window.

Bench hooks (confirm headroom as the root cause)

  • VCM sweep: sweep common-mode (or REF) and log gain/offset vs VCM; look for a sharp knee near rails.
  • Load sweep: change load/Cload and confirm output swing or recovery time changes near rails.
  • Step recovery: apply a controlled step and measure return-to-baseline time; near-rail slow tails indicate headroom stress.
Headroom windows for input common-mode and output swing in single-supply systems A bar-style diagram showing VDD rails with near-rail risk zones, an allowed input common-mode window, and an output swing window around a REF marker. The graphic emphasizes moving the bias point to keep both input and output away from rails for linearity and recovery. Headroom windows: keep VCM and Vout away from rails Rail-to-rail coverage ≠ near-rail linearity or fast recovery Supply (VDD) risk risk VDD GND Input common-mode (VCM) window VCM allowed Output swing window Vout swing REF move bias point

Filtering & Bandwidth Planning (Low-Pass, Notch, and Anti-Ripple)

Key takeaway

Zero-drift filtering is not “add an RC and hope.” Filtering must target artifact frequencies (ripple/spurs) and real sensor dynamics. The correct order is: define BWsignal → set settling limits → choose LPF / notch and validate both ripple suppression and recovery time.

Planning flow (make bandwidth mean something)

Step 1 — Define sensor dynamics
Set BWsignal based on the fastest meaningful change that must be preserved (control/step events, mechanical dynamics, thermal time constants, etc.).
Step 2 — Lock settling / recovery limits
Define tsettle,max after steps (range changes, sensor excitation shifts, overload events). Slow systems are the most sensitive to added filter tails.
Step 3 — Target artifact frequencies
Identify fartifact (chopper ripple/spurs) and any RF that can be rectified into baseband. Plan attenuation where it matters instead of lowering bandwidth blindly.

LPF vs notch (division of labor)

Low-pass (LPF)
Broad suppression for ripple and RF energy. More robust to frequency drift, but adds delay and can slow step recovery if fc is pushed too low.
Notch
Narrow-band “spur killer” with less impact on dynamics. Works best when the artifact frequency is stable and predictable; tolerances and drift must be considered.

The real cost of over-filtering (what users feel)

  • Long settling tails: a slower return-to-baseline can be mistaken as “drift.”
  • Worse overload recovery: near-rail and overload events take longer to recover when the measurement bandwidth is pushed too low.
  • Hidden low-frequency floor: aggressive filtering can mask fast noise but expose slow artifacts, leakage, or thermal gradients.

Data schema + action rules (make filtering auditable)

Fields (copyable)
BWsignal (Hz) · tsettle,max (s) · fartifact (Hz) · fcLPF (Hz) · notch center/Q (if used) · Attn@fartifact (dB) · delay/phase constraint · ADC sampling/decimation note (optional)
Rules (do in this order)
  1. Set fc for dynamics first: keep fc just above BWsignal so real motion/steps are not overly smoothed.
  2. Check attenuation at artifacts: require a minimum Attn@fartifact; add order/notch or move the filter point if needed.
  3. Verify settling every time: any fc/order change must re-pass tsettle,max and overload recovery checks.

Verification hooks (avoid “looks good” traps)

  • Spectrum check: confirm ripple/spur amplitude drops at fartifact as expected.
  • Step check: apply a defined step and measure tsettle; filtering must not violate the recovery budget.
  • Interference injection: introduce controlled RF/fast edges and confirm “fake DC” does not appear at the output.
  • Placement A/B: compare input-side vs output-side filtering to isolate the most effective suppression point.
End-to-end filtering plan for zero-drift INA systems Block diagram showing Sensor to Zero-drift INA to LPF/Notch to ADC. Arrows mark where ripple and RF interference enter and where filtering suppresses them. A short rule strip emphasizes planning order: signal bandwidth, cutoff, attenuation at artifact frequency, and settling verification. Plan filtering around artifacts and real sensor dynamics BW_signal → fc → Attn@artifact → verify settle Sensor BW_signal Zero-drift INA ripple / spur artifact LPF / Notch reduce RF kill spur ADC BW_meas Cable RF Clamp path attenuation point

Measurement & Verification: Measure 0.1–10 Hz Noise and Drift Correctly

Key takeaway

Low-frequency noise and drift measurement is often limited by the test setup, not the DUT. A credible result needs a fixed time window, defined bandwidth, controlled thermal/airflow conditions, and repeatable handling rules for cables and shielding.

Three hard requirements for 0.1–10 Hz results

Sufficient record length
The time record must support the defined low-frequency window. Short records inflate uncertainty and make comparisons meaningless.
Defined effective bandwidth
The effective measurement bandwidth must match the digital processing (filtering/averaging/decimation). Otherwise results are not comparable.
Detrend rule
Drift and thermal tails must be handled consistently; otherwise drift gets counted as noise and “noise” appears to change run-to-run.

Thermal and airflow control (the biggest fake-noise source)

  • Airflow creates thermal gradients that show up as low-frequency movement.
  • Hands and nearby objects act as heat sources; treat proximity as a disturbance.
  • Shielding + enclosure must reduce both EMI pickup and thermal convection effects.

Drift measurement (make “soak time” objective)

Temperature step
Define ΔT, define a stability threshold, and log the time to reach stability. Do not rely on a fixed “minutes” rule.
Temperature sweep
Use defined temperature points and a consistent settle criterion per point. The reporting must include points, thresholds, and the time window used.

Identify chopper artifacts (separate DUT from setup)

  • Spectrum signature: narrow features around a characteristic ripple/spur frequency indicate chopper-related content.
  • Time-domain signature: spikes or periodic ripple patterns indicate sampling/charge-injection artifacts.
  • Sanity check: changing fc or notch placement should move or attenuate the signature in a predictable way.

Setup self-sabotage checklist (most common failure modes)

  • Probe/ground changes alter pickup and bias paths.
  • Cable movement modulates leakage/rectification and looks like drift.
  • Reference/supply noise becomes low-frequency output movement through PSRR limits.
  • Shorting method differences change the effective input network and leakage paths.
  • Digital processing mismatch (averaging/filter settings) changes effective bandwidth and invalidates comparisons.

Minimal test schema (copyable fields)

Fields
sampling rate (S/s) · record length (s) · effective BW (Hz) · window definition (0.1–10 Hz method) · detrend method · temperature points / ΔT · stability threshold · shielding/enclosure · cable handling rule · reference/supply condition

Production-friendly simplification (do not fake an absolute spec)

Short-window consistency
Use a fixed short window and compute a consistent metric (RMS or p-p) for screening and repeatability checks.
Golden / reference channel comparison
Compare the DUT against a stable reference channel to subtract common environmental terms. Use the result for outlier detection, not absolute 0.1–10 Hz claims.
Low-frequency noise and drift test fixture for zero-drift INA A test fixture diagram showing a DUT inside a shield box connected to a low-noise source or shorting option and a data acquisition system for logging. Arrows indicate major disturbance sources such as airflow, thermal gradients, and cable touch. A simple flow strip shows record, detrend, spectrum, and 0.1–10 Hz evaluation. Measure 0.1–10 Hz noise and drift with a controlled fixture Record → detrend → spectrum → 0.1–10 Hz metric Shield box DUT INA board Low-noise source or short DAQ / ADC logging Airflow Thermal gradient Cable touch Record Detrend Spectrum 0.1–10 Hz

Layout & Protection That Won’t Ruin Zero-Drift (Guarding, RC, Clamps)

Key takeaway

Zero-drift INAs reduce internal offset/drift so much that board leakage, protection-device leakage, input rectification, and series-resistor thermal noise can become the dominant error. Layout and protection must pass leakage, noise, and artifact budgets together.

Common failure signatures (symptom → likely cause)

Humidity-dependent drift
PCB surface contamination and moisture create leakage paths that overwhelm the microvolt-level baseline.
Touch / cable move → reading jumps
A rectification path or a modulated leakage path turns handling into apparent low-frequency signal movement.
RC added → slower recovery
Over-filtering adds long tails after steps/overload; users perceive it as “drift” or “instability.”
Noise increased after protection
Series resistance raises thermal noise and can amplify bias/leakage-related errors through source impedance.

Guarding + cleanliness + moisture control (make leakage non-dominant)

  • Guard ring routes leakage away from the high-impedance input node by surrounding it with a controlled-potential ring.
  • Surface condition is part of the electrical design: cleaning, residue control, and coating strategy must be defined, not implied.
  • Moisture sensitivity must be verified; treat humidity as a stress condition, not an afterthought.

Input series R / RC: three budgets that must all pass

RF / rectification budget
Series R and input C reduce RF energy reaching non-linear paths. This suppresses “fake DC” caused by rectification.
Noise budget
Series resistance adds thermal noise. The impact must be evaluated using the same effective bandwidth definition used for system noise budgeting.
Bias/leakage error budget
Any input current (device bias + clamp leakage + PCB leakage) creates an input-referred error when multiplied by source impedance and series resistance.

Protection devices: leakage and near-conduction are the real penalties

  • Leakage vs temperature: Ileak(T) must be treated as an input current term and mapped into input-referred error through source impedance.
  • Near-conduction behavior: clamps that enter the knee region can create rectification/IMD, turning RF bursts into low-frequency output movement.
  • Staging matters: place high-energy protection away from the high-impedance node; use low-leakage parts close-in only when their leakage is budgeted.

Layout & protection review checklist (production-minded)

  • Keep high-impedance input copper small and protected; minimize exposed flux-residue risk near the input node.
  • Close a guard ring around the sensitive node and tie it to the correct reference potential for the input network.
  • Route differential inputs symmetrically and keep the pair tightly coupled; avoid asymmetric parasitics that create rectification paths.
  • Use staged protection: energy handling near the connector, low-leakage / low-nonlinearity parts near the high-impedance node only when budgeted.
  • Define cleaning/coating steps and humidity handling as part of the build plan; verify with humidity A/B testing.

Risk → fields (turn layout/protection into an auditable budget)

Leakage risk
I_leak(device) vs Temp · PCB surface resistance / cleanliness level · humidity condition · R_source · V_error,max → I_leak,total,max
Noise risk
R_series · effective BW (Hz) / fc · noise target (µV_rms) · integration method note
Rectification / distortion risk
RF/pulse environment note · clamp knee/near-conduction note · artifact symptom check (spur / fake DC / spikes)
PCB layout and protection staging for a zero-drift INA input Minimal PCB-style diagram showing connector, staged protection, differential routing, guard ring around a high-impedance input node, Kelvin sense lines, and leakage arrows pointing to the sensitive node. Emphasizes that leakage, noise, and rectification must all be budgeted. Layout + protection must pass leakage, noise, and rectification budgets Stage protection · guard high-Z nodes · keep paths symmetric Connector IN+ / IN− Stage 1 TVS Series R RC option RF stop High-Z Guard S2 clamp Kelvin sense Leakage Noise Rectification

Calibration Strategy for Zero-Drift Systems (When It Helps and When It Doesn’t)

Key takeaway

Calibration removes structured offset/gain terms, but it cannot remove the noise floor or chopper artifacts such as folding/IMD/spikes. The practical value of zero-drift is reducing how often calibration is needed to hold accuracy.

What calibration can and cannot fix

Can fix (structured)
  • Offset (input-referred baseline)
  • Gain error (scale factor)
  • Stable temperature slope (only if repeatable)
Cannot fix (fundamental / artifact)
  • 0.1–10 Hz noise floor / wideband noise floor
  • Folding / rectification / IMD pseudo-signal
  • Overload recovery tails created by bandwidth choices

2-point vs multi-point/LUT (upgrade only with prerequisites)

2-point (offset + gain)
Default choice when the remaining error is dominated by linear terms. Keeps production and field maintenance simple.
Multi-point / LUT
Use only when residuals show clear nonlinearity and coefficients remain stable. If measurement uncertainty is not well below the residual, LUT fitting writes noise into the coefficients (overfitting).

The two gates: coefficient stability and measurement uncertainty

Gate 1 — Coefficients are stable
Check stability across temperature, time, and lot variation. Unstable coefficients do not justify more points.
Gate 2 — Uncertainty is low enough
The calibration measurement chain must be quieter and more stable than the residual being corrected; otherwise coefficients track the setup, not the DUT.

Decision schema (fields that make calibration repeatable)

Fields (copyable)
target accuracy · drift slope (µV/°C) · allowed calibration interval · measurement uncertainty (µV_rms) + bandwidth definition · residual threshold after 2-point · coefficient stability flags (temp/time/lot) · artifact risk flag (ripple/IMD/folding present?)

Outputs (what the strategy must produce)

  • Recommended level: none / 2-point / multi-point / LUT
  • Recommended interval: field/service cadence based on drift and stability, not preference
  • Residual threshold and pass/fail gates for “upgrade to LUT”
  • Fallback if gates fail: improve measurement chain, layout/leakage control, or filtering—not more points
Calibration decision flow for zero-drift systems A decision flowchart showing when 2-point calibration is sufficient and when multi-point or LUT may be justified. Two prerequisites gates are shown: coefficient stability and low enough measurement uncertainty. If gates fail, the flow returns to fixing setup, layout, or filtering. Calibrate structured terms; do not expect calibration to remove noise or artifacts Default: 2-point → upgrade only if stability + uncertainty gates pass Need accuracy? define target 2-point offset + gain Residual OK? threshold Gate 1 coeff stable Gate 2 uncertainty low Multi-point / LUT only if gates pass Fix before upgrading setup / layout / filtering

Engineering Checklist (Design Review + Debug Checklist)

Goal of this section

Convert zero-drift INA specs into a repeatable review checklist and a fast debug path. The priority order is fixed: first eliminate thermal/leakage causes, then validate ripple/folding/rectification.

1) Requirement freeze (fill these first)

  • Signal BW (Hz) and step behavior (slow ramp / steps / occasional overload)
  • Target resolution (µVrms or equivalent input) and allowable drift over time
  • Temperature: range + gradients (airflow, hot parts nearby, enclosure)
  • Wiring: cable length, shielding, touch/move allowed or forbidden
  • Humidity/contamination: cleaning/coating requirement and expected RH range
  • Supplies & references: VDD, REF/VCM target, headroom limits
Why freeze matters

Without a frozen bandwidth, window length, and environment definition, “drift” and “noise” numbers have no common measurement basis and troubleshooting becomes non-repeatable.

2) Circuit review (items that commonly break zero-drift performance)

CM headroom
Verify input common-mode and output swing stay inside linear windows (RRI/RRO does not guarantee linearity at the rails). If nonlinearity appears near rails, shift VCM/REF or increase supply headroom.
Filtering
Set sensor bandwidth first, then filter. Ensure sufficient attenuation at chopper/auto-zero artifact frequencies while meeting settling-time targets. Avoid over-filtering that creates long recovery tails after steps.
Protection leakage budget
Model clamp/TVS leakage vs temperature as an input current term. Map leakage into input-referred error through source impedance and series resistance. Avoid near-conduction regions that can rectify RF into apparent low-frequency output movement.
Series R thermal noise
Series resistance improves RF robustness but adds thermal noise. Evaluate noise using the same effective bandwidth definition used for system resolution (0.1–10 Hz window and/or integrated BW).
ADC/DAQ interface (boundary only)
Confirm the sampling window and front-end settling meet the target error. If the measurement chain clips, aliases, or drifts more than the DUT, calibration and debug conclusions become invalid.

3) Layout review (prioritized)

P0 (must pass)
  • Minimize exposed high-impedance copper near IN±; define cleaning/coating for the sensitive zone
  • Guard ring around sensitive nodes; guard reference potential defined and routed cleanly
  • Protection staging: energy handling away from the high-Z node; low-leakage parts near input only when budgeted
  • Return paths for protection currents do not flow through sensitive ground/reference areas
P1 (strongly recommended)
  • Symmetric differential routing and matched parasitics to avoid rectification-sensitive asymmetry
  • Connector-to-input routing short and controlled; avoid bringing digital edges close to high-Z inputs
  • Clear rules for cable shield termination and handling during test (touch/move constraints)

4) Debug quick path (symptom → two-step isolation)

Step 1 — Eliminate thermal/leakage causes
  • Run humidity A/B and airflow A/B; check for repeatable drift changes
  • Enforce cable handling rule; compare “no-touch” vs “touch/move” behavior
  • Swap to lower-leakage clamps or remove suspect protection temporarily (controlled test)
  • Inspect and clean sensitive zone; compare before/after readings under the same window
Step 2 — Validate ripple/folding/rectification
  • Check spectrum for artifact-related components (ripple tones, spikes, folding signatures)
  • Inject controlled RF/pulse disturbance; verify whether it produces fake low-frequency movement
  • Verify filter attenuation around artifact frequencies; adjust fc/order to meet settling constraints
  • Confirm the measurement chain does not alias or clip; otherwise artifacts can be measurement-made

5) Minimal test fields (make results reproducible)

Record these fields

sample rate · record length · effective BW definition · detrend rule · temperature points · soak/stability threshold · shielding method · cable handling rule · reference source ID · measurement-chain uncertainty note

6) Production readiness (record fields that enable feedback)

  • Calibration version and coefficient version per unit/channel
  • Fixture ID, reference ID, and window parameters used for acceptance
  • Short-window consistency metric (fast screen) plus a golden-channel comparison path
  • Environmental notes (RH/temperature) for any outliers and re-test results after cleaning

Checklist field table (project-fill template)

Field Example entry format Notes
R_source 10 kΩ / 1 MΩ Used for leakage→error mapping
Target BW 0.5 Hz / 10 Hz Defines filter and noise window basis
Settling target ≤ X s to Y ppm Avoid over-filtering tails
I_leak budget A @ Temp/RH Includes clamps + PCB surface
VCM / REF VCM=… V, VDD=… V Headroom and linear window check
Shield / guard yes/no + location Define sensitive zone boundaries
Test window N seconds @ Fs Defines 0.1–10 Hz / drift metrics
Checklist map from requirements to production feedback A box diagram showing a closed-loop checklist flow: Requirements to Circuit to Layout to Test to Production, with a feedback arrow back to Requirements. Each block contains minimal keywords. Emphasizes freeze, review, verify, and record. Checklist map: freeze → review → verify → record (closed loop) Use the same fields from design review through debug and production Requirements BW · Res Env · Cable Circuit Headroom Filter · Leak Layout Guard Staging Test Window A/B stress Production Record fields Feedback feedback → update requirements Freeze · Review · Verify · Record

Applications (Where Zero-Drift INA Wins — and What to Watch)

Scope boundary for this page

Applications are limited to weak DC / slow sensors. Do not use this section to select high-speed or low-latency INAs. Use the template below to map each application to the three dominant specs: 0.1–10 Hz noise, drift, and bias/leakage.

3-field application template (input → spec mapping)

Fill these three fields

(1) signal level (µV/mV) · (2) source impedance (Ω → MΩ) · (3) target bandwidth (Hz)

Then prioritize these specs

0.1–10 Hz noise (resolution ceiling) · offset drift (long-term stability) · input bias/leakage (error through R_source) · CM headroom (single-supply linear window)

A) Temperature front-ends (RTD / thermocouple-class weak DC)

Why zero-drift wins

Slow signals make 0.1–10 Hz noise and drift the dominant limits. Zero-drift reduces baseline offset changes so the system can hold accuracy with fewer recalibrations.

Watch-outs

Thermal gradients, airflow, and board leakage often dominate the remaining error. Define a stable test window and cable-handling rule before trusting drift numbers.

Key specs to prioritize
  • 0.1–10 Hz noise (p-p) and drift (µV/°C)
  • Input bias/leakage vs temperature (pA-level behavior)
  • Single-supply CM/REF headroom window (avoid near-rail nonlinearity)
Quick hooks

Guard sensitive nodes · control humidity/cleaning · verify drift with airflow A/B · filter artifacts without adding long tails

B) Bridge sensors (strain / pressure / weighing-class)

Why zero-drift wins

Bridge outputs are small and slow; long-term stability is often limited by low-frequency noise and drift. Zero-drift reduces baseline movement so the bridge output can be resolved without frequent re-zeroing.

Watch-outs

Lead resistance changes and bridge imbalance can shift common-mode and stress headroom. Leakage paths near the input node can become the dominant error in humid/dirty environments.

Key specs to prioritize
  • 0.1–10 Hz noise and drift (dominant for slow weighing)
  • Realistic CMRR under wiring/source mismatch conditions
  • Bias/leakage vs temperature (error through R_source)
Quick hooks

Control leakage with guarding + cleaning · stage protection away from the high-Z node · validate with humidity A/B and cable-touch tests

C) Slow current sensing (low-bandwidth shunt monitoring)

Why zero-drift wins

Slow current changes push the limit to low-frequency noise and drift. Zero-drift helps maintain a stable baseline so small long-term current deltas remain measurable.

Watch-outs

Common-mode planning and headroom define whether the system remains linear. Protection devices near-conduction can rectify switching noise into low-frequency output movement.

Key specs to prioritize
  • Input CM range and REF/VCM headroom window
  • 0.1–10 Hz noise and drift (baseline stability)
  • Leakage vs temperature (especially with protection)
Quick hooks

Keep clamps out of the sensitive node region · use staged protection · filter RF without excessive settling tails · verify with controlled disturbance tests

Reference examples (part numbers; starting points only)

These part numbers are provided to speed up datasheet lookup and lab verification. Final selection must follow the template above (signal level · source impedance · target bandwidth) and the checklist fields (leakage budget · headroom · test window definition).

Low-power zero-drift INAs (portable weak-DC)
TI INA333 · ADI AD8237 · Microchip MCP6N11
Wide-supply / higher CM scenarios (still low-frequency)
TI INA188
Programmable-gain / digitally controlled (multi-range DAQ)
ADI LTC6915 · Renesas ISL28533
Classic precision reference (zero-drift INA baseline)
ADI LTC1100
Auto-zero route reference (slow sensor front-ends)
ADI AD8230
Additional zero-drift INA family examples
TI INA317 · Microchip MCP6N16
Application matrix for zero-drift INAs: why and watch-outs A 3-column by 2-row matrix: Temperature, Bridge, and Slow Current. Rows are Why and Watch-outs. Each cell contains minimal keywords and a simple icon per column. Application matrix: weak DC / slow sensors only Columns = application; rows = why it wins / what to watch Why wins Watch outs Temp Bridge Slow current Low drift Low 1/f Stable baseline Fewer re-zero Small deltas Low LF noise Thermal gradient Leakage CM movement Humidity Headroom Rectification

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FAQs (Zero-Drift / Chopper INA)

This FAQ is strictly limited to zero-drift INA behavior: 0.1–10 Hz noise, drift, bias/leakage, chopper artifacts, single-supply headroom, and measurement repeatability. Each answer includes a minimal data field set, actions, and a verification step.

Common data rules used below
  • Window requirement: to resolve 0.1 Hz content, use T_record ≥ 10 s minimum; for stable results, use a longer window consistent with the project spec.
  • Engineering conversion: for low-frequency noise, a common rule is RMS ≈ (p-p) / 6 to 7 (depends on statistics + windowing; keep the same rule across comparisons).
  • Leakage mapping: V_error = I_total_leak × R_source (include clamps + PCB surface leakage; evaluate vs temperature and humidity).
Why is measured 0.1–10 Hz noise much higher than the datasheet?
Data fields
Fs_record · T_record · BW_eff · detrend_method · window_rule · V_0.1–10Hz_pp · V_rms_est · shielding_state · airflow_state
Quick checks (do these first)
  • Time window: confirm T_record and the exact 0.1–10 Hz processing method match the datasheet’s method (or document a consistent local method).
  • Detrend: remove slow drift/thermal slope before computing noise; otherwise drift is counted as “noise”.
  • Effective bandwidth: confirm BW_eff (analog + digital) is known and consistent across tests.
Likely causes
  • Thermal gradients / airflow / hand proximity injecting low-frequency movement.
  • Measurement chain 1/f dominating the result (reference source, ADC/DAQ, cabling).
  • Artifact leakage into the baseband because filtering and BW_eff were not controlled.
Fix actions
  • Freeze a test protocol: Fs_record, T_record, BW_eff, detrend_method, and window_rule.
  • Run A/B tests: airflow on/off and shielding on/off; log the delta in V_0.1–10Hz_pp.
  • Validate the measurement chain by swapping to a known low-noise reference and comparing outcomes.
Verify

With a frozen protocol, repeated runs converge and A/B conditions produce predictable changes. If results vary widely run-to-run, the test is not stable yet.

Why does the reading slowly drift after increasing input resistance / source impedance? How to do a leakage budget?
Data fields
R_source · V_error_limit · I_total_leak_max · Temp · RH · clamp_I_leak(Temp) · PCB_surface_leak · cleaning_state
Core rule
V_error = I_total_leak × R_source  →  for the same leakage current, 10× higher R_source creates 10× higher error.
Actionable leakage budget steps
  1. Set an allowable input-referred error: V_error_limit (µV or mV).
  2. Compute the total leakage limit: I_total_leak_max = V_error_limit / R_source.
  3. Allocate I_total_leak_max across: clamp/TVS leakage, input network leakage, and PCB surface leakage (evaluate vs Temp/RH).
  4. Validate with humidity A/B and cleaning A/B; leakage-dominated drift changes strongly with RH/contamination.
Verify

After mitigation, drift slope and settling behavior remain within V_error_limit across the defined RH/Temp range.

Why can an input RC make the signal look “more jittery”? Folding or measurement-chain issues?
Data fields
R_series · C_in · fc · f_chop_or_ripple · BW_target · settling_target · FFT_spurs · anti_alias_state
Quick checks
  • Check FFT for new tones/spurs: if they align with f_chop_or_ripple or fold into the baseband, artifacts are likely involved.
  • Check if “jitter” is actually a longer settling tail: over-filtering increases recovery time after steps.
  • Confirm the measurement chain’s anti-alias behavior did not change (BW_eff and digital filtering).
Fix actions
  • Design fc from requirements: keep fc just above BW_target but ensure sufficient attenuation at f_chop_or_ripple.
  • Reduce rectification risk: avoid placing nonlinear protection near the sensitive node; stage protection away from the input.
  • Re-run with a frozen BW_eff and window protocol; compare FFT_spurs before/after RC changes.
Verify

With fc and BW_eff controlled, spur locations and baseband noise behavior change in a predictable, explainable way.

A fixed-tone ripple (“hum”) appears at the output. How to distinguish chopper ripple vs power-supply ripple?
Data fields
f_ripple · f_sw · f_chop_or_ripple · VDD_state · load_state · input_state(short/open/nominal) · FFT_spurs
Quick isolation tests
  • Supply A/B: change VDD_state (or supply source) and observe ripple amplitude change at f_ripple.
  • Load A/B: change load_state; supply-driven ripple often scales with load/ground return conditions.
  • Input A/B: short/quiet the input; chopper-related ripple may persist even with a quiet input.
  • Frequency alignment: compare f_ripple to known f_sw and expected f_chop_or_ripple signatures.
Fix actions
  • If supply-driven: improve supply impedance at the INA pins, fix return paths, and reduce coupling into REF/VCM nodes.
  • If chopper-driven: add targeted attenuation near f_chop_or_ripple (without violating settling_target) and reduce injection paths.
Verify

Ripple amplitude at f_ripple becomes stable, and A/B tests (VDD/input/load) point to one dominant coupling path.

Touching or moving the cable causes jumps. Which two paths should be checked first (rectification vs leakage)?
Data fields
touch_event_profile(immediate/slow) · RH · cleaning_state · shield_state · clamp_state · FFT_spurs · I_total_leak_est · R_source
Two-path priority rule
  • Leakage path: usually shows slow drift / slow recovery and is sensitive to RH, contamination, and cleaning.
  • Rectification path: often shows instant jumps and correlates with RF pickup, shielding, and near-conduction nonlinearity.
Fix actions
  • If leakage-dominated: enforce guarding + cleaning/coating; quantify I_total_leak_est and verify V_error = I_total_leak × R_source.
  • If rectification-dominated: improve shielding/grounding and reduce nonlinear elements at the sensitive node (stage protection away); add targeted RF suppression.
Verify

Under a defined cable-handling rule, touch events no longer cause out-of-budget shifts, and the dominant mechanism is identifiable via A/B tests.

Near the rails, linearity degrades or recovery becomes slow. How to set VCM/REF for stability?
Data fields
VDD · VCM_target · VREF · Vout_swing_limit · load · gain · VCM_sweep_result · recovery_time
Quick checks
  • Run a VCM sweep at the target gain and load; look for regions with rising nonlinearity or long recovery_time.
  • Confirm REF/VCM node is low-impedance and well-decoupled; coupling into REF/VCM becomes apparent near rails.
Action rule

Choose VCM_target/REF so both input and output stay inside the linear headroom window with margin at the worst-case load and temperature. “Rail-to-rail” does not guarantee linearity at the rails.

Verify

In the chosen window, VCM_sweep_result shows flat error and recovery_time remains within the project’s settling target.

After calibration, the reading shifts again with temperature. Is it drift or thermal gradients/thermoelectric effects?
Data fields
Temp_profile(step/sweep) · soak_threshold · airflow_state · gradient_state · polarity_test · residual_after_cal · drift_slope_est
Fast discrimination tests
  • Gradient A/B: keep the same temperature but change airflow/gradient_state; large changes indicate gradients dominate.
  • Soak rule: enforce soak_threshold; premature readings look like drift but are still settling thermally.
  • Polarity test: reverse input polarity (or swap inputs) under controlled conditions; persistent sign behavior can hint at thermoelectric coupling.
Fix actions
  • If true drift: expand temperature points or reduce calibration interval; track drift_slope_est across lots.
  • If gradients dominate: improve thermal symmetry, reduce airflow sensitivity, and stabilize the fixture and cabling.
Verify

residual_after_cal remains within the defined budget when gradient_state is controlled and soak_threshold is met.

After adding clamp diodes/TVS, the offset increases. How to tell device leakage vs PCB contamination?
Data fields
clamp_part_id · clamp_I_leak(Temp) · PCB_cleaning_state · RH · R_source · offset_shift · time_dependence(slow/fast)
A/B tests (fast and decisive)
  • Cleaning A/B: compare offset_shift before/after cleaning under the same RH and test window.
  • Humidity A/B: raise/lower RH; contamination-driven surface leakage often scales strongly with RH.
  • Clamp swap: replace clamp_part_id with a lower-leakage option and re-test; device leakage shows as part-dependent behavior.
Budget check

Compute expected offset from leakage: V_error = clamp_I_leak(Temp) × R_source. If the predicted V_error matches offset_shift magnitude and its temperature trend, device leakage is a primary suspect.

Verify

offset_shift becomes stable across RH, and time_dependence no longer shows slow “creep” after handling.

Wideband noise looks small, but low-frequency resolution is still poor. Why?
Data fields
en(nV/√Hz) · f_corner · V_0.1–10Hz_pp · BW_eff · V_rms_est · target_resolution · drift_slope_est
Key point

Low-frequency resolution is limited by 0.1–10 Hz noise, 1/f behavior, and drift/gradients—not by wideband density alone.

Fix actions
  • Set the requirement in the same domain as the application: target_resolution in the 0.1–10 Hz (or defined) window.
  • Control drift/gradients: enforce a stable thermal condition and detrend consistently.
  • Ensure BW_eff matches the assumed integration bandwidth for any RMS estimate.
Verify

V_rms_est in the defined window falls below target_resolution and remains stable across repeated runs.

When should a zero-drift INA NOT be chosen? One rule for a decision.
Data fields
BW_target · settling_target · overload_recovery_need · artifact_tolerance · latency_need · dominant_error_type
One-rule decision
If the system’s dominant error is dynamic settling / recovery / latency (not low-frequency drift/noise), do not prioritize a zero-drift INA.
Practical action
  • Define dominant_error_type: “LF stability” vs “dynamic response”.
  • Test step/overload and measure settling_target and overload recovery time; compare to the application’s need.
  • If dynamic response dominates, consider a non-chopped solution optimized for bandwidth/recovery.
Verify

The chosen amplifier meets settling_target and overload recovery requirements with margin under worst-case conditions.

Large drift is seen in the first minutes after power-up. Warm-up, thermal gradients, filter tails, or leakage creep?
Data fields
time_since_power · drift_slope_est · airflow_state · RH · cleaning_state · fc · settling_target · time_constant_fit
Two-step isolation
  1. Thermal A/B: hold airflow_state constant vs change it; large sensitivity indicates gradients dominate.
  2. Leakage A/B: change RH and cleaning_state; slow “creep” often follows humidity/contamination.
Fix actions
  • If filter tail dominates: adjust fc to meet settling_target; verify time_constant_fit matches the filter behavior.
  • If leakage dominates: apply leakage budget and reduce sensitive-node exposure; enforce cleaning/coating rules.
  • If thermal dominates: improve thermal symmetry, reduce airflow coupling, and stabilize the fixture.
Verify

drift_slope_est after the warm-up period remains within the project’s budget across the defined RH/airflow conditions.

The 0.1–10 Hz result changes when sample rate or record length changes. What is inconsistent?
Data fields
Fs_record · T_record · BW_eff · anti_alias_state · detrend_method · window_rule · V_0.1–10Hz_pp
Common inconsistencies
  • Different detrend_method (or none) across runs.
  • Different BW_eff due to changing digital filters or anti-alias configuration.
  • Different window_rule (processing, segmentation, or statistics).
Fix actions
  • Publish a single test protocol: Fs_record, T_record, BW_eff, detrend_method, and window_rule.
  • Lock the measurement chain configuration (anti_alias_state) and document it with each dataset.
  • Only compare V_0.1–10Hz_pp across runs that share the same protocol.
Verify

With a locked protocol, V_0.1–10Hz_pp becomes consistent and changes mainly reflect real DUT behavior, not measurement settings.