HDMI Tx/Rx (2.0/2.1): TMDS/FRL, EDID, HDCP Bring-up
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This page turns HDMI Tx/Rx (2.0/2.1) bring-up into a deterministic checklist: identify whether failures come from mode (TMDS/FRL), sideband (EDID/DDC/HPD/5V), HDCP state, or SI/clock margin.
It provides a practical path from “video shows” to “stable + compliant”: what to log, what to measure, what to change, and how to pass with quantified criteria (X).
H2-1. What HDMI Tx/Rx Really Means (Scope + System View)
HDMI Tx/Rx is a complete engineering system: high-speed data (TMDS/FRL), sideband control (DDC/HPD/CEC/5V), and content protection (HDCP) must all remain stable to qualify as a usable link.
- Main link: TMDS/FRL must lock and stay locked under stress (temperature, cable swaps, hot-plug).
- Sideband: EDID/DDC/HPD/CEC failures can look like “SI problems” but are not.
- Protection: HDCP success is a system state, not a single pin or register.
- Usable link: verify in layers (PHY → Link → Video → HDCP), with measurable pass criteria.
Roles & responsibility boundaries: Source / Sink / Capture
- Source (Tx): initiates the session, selects output format/timing, and must handle mode selection (TMDS vs FRL) and HDCP policy.
- Sink (Rx / Display): advertises capability (EDID) and enforces acceptance; the primary goal is stable presentation across diverse sources.
- Capture (Rx / Recorder): must lock and decode, then reliably output frames to a downstream pipeline; failures often appear as “locked but dropping frames”.
“Link usable” definition: 4-lock model + stability metrics
- PHY lock: physical receiver and clock recovery are stable.
- Link lock: TMDS/FRL link reaches and holds a steady state (no repeated re-training).
- Video lock: timing is stable; no flicker, snow, or periodic blanking.
- HDCP ready: authentication and encryption state are stable under content changes.
- No re-training: ≥ X hours continuous operation.
- HPD stability: ≤ X toggles per hour (excluding intentional hot-plug tests).
- DDC reliability: ≤ X EDID read failures per hour.
- HDCP stability: ≤ X re-auth events per hour; protected content remains visible/capturable.
- User-visible defects: flicker/snow/drop-frame = 0 within a Y-minute observation window.
Scope guardrails (anti-overlap)
- In scope: Tx/Rx architecture, TMDS/FRL mode behavior, EDID/DDC/HPD/CEC/5V reliability, HDCP system bring-up, and validation hooks.
- Out of scope: retimer/redriver tuning, protocol bridges, switch/matrix behavior, and detailed port protection/EMC component selection (handled in sibling pages).
H2-2. Requirements That Decide Everything (Resolution / Refresh / HDR / Latency)
Correct requirements translate directly into constraints: bandwidth → mode (TMDS/FRL), then SI/jitter/sideband robustness, and finally a validation matrix that predicts bring-up risk before hardware exists.
- HDCP required? determines authentication paths, test cases, and some capture restrictions.
- FRL required? drives the margin strategy (channel loss/jitter tolerance) and the bring-up plan.
- Compatibility target? (wide display list vs controlled environment) drives EDID/HPD robustness requirements.
- Latency target? impacts buffering, re-sync behavior, and capture pipeline tolerance.
Translate requirements into constraints (method, not a datasheet dump)
- Resolution / refresh / HDR / color depth / chroma format
- Cable type and expected reach (short vs long, frequent hot-plug or fixed install)
- Device class: display sink vs capture receiver
- Protection policy: HDCP 1.x/2.x required or not
- Mode pressure: TMDS-sufficient vs FRL-required (drives link behavior and failure patterns).
- Margin pressure: channel loss and jitter tolerance needed to survive worst-case conditions.
- Sideband pressure: EDID/DDC/HPD robustness targets (hot-plug rate, noisy environments).
- Validation pressure: required test matrix size and pass criteria window (X/Y placeholders).
Capture-specific constraints (why “locked” can still fail)
- Timing tolerance: a capture Rx must sustain stable output under upstream mode changes and intermittent sideband disturbances.
- Re-sync behavior: the correct strategy is measurable: re-lock time, drop-frame budget, and recovery success rate.
- HDCP boundary: protected content introduces additional state transitions; validation must include content switching and authentication retries.
- Re-lock time after a disturbance ≤ X ms / s
- Drop-frame count during recovery ≤ X frames within Y minutes
- Recovery success rate ≥ X% across N hot-plug/content-switch trials
Requirements → test plan (prevent surprises)
- Modes: at least one TMDS baseline + target FRL mode (if required).
- Content states: unprotected + protected (if HDCP required) with repeated switching.
- Hardware diversity: cable variants + a display/capture compatibility list (controlled vs wide compatibility).
- Stress: temperature sweep + PSU/load disturbance + controlled hot-plug trials.
H2-3. TMDS vs FRL: Auto-Mode Selection and Failure Patterns
The fastest root-cause path is a deterministic triage: confirm TMDS or FRL, then locate the stall point in a four-stage pipeline: Capability → Mode select → Training/Lock → Steady-state.
- Identify the active mode: TMDS or FRL (from status/logs).
- Locate the pipeline stage: capability, selection, training/lock, or steady-state.
- Match the failure fingerprint: snow/sparkles, flicker, black screen, periodic drops.
- Apply the smallest fix: change one dimension and re-validate pass criteria (X/Y placeholders).
TMDS: practical envelope + failure fingerprints
- Likely domain: main-link margin (loss/reflection/jitter accumulation).
- Quick check: correlation vs cable length, temperature, or higher color depth/HDR modes.
- Fix direction: reduce mode pressure (lower payload) or increase margin (channel/clock robustness).
- Pass criteria: sparkles = 0 within a X-minute window under worst-case setup.
- Likely domain: control-plane resets (HPD/sideband disturbances) or clock instability.
- Quick check: count HPD toggles and EDID read retries in the same time window.
- Fix direction: stabilize sideband behavior and re-validate without mode changes.
- Pass criteria: no re-train events for ≥ X hours; HPD toggles ≤ X/hour.
- Likely domain: capability interpretation mismatch (format/timing/EDID quirks).
- Quick check: compare negotiated format/timing across displays; verify consistent capability parsing.
- Fix direction: tighten policy (explicit format selection) and expand validation matrix.
- Pass criteria: stable operation across the target compatibility list (N devices) with identical policy.
FRL: training vs steady-state (why failures look like black screen)
- Likely domain: margin insufficiency at the selected payload/rate.
- Quick check: observe training retries and rate fallback attempts.
- Fix direction: reduce mode pressure (lower payload/rate) or increase margin (cleaner clock / stronger channel).
- Pass criteria: training success ≥ X% over N hot-plug trials; rate stable at target.
- Likely domain: robustness triggers (error bursts → recovery → re-training loops).
- Quick check: correlate drops with temperature/PSU disturbances and error counters.
- Fix direction: widen margin and eliminate disturbance sources; re-validate long-run stability.
- Pass criteria: no re-training for ≥ X hours under worst-case stress profile.
Stage classifier: capability → selection → training/lock → steady-state
H2-4. HDMI Tx Architecture (Data Path + Clocking + Control)
A robust Tx design is diagnosable by construction: separate data path, clock path, and control plane, then bring them up in increasing pressure tiers (baseline → high payload → FRL → HDCP).
- Data path: pixel/format → packet/encode → TMDS/FRL → PHY → connector.
- Clock path: reference → PLL → link clocks → PHY clocks (jitter margin).
- Control plane: EDID policy, HPD events, DDC/CEC behavior, HDCP policy and retries.
Data path: what to validate (without turning this into a register map)
- Format coherence: color format, depth, HDR flags, and timing must be consistent across pipeline stages.
- Rate coherence: payload tier must match the negotiated mode (TMDS/FRL) and selected rate ladder.
- Backpressure visibility: detect underrun/overrun events and treat them as first-class root causes.
Clock path: stability beats “pretty waveforms”
- Measurement consistency: verify the same node and the same accounting method before comparing jitter numbers.
- Drift sensitivity: stress with temperature and PSU disturbances to reveal marginal clock paths.
- Pass criteria: mode holds with re-train=0 for ≥ X hours under worst-case stress profile.
Control plane: the hidden cause of “random” re-training
- Mode policy: deterministic selection rules and safe fallbacks (no oscillation between modes).
- HPD behavior: debounce and event logging; correlate HPD edges with link resets.
- DDC reliability: treat EDID read failures as first-order control-plane faults.
- HDCP retries: distinguish authentication failures from main-link margin issues by state and counters.
Bring-up tiers (increase pressure step-by-step)
- Baseline: known-stable payload, no protection; prove video lock + 4-lock stability.
- Higher payload: enable HDR/greater depth; confirm deterministic mode selection.
- FRL tier (if required): reach target rate without training retry storms.
- Protected content (if required): HDCP state stable under content switching and hot-plug cycles.
- Stress: temperature sweep + PSU disturbances + cable variation; re-train=0 for ≥ X hours.
H2-5. HDMI Rx / Capture Architecture (Lock / Recover / Output)
A capture-grade receiver must be stable in three dimensions: multi-level lock, controlled recovery, and clean output-domain crossing. The fastest debug path is to classify the fault into Lock → Recover → Output before changing any tuning presets.
- Lock chain: PHY lock → link lock (TMDS/FRL) → video lock → HDCP state.
- Recover chain: soft re-sync → link recovery → session restart (event-driven, rate-limited).
- Output chain: recovered video → buffering/DDR → output interface (CDC/FIFO/backpressure).
Rx front-end: CDR + EQ/CTLE (receiver-only knobs)
Keep tuning local to the receiver: prioritize lock acquisition and steady-state margin. Treat presets as diagnostic tools: a preset that changes the symptom strongly indicates a front-end margin issue.
- Acquisition knobs: CDR mode, lock window, lane lock policy.
- Margin knobs: CTLE level, EQ presets, adaptive enable/disable (if supported).
- Observability: lock flags, retry counters, and time-aligned event logs.
Four-level lock model (define, fingerprint, first check)
Recovery pipeline: controlled, rate-limited, and measurable
Recovery should be a staged state machine to avoid oscillation. Escalate only when lower tiers fail within defined thresholds.
Output chain: CDC/FIFO/backpressure (common “locked but still broken” root cause)
- CDC risk: crossing from recovered video clocks into memory/output domain can create bursts or drift.
- FIFO risk: underrun/overflow produces drop/repeat artifacts that resemble link instability.
- Backpressure risk: downstream throttling forces frame dropping unless explicitly handled.
- FIFO underflow/overflow counters (time-aligned with visible artifacts).
- Memory/buffer pressure at peak payload (burst patterns).
- Output throttling events (drop policy vs uncontrolled starvation).
Rx bring-up tiers (increase pressure step-by-step)
- Baseline: stable payload; confirm PHY/link/video locks all stable for ≥ X minutes.
- Higher payload: enable HDR/greater depth; artifacts=0 within Y minutes.
- FRL (if required): training success ≥ X% over N cycles; no retry storms.
- HDCP (if required): re-auth=0 over X hours; stable across N content switches.
- Stress: temperature + PSU disturbance + cable variation; re-train=0 for ≥ X hours.
H2-6. EDID + DDC + HPD + 5V: The Sideband That Breaks the Link
Many “black screen / not detected” failures are not caused by the high-speed pairs. The sideband plane (DDC/EDID, HPD, +5V detect) can trigger session rebuild events that look like main-link instability unless logs and measurement points are time-aligned.
DDC/EDID: treat it as a reliability channel, not a “background wire”
- Primary symptom: EDID read retry/fail causes unstable negotiation and oscillating mode choices.
- First-check quad: EDID retries, correlation vs hot-plug, correlation vs HPD edges, correlation vs +5V detect edges.
- Pass criteria: EDID read success ≥ X% over N hot-plug cycles; retry ≤ X/hour.
EDID instability fingerprints (symptom → first check → fix direction)
- Likely cause: noise/timing margin on SCL/SDA during reads.
- Quick check: capture failures aligned to specific time windows (hot-plug, load changes).
- Fix direction: tighten DDC timing and reduce disturbance; ensure deterministic read policy.
- Pass criteria: EDID failures = 0 within X hours; hot-plug success ≥ X% over N trials.
- Likely cause: partial reads, retries with inconsistent snapshots, or session rebuild loops.
- Quick check: log the read outcome and confirm stable parsing across repeated reads.
- Fix direction: make reads atomic and rate-limited; avoid repeated re-parsing loops.
- Pass criteria: same sink yields identical capabilities for ≥ N consecutive reads.
- Likely cause: sideband margin depends on environment and device behavior.
- Quick check: run a matrix and compare EDID retry rates across variants.
- Fix direction: widen sideband margin; define acceptance targets per matrix.
- Pass criteria: EDID retry ≤ X/hour for every target pair in the matrix.
HPD behavior: debounce and rate-limit to prevent re-training loops
- Fingerprint: periodic blanking or repeated mode re-entry without visible cable changes.
- Quick check: HPD edge counter aligned to link re-train or HDCP re-auth timestamps.
- Fix direction: apply debounce window and event cooldown; log every HPD edge with cause tags.
- Pass criteria: HPD toggles ≤ X/hour (non-plug events) and re-train=0 for ≥ X hours.
+5V supply & detect: the hot-plug boundary that can mis-trigger sessions
- Fingerprint: false plug/unplug behavior during load changes or cable movement.
- Quick check: detect-edge counter aligned to EDID/HPD events and session rebuild.
- Fix direction: stabilize detect threshold behavior and avoid noisy boundaries during hot-plug.
- Pass criteria: false-detect events = 0 across N hot-plug cycles and stress profile.
H2-7. HDCP 1.x/2.x System Bring-up (Authentication, Keys, Repeater Cases)
HDCP separates “a picture appears” from “commercially compliant playback.” Debug becomes deterministic when the path is treated as a layered pipeline: Capability → Authentication → Session/Keys → Encrypted steady-state, with every transition tied to timeouts, retries, and re-auth triggers.
- Layered checks: stop at the first failing layer and record the exact transition point.
- Steady-state checks: measure re-auth frequency and success across content switches.
- Repeater awareness: detect repeater/topology early to avoid misdiagnosis as “link/SI.”
Layer A · Capability (version, roles, repeater declaration)
Start by confirming what the sink declares and what the source attempts. Capability mismatch frequently creates “successful UI output but protected content fails.”
- Observability: negotiated HDCP version, role, and any declared repeater/topology fields.
- Fingerprint: EDID appears normal but protected playback remains black.
- First check: verify the same capability snapshot is used for the entire session (no oscillation).
- Pass criteria: capability snapshot stable for ≥ X minutes (no flips), across N reads.
Layer B · Authentication (handshake, timeouts, retry storms)
- Key idea: the critical information is the breakpoint: which state transition times out or loops.
- Observability: auth state, timeout counters, retry counters, and a timestamped state trace.
- Failure fingerprint: repeated auth attempts with periodic blackouts or mode re-entry.
- Pass criteria: auth completes within ≤ X ms and retries ≤ X per session.
Layer C · Session/Keys (session establishment and continuity)
The most common bring-up trap is “auth appears done,” but the session is rebuilt repeatedly. Confirm whether the session remains stable long enough to enter a clean encrypted steady state.
- Observability: session-id lifecycle, re-auth triggers, and session rebuild reasons.
- Failure fingerprint: playback starts then collapses after mode changes or sideband events.
- Pass criteria: session remains unchanged for ≥ X minutes under normal content switching.
Layer D · Encrypted steady-state (protected playback acceptance)
- Acceptance focus: re-auth rate and success across stress patterns, not one “green” run.
- Measure: re-auth count, protected/unprotected transitions, blackout duration, and failure rate.
- Pass criteria: re-auth ≤ X/hour; blackout duration ≤ X ms; N content switches succeed at ≥ X%.
Repeater/topology: identify early (do not expand switch/matrix details)
- Identification: sink declares repeater role; topology fields (depth/device count) are present.
- Risk fingerprint: downstream changes trigger upstream re-auth, presenting as random blackouts.
- Pass criteria: topology stable (no depth/device-count changes) for ≥ X minutes; re-auth ≤ X/hour.
Symptom → first localization (fast triage)
H2-8. Clock & Jitter Budget for TMDS/FRL (Practical, Not Theory)
Jitter becomes actionable when it is expressed as a clock tree, a contribution budget, and a decision path. The objective is not a “nice-looking plot,” but a repeatable answer to: what to measure, where to measure it, and what to change if margin is negative.
- Clock tree: Ref → PLL → divider/mux → PHY clock → serializer.
- Budget table: contributors + measurement uncertainty → total → margin vs target.
- Decision path: fix measurement → fix config → fix PDN coupling → trigger retiming (only as a condition).
Clock tree sensitivity: identify the dominant nodes
- Reference: quality and SSC policy influence the entire chain.
- PLL node: loop behavior and rail coupling can convert PDN noise into phase noise.
- PHY clock: the last distribution stage is often the most correlated with link stability.
Measurement definition: different points and windows produce different “truth”
- Point consistency: Ref vs PLL vs PHY measurements are not interchangeable.
- Bandwidth/window consistency: use the same window for steady-state and for training/mode transitions.
- Time alignment: correlate jitter snapshots with training failures, retries, or link drops.
- Lock measurement points (Ref/PLL/PHY).
- Lock bandwidth/window settings across instruments.
- Align with event logs (training/drop timestamps).
Budget table (card-list form to avoid mobile overflow)
Conditions that justify re-timing (do not expand implementation here)
- Persistent negative margin: budget margin stays < 0 and is highly sensitive to cable length/temperature.
- Rate dependence: failures disappear when stepping down link rate, indicating insufficient timing margin.
- No improvement after low-cost fixes: measurement/config/PDN actions do not change the failure signature.
H2-9. SI & PCB Layout for HDMI (Impedance, Return, Skew, Via Strategy)
Layout must be reviewable and testable: impedance consistency, continuous return paths, “good-enough” skew control, and predictable discontinuities around vias/connectors. The objective is a design that can pass sign-off and explain failures without guessing.
- Control discontinuities: keep geometry and reference environment consistent.
- Protect return integrity: avoid plane splits and forced return detours.
- Avoid over-tuning: skew matching must not degrade impedance/crosstalk.
- Leave observability: reserve test/repair options near the connector and critical transitions.
Module A · Impedance control (geometry + reference consistency)
HDMI signal quality is dominated by how often impedance “changes.” The priority is fewer geometry changes and fewer reference changes, not only a single nominal value.
- Control points: layer transitions, connector pads, breakout regions, and any width/spacing edits.
- Failure fingerprint: rate-dependent sparkles/flicker that worsens with longer cables.
- Pass criteria: impedance tolerance within ±X% across all control points; discontinuities ≤ X critical spots.
Module B · Return-path continuity (plane splits are a red-line)
Differential routing still needs a nearby reference path. Plane splits force return detours, expanding loop area and creating simultaneous SI and EMI failures.
- Hard rule: do not cross a reference-plane split or void under the pair.
- Layer change rule: provide a short return via path (ground via fence) adjacent to the transition.
- Pass criteria: continuous reference under the full route; all transitions have return support within ≤ X mm.
Module C · Skew & length-match (the “good-enough” principle)
Skew control is a sampling-margin problem. Over-aggressive serpentine routing often increases coupling and discontinuities, worsening the true margin.
- Return continuity
- Impedance consistency
- Crosstalk isolation
- Length-match (only the minimum necessary)
- Placement rule: any serpentine should be in a quiet region with stable reference and spacing.
- Pass criteria: skew within X (unit/limit defined by the project), without introducing new discontinuities.
Module D · Vias / connector / cable transitions (reflection-aware design)
Vias and connector breakouts are predictable reflection sources. Designs should be built for measurement and repair, not only for “best-case routing.”
- Via strategy: minimize stubs and keep pair symmetry through transitions.
- Connector breakout: avoid abrupt pad/anti-pad changes; keep reference consistent.
- Observability: reserve differential test access and optional tuning footprints near critical transitions.
- Pass criteria: transition symmetry verified; test/tuning options present for at least X critical areas.
Layout sign-off checklist (fill project thresholds)
- All diff pairs have continuous reference under-route; no plane-split crossings.
- All layer transitions include nearby return support; via symmetry preserved.
- Serpentine only in quiet zones; no forced “length-match at all costs.”
- Critical transitions have measurement and tuning options (targets defined as X).
H2-10. Bring-up & Troubleshooting Playbook (Black Screen / Flicker / Sparkles)
Troubleshooting must be a flow, not guessing. The fastest path is to classify the failure domain first, then apply a symptom-specific tree. Each branch maps to a single chapter to prevent “random fixes” and cross-topic sprawl.
- Sideband stable? HPD toggles / DDC errors point to H2-6.
- Mode domain? TMDS vs FRL, training vs steady-state point to H2-3.
- Protected-only failure? black only on protected content points to H2-7.
- Margin-driven? strong dependence on cable/temperature points to H2-8 and H2-9.
Symptom tree A · Black screen (shortest path)
- EDID/DDC unstable → go to H2-6 (DDC pull-ups, noise, HPD behavior).
- EDID OK but no video lock → go to H2-3 (TMDS/FRL selection + training/lock).
- Only protected content black → go to H2-7 (HDCP layered bring-up).
- Strong cable/temperature sensitivity → go to H2-8 then H2-9 (jitter budget + layout discontinuities).
Symptom tree B · Flicker / intermittent drops
- HPD toggles or DDC errors rise → H2-6.
- Periodic re-training signatures → H2-3.
- Thermal or load correlation → H2-8 (clock/PDN coupling).
- Improves with different cable/connector → H2-9 (discontinuities and return integrity).
Symptom tree C · Sparkles / snow (margin-driven errors)
- Confirm mode domain → H2-3 (TMDS vs FRL and training stability).
- If rate downshift reduces errors → H2-8 (jitter budget and margin).
- If cable/connector swap changes behavior → H2-9 (reflection and return-path issues).
Minimum observability set (log and counter checklist)
- Mode/training: TMDS/FRL mode, training state, retry count, lock status.
- Sideband: HPD toggle count, DDC read errors / NACK rate / bus-busy flags.
- HDCP: auth retry count, session rebuild reason, encrypted steady-state indicator.
- Stability: error counters available in the platform, plus temperature/rail event timestamps for correlation.
Bring-up acceptance targets (fill thresholds)
- Training success ≥ X% across N cycles and worst-case conditions.
- HPD toggles ≤ X/hour; DDC errors ≤ X/hour.
- HDCP re-auth ≤ X/hour; protected content switch success ≥ X%.
- Continuous playback ≥ X minutes with no visible artifacts or resets.
H2-11. Compliance & Validation (HDMI-CTS Workflow + Test Hooks)
Validation should move from “it works once” to “it passes CTS and ships consistently.” A practical approach is to split tests into data path, sideband, HDCP, and stress, then keep failures reproducible via pre-planned hooks and a regression matrix.
- Data path: TMDS/FRL selection, training/lock, steady-state stability (maps to H2-3/H2-8/H2-9).
- Sideband: EDID/DDC/HPD/5V behavior and reliability (maps to H2-6).
- HDCP: authentication, session maintenance, repeater/topology cases (maps to H2-7).
- Stress: temperature/PSU noise/cable variations/compatibility matrix (maps to H2-8/H2-9; sideband triggers map to H2-6).
Design-in test hooks (reserve in schematic + layout)
Hooks are not “extra features.” They enable isolation (Tx vs channel vs Rx) and make CTS failures reproducible. The focus here is what to reserve, not how to implement vendor-specific registers.
- EDID EEPROM (example): Microchip 24LC02B (2-Kbit I²C EEPROM for EDID storage).
- I²C level shifting (example): NXP PCA9306 (bidirectional I²C level translator).
- I²C buffer / rise-time helper (example): TI TCA9517 (I²C buffer/repeater for long/noisy DDC runs).
- HPD conditioning (example): TI SN74LVC1G17 (Schmitt-trigger buffer to harden against slow edges/noise).
Evidence to require: DDC error counters (NACK/bus-busy), HPD toggle counters, and an EDID snapshot log for “read consistency.”
- Ultra-low-cap ESD (example): TI TPD2E2U06 (2-channel ESD diode array).
- Ultra-low-cap ESD (example): Nexperia PESD5V0S1UL (single-line ESD protection).
- Low-cap clamp array (example): Semtech RClamp0504 (multi-line ESD clamp family).
Validation rule: any “protection change” must re-run the minimum regression set (see below) because added capacitance/mismatch can shift margin.
- Secure element (example): Microchip ATECC608B (hardware key storage / secure provisioning helper).
Evidence to require: authentication retry counters, session rebuild reasons, and a clear “protected-content path” test case list.
- Low-jitter oscillator (example): SiTime SiT9121 (low-jitter clock oscillator family; select frequency/package per design).
- Low-phase-noise XO (example): NDK NZ2520SD (low-noise oscillator family; select exact frequency/option code per design).
Validation rule: always correlate failures to clock tree observations (mode/training counters + time-aligned rail/thermal events).
- RF test connector (example): Murata MM8430-2610 (compact RF test connector family; use as a controlled debug option, not a default discontinuity).
- DNP tuning pads: reserve footprints for optional series damping / swap options near critical transitions (component values and use-cases defined by the project as X).
Regression strategy (matrix validation, mobile-friendly)
Regression must be matrix-based: swap cable, display, and source, then add temperature and rail disturbance. Large tables are avoided here; list the dimensions and define a minimum coverage set.
- Dimensions: Source × Sink/Display × Cable × Mode (TMDS/FRL) × Temperature × Rail noise events.
- Minimum coverage set: worst cable + most demanding display + highest mode + hot condition + rail perturbation.
- Pass criteria: training success ≥ X%, HPD toggles ≤ X/hour, DDC errors ≤ X/hour, protected switch success ≥ X%.
H2-12. Engineering Checklist (Design → Bring-up → Production)
This checklist is a gate system. Each stage requires evidence and pass criteria (thresholds filled as X) before moving forward. Example material numbers are provided to make the checklist actionable and procurement-ready.
Gate A · Design Gate (sign-off before layout freeze)
Gate B · Bring-up Gate (must pass before CTS submission)
- B1 · Minimum link: stable video ≥ X minutes with no visible artifacts.
- B2 · Mode coverage: TMDS/FRL and rate ladder transitions succeed ≥ X% over N cycles.
- B3 · Sideband stability: HPD toggles ≤ X/hour, DDC errors ≤ X/hour (logged).
- B4 · HDCP readiness: auth success ≥ X%, protected content switch success ≥ X%, re-auth ≤ X/hour.
- B5 · Long-run stability: continuous run ≥ X hours under normal conditions.
- B6 · Thermal/rail stress: stability maintained through defined thermal sweep and rail events (thresholds X).
- B7 · Failure is classifiable: any failure can be triaged to a domain within ≤ X minutes using logs/counters.
Gate C · Production Gate (consistency + fast test)
- C1 · Batch consistency: multi-board / multi-lot pass rate ≥ X% on the minimum coverage set.
- C2 · Alternate materials: critical alternates validated through the same regression set (no “single-cable only” validation).
- C3 · Cable/connector tolerance: defined cable class set passes with margin; failures are actionable and classifiable.
- C4 · Fast-test definition: production test outputs a clear pass/fail using fixed counters and thresholds (X).
- C5 · Traceability: configuration/version binding and log export path are fixed for field returns.
- C6 · Change control: any BOM/layout/firmware change triggers the locked regression set automatically.
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H2-13. FAQs (HDMI Tx/Rx — field troubleshooting, no new scope)
Each FAQ closes a field-failure loop without expanding scope. Every answer is fixed to four lines: Likely cause / Quick check / Fix / Pass criteria (thresholds as X).