Role of Noise & PSRR in Reference Rails

For a precision ADC or DAC, the reference is not just a static voltage; it is a noisy, supply-dependent signal that sets the measurement ceiling. Whatever noise and supply coupling rides on the reference rail is multiplied into every code produced by the converter, directly eating into SNR and effective number of bits.

In a current or voltage sensing chain, reference noise appears as extra jitter on the reading, while limited PSRR lets supply ripple modulate the reference node. Even if the ADC silicon itself is quiet, a noisy reference or poor PSRR raises the system noise floor. At some point the converter simply cannot resolve finer steps because the reference scale is moving more than one LSB.

A 16-bit SAR converter may advertise an ideal SNR close to 98 dB, but in a real design the effective SNR often drops several dB once reference noise is included. If the reference’s wideband noise, integrated over the signal bandwidth, is comparable to or higher than the ADC’s own input noise, overall ENOB is dominated by the reference. In practice the system may behave more like a 15-bit device, no matter how good the ADC data sheet looks on paper.

The rest of this topic looks at reference noise and PSRR from three practical angles. First, low-frequency 0.1–10 Hz noise and how it sets offset stability for slow or averaged measurements. Second, wideband noise density and how to integrate it into a noise budget that predicts effective resolution. Third, PSRR versus frequency, showing how different supply noise sources are either rejected or passed through into the reference output.

How to Read Noise & PSRR in Datasheets

Once you accept that reference noise and PSRR cap your SNR, the next step is learning how to read those small fields and plots in the datasheet. Noise and PSRR numbers are scattered across tables, graphs and footnotes, and a clean design depends on turning them into realistic budgets instead of wishful thinking.

Most reference datasheets present noise and PSRR in three places: electrical characteristics tables, application plots and test circuit notes. You might see a single line for 0.1–10 Hz noise in microvolts peak-to-peak, a typical noise density figure in nV/√Hz, and one or two PSRR-versus-frequency curves at 25 °C. To make sense of these you have to pay attention to the test conditions, the units and whether the values are typical only or formally guaranteed.

Noise Specifications: 0.1–10 Hz, Noise Density and RMS vs Peak-to-Peak

The 0.1–10 Hz noise figure describes how much the reference output wanders in a very low-frequency band, usually expressed as microvolts peak-to-peak. This is the noise that makes a slow sensor reading or a long average drift up and down even when temperature and load are held constant. On a 2.5 V reference, a 10 µVp-p figure already represents several parts per million of apparent offset movement, which becomes visible in 16- to 24-bit systems.

Noise density numbers, for example 60 nV/√Hz at 1 kHz, describe the average wideband noise floor in a flat part of the spectrum. When the density is roughly constant across the signal band, you can estimate the resulting RMS noise by multiplying the density by the square root of the effective bandwidth seen at the reference pin. Later chapters show how to combine this with ADC and front-end noise to predict full-path SNR and ENOB.

Datasheets mix RMS and peak-to-peak notation, so you need to know which you are looking at. For noise that is roughly Gaussian, the peak-to-peak excursion over a long enough observation window is often around six times the RMS level, but this is a statistical relationship, not a hard guarantee. Designing to RMS is convenient for SNR and ENOB calculations, while peak-to-peak numbers are helpful when you care about worst-case excursions on a slow-moving measurement.

PSRR Specifications: Frequency Plots, Typical vs Guaranteed and What Gets Rejected

PSRR plots show how effectively the reference rejects disturbances on its supply, usually expressed in dB versus frequency. The vertical axis is rejection, with higher values meaning better isolation, and the horizontal axis spans from sub-hertz up to tens or hundreds of kilohertz. To interpret the graph, first locate the frequencies you care about, such as mains hum, buck converter switching harmonics or digital noise bands, and then read off how much of that ripple will leak onto the VREF node.

Many PSRR curves are typical only, taken at nominal VIN, typical load and around 25 °C. Guaranteed limits, when provided, appear in the electrical table with minimum or maximum bounds. In non-safety critical designs it is often acceptable to use typical curves as a starting point and verify performance on the bench. In ASIL or other safety contexts you should treat typical PSRR as optimistic, build margin into your noise budget and back it up with measurements instead of assuming the plotted curve is always met.

PSRR also needs to be distinguished from load-related parameters. Some plots describe line rejection or input ripple rejection, where supply ripple couples into the reference output. Others show load regulation or output impedance, where changes in ILOAD shift VREF. For EMI or switching noise problems you must look at PSRR versus frequency, while for large load steps you need to inspect load regulation and transient response instead.

Test Conditions: VIN, Load, Output Capacitors, Bandwidth and Temperature

Noise and PSRR figures are always tied to specific test conditions. The supply voltage is often set near a nominal value; close to dropout the internal operating point changes and both noise and PSRR can degrade. Load current is usually fixed at a typical value; very light or very heavy loads may not match the curves. Output capacitors and their ESR come from a reference test circuit — if your board uses different values, the real noise and PSRR can shift significantly. Most plots are taken at 25 °C, so you should expect some variation over automotive temperature ranges and confirm worst-case behavior in the lab.

0.1–10 Hz Noise & Offset Stability

Low-frequency 0.1–10 Hz noise describes how a reference rail wanders on a timescale of seconds to minutes. It sets how stable a “zero” reading really is when you average slowly, and it sits on top of any long-term drift from temperature or aging. Understanding this band is essential for precision sensors, weigh scales and other slow signals.

The 0.1–10 Hz band is chosen because it lines up with slow measurements: ADCs sampling a few times per second, digital filters with multi-second windows, and trend logging that updates on human timescales. Faster noise tends to average out or be filtered away, but noise in this very low band shows up directly as visible wander in the reported value even when the environment is stable.

In a sensor chain, 0.1–10 Hz noise looks like a noisy baseline. A pressure transducer or load cell that should read zero instead drifts up and down within a narrow band while you watch a strip chart. Some of this movement is random wander from the reference and front-end; some is slow drift from temperature, stress or aging. The wander defines how much the reading will move if you watch for a few tens of seconds and keep averaging, even though nothing “real” is changing.

A 2.5 V reference with a 0.1–10 Hz noise figure of 10 µVp-p is already wandering by roughly 4 ppm from peak to peak. On a 16-bit ADC, one LSB at 2.5 V is about 38 µV, so even a few microvolts of low-frequency noise can move the apparent zero by a noticeable fraction of an LSB. In high-resolution 20- to 24-bit systems, the same microvolts of wander can translate into many counts of slow, jittery baseline motion.

Low-frequency noise is different from temperature coefficient and long-term drift. Noise makes the reference output oscillate around a nominal level over seconds, and is best described with RMS and peak-to-peak metrics. Drift moves that nominal level itself over hours, days and temperature sweeps, and is described in ppm/°C or ppm per thousand hours. In practice you see both: a slowly moving trend line with a 0.1–10 Hz noise band riding on top of it.

Wideband Noise Density & ENOB

Wideband noise density describes the reference’s noise floor across frequency in nV/√Hz. When you know that floor and the bandwidth your ADC actually sees at the reference pin, you can estimate the RMS noise it adds to the measurement path and how many bits of effective resolution you lose as a result.

In the flat region of the spectrum, away from the 1/f corner, the density is roughly constant. A typical datasheet might quote 60 nV/√Hz at 1 kHz, meaning each hertz of bandwidth contributes that much noise on average. If the reference sees a few tens of kilohertz of effective bandwidth after filtering and sampling effects, you can approximate the RMS noise as the density multiplied by the square root of that bandwidth.

Reference noise is only one term in the full noise budget. The front-end amplifiers and the ADC itself also contribute input-referred noise. Independent noise sources add in quadrature, so the total RMS noise is the square root of the sum of the squares. If the reference term dominates that sum, it quietly decides the system’s SNR and ENOB, even if the converter silicon could in principle do better.

In a 16- or 18-bit SAR design, the effective bandwidth at the reference pin is often set by the anti-alias filter and sampling network. A moderate noise density integrated over that band can eat one or two bits of resolution, pushing a nominal 16-bit converter down into the 15-bit range in practice. In a 24-bit delta-sigma chain with a narrow passband and aggressive digital filtering, the ADC’s own noise can be extremely low; here, even a few microvolts of reference RMS noise can dominate and erase several bits of theoretical ENOB.

In practical terms, noise density gives you the floor, bandwidth tells you how much of that floor you let in, and the combined RMS level with ADC and front-end noise determines how many useful bits you keep. A reference chosen without a noise budget is a common reason why real designs fall short of their headline resolution.

PSRR vs Frequency & Supply Noise

Power-supply rejection ratio (PSRR) describes how much ripple or noise on a supply rail leaks into the reference output. It turns supply disturbances into an equivalent reference ripple, and its frequency response decides how much mains hum, switching ripple and digital noise actually reach the ADC or DAC through the reference node.

At a given frequency, PSRR can be expressed as the ratio of output change to input change, often written as delta VREF over delta VIN and converted into dB. A PSRR of 60 dB means that only one thousandth of the supply ripple appears at the reference output at that frequency. In contrast to load regulation, which relates load current changes to VREF shift, PSRR is strictly about how supply ripple couples forward.

The PSRR curve is strongly frequency dependent. At low frequencies, where mains hum, slow ramps and battery sag live, many references offer high rejection and behave much like an ideal DC source. In the mid-frequency region, around the fundamental and harmonics of switching converters, PSRR is often lower, so several tens of kilohertz of ripple can convert into a visible VREF modulation. At higher frequencies, digital edges and EMI spikes are filtered partly by intrinsic PSRR and partly by local decoupling and layout.

In a real design, the effective suppression of supply noise is a combination of the reference’s intrinsic PSRR, any pre-regulating LDO and the RC filters around the reference. A noisy buck converter might feed an LDO that provides 40 to 60 dB of rejection at its crossover, while the reference itself adds another 40 dB in its sweet spot. If you also insert an RC stage with a corner below the switching frequency, the total attenuation at the relevant harmonics can easily reach tens of dB more, moving hundreds of millivolts of ripple down into the microvolt range at VREF.

In a BMS, a high-current charger rail can carry large switching ripple that couples into sense amplifiers and ADCs if the reference is tied too directly to that rail. In an ECU, a 12 V to 5 V buck converter’s switching ripple can feed a reference regulator; if PSRR at the switching frequency is only a few tens of dB, tens of millivolts of VIN ripple may still leave millivolt-level ripple at VREF. For high-resolution current and voltage monitors, that is often unacceptable and calls for dedicated pre-regulation and filtering.

Reading PSRR versus frequency as a map from VIN ripple to VREF ripple lets you translate noisy supply spectra into equivalent reference noise. Once you know the amplitude and frequencies of your supply disturbances, you can use the PSRR curve, plus any LDO and RC filters, to estimate how much of that disturbance will end up at the reference node and into the measurement path.

Architectures to Control Noise & PSRR

Controlling reference noise and PSRR starts with the right architecture. The choice of pre-regulator, filters, buffering and fan-out determines how much supply ripple reaches VREF and how strongly different loads can tug on the same reference node. Good structure often saves more performance than fine-tuning any individual part.

A simple low-noise reference feeding one or two ADC channels is often enough when loads are light and the supply is reasonably clean. As soon as multiple ADCs, DACs and comparators share VREF, or long traces are involved, a buffer amplifier or dedicated reference buffer becomes attractive. Treat the reference IC as a master source and the buffer as a low-noise, low-impedance distributor that can drive heavier and more dynamic loads without disturbing the master.

Pre-regulation with an LDO ahead of the reference is a common way to assign PSRR tasks. The LDO takes the brunt of the high-amplitude buck converter ripple and DC variation, while the reference cleans up the remaining error. At the switching frequency and its harmonics, you want enough combined PSRR that the ripple reaching the reference input is already small. The reference’s own PSRR then reduces that residual ripple to microvolt levels at VREF, instead of asking a single device to do all the work.

Simple RC or R-C-R filters on the reference supply or output add extra attenuation at higher frequencies. The cutoff should sit above the signal bandwidth so the reference looks stiff to real signals, but below the dominant switching and digital noise so ripple is strongly reduced. Oversized resistors or capacitors can make startup sluggish and recovery from load transients slow, so values need to balance noise suppression against dynamic performance.

Multi-reference architectures separate the most sensitive channels from less demanding ones. One clean path may feed the high-resolution ADC used for precision sensing, while a second path or a buffered copy serves DACs, comparators and housekeeping functions. Isolating these rails makes sure dynamic loads and threshold chatter do not modulate the same VREF that a 20 to 24 bit ADC is using to define its full-scale.

A few structural pitfalls are worth avoiding. Do not feed a precision reference directly from a noisy digital rail without at least some pre-regulation and filtering. Do not fan out a single unbuffered reference node to many high-dynamic loads. Do not route the reference across long, noisy sections of the board without shielding or buffering. And do not assume a typical PSRR curve at room temperature will remain valid under cold crank, hot soak or full load swings.

Layout, Grounding & Filtering for Clean References

A good reference IC can be ruined by poor layout and grounding. Clean VREF rails depend on star-like ground connections, short and quiet traces, well-placed decoupling and careful separation from high di/dt loops and switching nodes, especially in dense automotive and BMS boards.

Reference ground should sit on a quiet part of the ground structure, not inside a high di/dt power loop. A star or split-ground approach keeps power return currents from buck converters, drivers and heaters away from the small currents that define VREF. Kelvin-style routing, where VREF and its return run as a local pair back to the ADC ground point, avoids millivolts of error from ground plane voltage drops under load.

VREF traces should be short, relatively wide and treated like precision sense lines rather than generic low-level nets. Avoid long parallel runs next to switching nodes, gate drives or high-speed clocks, where capacitive and inductive coupling can inject ripple. If you must cross noisy regions, a short, perpendicular crossing over a solid ground plane is safer than a long, parallel run alongside aggressive edges and switching currents.

Decoupling capacitors belong close to the reference pins. On the VIN side, a small ceramic capacitor near the pin, backed by a slightly larger bulk capacitor, keeps the local supply quiet and the loop area small. On the VREF output, the capacitor value and ESR must follow the datasheet’s stability recommendations. RC filters or R-C-R networks should also be placed close to the reference, not at the far end of a long trace where new coupling can occur.

Reference pins and ADC inputs should live in a quiet corner of the board, with continuous ground underneath and no splits or slots in the return path. Keep high-current or high-voltage nodes on other layers or well separated in plan view. Mark VREF and related nets as sensitive in the layout tool and enforce keepouts against switching nodes, digital buses and fast IOs that could capacitively or inductively inject noise into the reference path.

When reference rails or sense lines must travel across cables or between boards, treat them as precision signals. Use twisted pairs or differential routes with a well-defined return, and consider local buffering or local references at the remote module. Good shielding and clear separation between common-mode noise and differential signal paths help prevent long harnesses from turning reference rails into antennas for switching currents and EMI fields.

Measuring Noise & PSRR in the Lab

Bench measurements turn datasheet promises into real numbers. With a low-noise supply, a simple amplifier, a scope or ADC and a function generator, you can characterise 0.1–10 Hz wander, wideband noise and PSRR and compare different reference options under realistic operating conditions.

To measure 0.1–10 Hz noise, power the reference from a clean source and feed its output into a low-noise amplifier with well-defined gain. Capture the amplified signal with a scope, data acquisition device or high resolution ADC over many seconds or minutes. Limit the effective bandwidth to 0.1–10 Hz using analog or digital filtering, shield the setup from mains hum and drafts, and then scale the captured waveform back to the reference level to find its peak-to-peak and RMS wander.

Wideband noise can be observed in FFT mode on a modern oscilloscope or with a spectrum analyser. Connect the reference output directly or through a calibrated low-noise amplifier, set a suitable span to cover the frequencies of interest and choose a sampling rate that avoids aliasing. Averaging and an appropriate window reduce spectral leakage, allowing you to estimate the noise floor and noise density. Integrating the density over the bandwidth seen by the ADC yields the RMS noise contribution used in your noise budget.

PSRR is measured by injecting a small AC ripple onto VIN and observing the resulting ripple on VREF. A DC supply provides the bias, while a function generator adds a controlled sinusoid through an injection resistor or transformer. At each frequency of interest, measure the ripple amplitude on VIN and on VREF, compute the ratio and convert it to dB. Sweeping the frequency produces a measured PSRR curve that can be compared with the datasheet and used to model how real supply spectra will map into reference ripple.

Time-domain records can be detrended to remove slow drift before calculating RMS and peak-to-peak values for a given observation window. Spectral data can be integrated over the band of interest by summing squared noise density across bins and taking the square root. In both cases, documenting gain, bandwidth, filtering and scaling factors is essential so that measured numbers can be compared fairly across reference candidates and carried into system-level noise and ENOB budgets.

BOM & Selection Notes for Noise & PSRR

A reference that looks fine on paper can still cap system performance if its noise and PSRR are not constrained in the BOM. This section turns “low noise reference” into explicit fields and example part choices so that purchasing and engineers can request and review parts using measurable limits.

Recommended BOM Fields for Noise & PSRR

Instead of a vague “precision reference” line, add structured fields that describe how quiet and robust the reference must be. Typical fields include:

• Max 0.1–10 Hz noise (µVpp) – e.g. VREF_0p1_10Hz_noise_pp_max ≤ 5 µVpp for a 2.5 V reference in a 16–18 bit system. This links directly to offset wander and low-frequency measurement stability.
• Max noise density at 1 kHz / flat band (nV/√Hz) – e.g. noise_density_1k_max ≤ 60 nV/√Hz. This allows estimation of integrated RMS noise over the ADC bandwidth using the spectral density curves.
• Minimum PSRR at key frequencies (dB) – for example PSRR_100Hz_min, PSRR_1kHz_min and PSRR_fsw_min at the main switching frequency. These numbers determine how much mains hum and switching ripple can leak into VREF.
• Supply range and Iq limit – e.g. VIN_range = 4.5–5.5 V, Iq_max ≤ 500 µA. This ties reference choice to the actual power tree and energy budget rather than only its nominal output voltage and accuracy.
• Package and temperature grade – e.g. Package = MSOP-8 / SOT-23-3, Temp_grade = −40~125 °C or automotive grade. Some families change noise performance or guarantee limits with package and temperature so the BOM line should reflect the required grade explicitly.

If the datasheet only specifies typical noise or PSRR values, the BOM line can state a target such as “typical ≤ 40 nV/√Hz at 1 kHz, evaluated with margin” and mark that the application is non-safety-critical so that substitutions are handled with appropriate caution.

Common Selection Risks and Pitfalls

• Only checking initial accuracy. A 2.5 V reference with ±0.05% accuracy can still have large 0.1–10 Hz noise that wipes out several LSBs of a 16–18 bit ADC. BOMs that ignore low-frequency noise reserve too much of the error budget for offset instead of wander.
• Ignoring PSRR in switching systems. In systems fed by buck or boost converters, PSRR at the switching frequency and its harmonics decides how much ripple reaches VREF. Choosing a part only on Vout and Iq can leave you with millivolt ripple on the reference rail.
• Substituting consumer-grade references for precision parts. Drop-in replacements that match Vout and tolerance but lack specified noise and PSRR performance can significantly degrade SNR and ENOB, and may be unsuitable for automotive or safety channels without fresh bench validation.
• Treating typical noise and PSRR as guaranteed. Many datasheets list only typical curves. Safety or compliance-relevant designs should either choose families with guaranteed limits or explicitly document that typical values plus design margin are being used for non-safety paths.

Example Reference Families for Noise & PSRR-Conscious Designs

The following families illustrate how to read datasheets and map them to the BOM fields above. They are examples, not an exhaustive or prescriptive vendor list.

When submitting a BOM or small-batch request, include the noise and PSRR fields above together with ADC resolution, signal bandwidth and supply topology. This gives suppliers enough information to propose suitable low-noise, high-PSRR references instead of generic parts.

You can use a simple form such as /submit-bom and explicitly list VREF, 0.1–10 Hz noise, noise density, PSRR at key frequencies, Iq, VIN range and temperature grade, along with any automotive or safety requirements.

Noise & PSRR FAQs

This FAQ answers practical questions about reference noise and PSRR in real designs: how much 0.1–10 Hz noise is acceptable, how to turn nV/√Hz into RMS figures, how noise and PSRR impact ADC SNR and ENOB, and how to design filters, layout, tests and BOM rules that keep VREF truly quiet.