Comparator Propagation Delay vs Overdrive: Timing & Jitter
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Propagation delay is not a constant: it depends on effective overdrive and the input slew rate at the threshold crossing. Make worst-case timing predictable by translating the real waveform into VOD(t), aligning datasheet conditions, and budgeting delay + jitter with measured distributions.
What this page solves: delay is not a constant
Propagation delay (tPD) changes with overdrive (VOD) and input slew rate (dVIN/dt). A single “typical tPD” number can be misleading, especially near small overdrive where delay increases and timing spread widens.
- Read datasheet tPD–VOD curves and identify the “small overdrive” risk region.
- Map a real input waveform into effective VOD(t) near the threshold crossing.
- Budget system timing and trigger uncertainty using worst-case delay + timing spread.
This page focuses on tPD ↔ VOD ↔ dVIN/dt and timing/jitter budgeting. Hysteresis sizing, output-stage details, and offset/drift accuracy are referenced only briefly and are handled on their dedicated pages.
The left panel illustrates why small overdrive is a timing-risk region (delay grows and worst-case spread widens). The right panel shows how a real waveform maps to effective overdrive near the threshold crossing.
Definitions: overdrive, threshold crossing, and how tPD is measured
Consistent definitions are required before comparing datasheet numbers or building a timing budget. The same comparator can appear “fast” or “slow” depending on how overdrive, output threshold, load, and input slew rate are defined.
- Overdrive method: fixed step vs ramp vs sine crossing.
- Output threshold: 50% swing vs logic threshold vs VOH/VOL limit.
- Load: CL/RL and output swing strongly affect observed delay.
- Supply & temperature: use the same VDD and corner for comparisons.
- Input common-mode: behavior can shift near rails; note the test VICM.
- Do: compare tPD under matched VOD, load, VDD, and output-threshold definitions.
- Do: track tPLH and tPHL separately if edge direction matters.
- Don’t: treat “typ tPD” as a worst-case timing guarantee.
- Don’t: ignore slew rate when estimating trigger uncertainty.
Propagation delay is measured from the input threshold crossing to a defined output level (commonly 50%). Overdrive is the input difference beyond the threshold after the crossing, and it must match the datasheet test definition when comparing devices.
Mechanism: why small overdrive makes delay longer (regeneration time)
A comparator does not “instantly decide.” A tiny input difference must be amplified until the internal regenerative stage commits to one side and the output buffer can switch. When overdrive is small, that regeneration takes longer, and the observed propagation delay grows.
- Smaller VOD means a smaller “starting push” at the input pair.
- The regenerative (positive-feedback) stage needs more time to build a decisive output.
- As VOD approaches zero, decision time can become long and variable, widening timing spread.
- Output transition occurs later and with larger part-to-part and cycle-to-cycle variation.
- Small noise or ringing near the crossing can shift the decision moment noticeably.
- Timing windows and gated sampling become harder to guarantee with “typical” numbers.
Very large input excursions can introduce non-ideal behaviors (clamping, recovery effects, overshoot and EMI). For timing design, the key is to guarantee a minimum effective overdrive near the crossing, under the same load and corner conditions used for the budget.
The regenerative stage must amplify a small input difference into a decisive internal state before the output can switch. With smaller overdrive, that build-up takes longer, increasing both propagation delay and timing spread.
Datasheet reading: the 6 fields that actually matter for tPD–VOD
Propagation delay numbers are only meaningful when the test setup is understood. A fast-looking “typical tPD” can hide a poor worst-case delay at small overdrive, or a measurement condition that does not match the real system waveform and load.
- tPD vs overdrive curve (typ): locate the small-overdrive region and its slope.
- tPD max condition: note the exact overdrive used for the guaranteed limit.
- Input stimulus & source impedance: step amplitude and source-R change effective VOD(t).
- Load condition: CL/RL and output swing/threshold definitions change observed delay.
- Supply & temperature corners: worst-case timing must follow the intended corners.
- Input common-mode and near-rail behavior: confirm the test VICM and any crossover notes.
- VOD definition: fixed step, ramp crossing, or sine; include the numeric value used.
- Output threshold: 50% swing vs logic threshold; include VOH/VOL limits if used.
- Load: CL/RL and output swing; include cable/probe capacitance assumptions.
- Corners: VDD(min/typ/max) and temperature range for the budget.
- VICM: where the input sits relative to rails during the test condition.
Treat propagation delay as a conditional specification. The six highlighted areas capture what most frequently changes the meaning of “tPD” and determines whether a comparison will match real waveform and load conditions.
From voltage noise to time jitter: σt ≈ σv / (dVIN/dt)
Timing uncertainty at a comparator threshold is often driven by voltage noise and interference. A practical mapping is that voltage variation at the crossing becomes time variation through the local slope: σt ≈ σv / (dVIN/dt). Slower slope means the same noise produces larger time jitter.
- Voltage noise / interference shifts the instant when VIN intersects VTH.
- Lower dVIN/dt magnifies that shift into a larger Δt at the same σv.
- Small overdrive region typically increases both decision sensitivity and timing spread.
- Raise dVIN/dt near VTH: avoid slow ramps at the decision point.
- Reduce RC drag: minimize series resistance and effective input capacitance that flatten slope at VTH.
- Lower source impedance: improve drive so the crossing is less affected by loading.
- Use edge shaping where needed: buffer/limit/amplify to create a cleaner transition (details belong to application pages).
If the local slope at the threshold is cut in half, time jitter roughly doubles for the same voltage noise. Controlling the crossing slope is often the fastest way to stabilize timing.
With the same noise level, the fast-slope crossing produces a tight timing cluster, while the slow-slope crossing produces a much wider Δt. Controlling slope near the threshold is a direct lever on trigger stability.
Timing budget for high-speed chains: trigger, latch, and sampling windows
A robust high-speed chain treats comparator delay as a budgeted uncertainty, not a single number. The budget must include worst-case propagation delay, timing jitter at the crossing, channel/route skew, and the downstream capture window.
The same definitions must be used across all terms: VOD test condition, output threshold definition, load (CL/RL), and the intended VDD/temperature corners.
- Use max + explicit margin for guarantees; typical is only for early exploration.
- Align conditions (VOD, CL/RL, VDD, Temp, threshold definition) before comparing parts.
- Budget the small-VOD region if the real waveform crosses slowly or near zero overdrive.
- Trigger time shifts early/late and becomes less repeatable.
- Gate/capture windows miss edges or capture the wrong cycle.
- Sampling alignment drifts, degrading timing-based measurements.
The crossing event is followed by a delayed output edge with timing spread. A downstream latch/window must be placed with enough explicit margin to cover worst-case delay, jitter, and skew under matched test conditions.
Translate your input waveform into effective overdrive
Datasheet curves are plotted versus overdrive, but real systems provide a waveform that only slowly builds overdrive after the threshold crossing. Converting the local slope near VTH into VOD(t) is the fastest way to avoid paper-only selection and to predict worst-case delay and jitter in a real chain.
- Local linear view near VTH: approximate the crossing region as VIN(t) ≈ VTH + S·t, where S = dVIN/dt at the crossing.
- Convert to overdrive growth: VOD(t) = VIN(t) − VTH ≈ S·t (use the differential form for VIN+−VIN− when applicable).
- Enforce the datasheet condition at tPD: if a worst-case delay is specified at VOD = VODreq, then the system must reach VOD(tPD(max)) ≥ VODreq under matched load and corners.
- S = dVIN/dt at the threshold crossing (measured or simulated).
- VTH and the intended crossing region (where the decision happens).
- tPD(max) target for the budget, at matched VDD/Temp corners.
- VODreq used for the datasheet guarantee (or the relevant curve region).
- Load and threshold definition used for the delay measurement (CL/RL and output level).
- RC filtering: flattens the slope near VTH.
- High source impedance: adds extra RC with input capacitance.
- Series limiting resistor: slows the crossing under capacitive loading.
- ESD / clamp structures: can reshape transients (especially with large excursions).
- Cable capacitance: increases effective C and reduces dVIN/dt at the decision point.
Convert the local crossing slope into overdrive growth. If the worst-case delay guarantee is tied to a specific overdrive, the waveform must reach that overdrive by the time the budgeted tPD is expected.
Design knobs to increase overdrive (without breaking other specs)
When the effective overdrive at the decision point is insufficient, the fix is rarely “pick a faster number.” The fastest path is choosing the right lever that increases VOD or dVIN/dt near the crossing while respecting the system’s limits.
- If dVIN/dt is slow at VTH, start with RC control and threshold placement.
- If small-signal swing is the bottleneck, consider gain / edge shaping.
- If worst-case tPD or jitter budget is still not met, reconsider comparator class under matched conditions.
The four levers map to the same outcomes: higher effective overdrive and steeper crossing slope reduce delay and jitter, but each lever must be validated under the same corner and load assumptions used for the timing budget.
Edge cases & traps: zero-cross, slow ramps, and multi-toggling
Most “comparator is slow” failures are waveform problems that force operation near zero overdrive, near-zero slope, or repeated threshold crossings. The goal here is fast diagnosis: use clear criteria on the bench and apply the minimum corrective action without drifting into unrelated design topics.
These three cases are visible directly on the input waveform: lingering near VTH, shallow slope at VTH, or repeated crossings. Confirm the mechanism first, then apply the smallest correction and re-run the worst-case timing budget.
Verification: how to measure tPD–VOD and jitter on the bench
Credible verification aligns definitions and conditions: the same threshold definition, the same load, and the same supply/temperature corners. A useful bench method sweeps overdrive with a controlled fast edge, then measures the distribution of output timing rather than a single “pretty” capture.
- Fast edge + controlled amplitude: sweep input amplitude or bias to cover the relevant overdrive region.
- Measure time distribution: collect repeated timestamps and build a histogram for jitter and spread.
- Keep conditions fixed: VDD, temperature, load (CL/RL), and threshold definition must not drift during the sweep.
- Probe capacitance: changes dVIN/dt and can dominate the result at small overdrive.
- Trigger artifacts: trigger source/bandwidth can introduce apparent timing noise.
- Output load/reflection: cabling and termination can shift the output threshold crossing time.
- VDD, temperature point, and any supply/thermal limits used.
- Input stimulus: amplitude, slew, source impedance, and any series/RC elements present.
- Output load: CL/RL, cable length/termination, and intended logic threshold.
- Threshold definition: VIN crossing reference and VOUT measurement level (e.g., 50%).
- Acquisition setup: instrument, bandwidth limit, and sampling settings used.
The key to a trustworthy tPD–VOD result is holding all conditions constant while sweeping overdrive and collecting enough repeated events to describe the timing distribution. Record the minimal fields so bench results remain comparable across parts and revisions.
Engineering checklist: make worst-case delay predictable
Worst-case propagation delay is predictable when the decision-point waveform is defined, translated into effective overdrive growth, aligned to datasheet conditions, and verified with repeated timing statistics (not a single capture). The checklist below is prioritized so fixes start at the real bottlenecks.
Must-pass: align worst-case conditions (VOD, dV/dt, definition, corners)
System knobs: restore effective VOD(t) and slope (RC, source impedance, protection effects)
Board-level contributors (brief): coupling and ground-bounce that inflate dispersion
Reference part numbers (starting points only)
These part numbers are provided to speed up datasheet lookup and bench replication. Selection should follow the checklist above (aligned conditions and worst-case verification), not a single typical delay number.
- Analog Devices: ADCMP600 / ADCMP601 / ADCMP602
- Texas Instruments: TLV3501 / TLV3502 (and automotive variants where applicable)
- Texas Instruments: TLV3691 (ultra-low power comparator class)
- Analog Devices (LT): LT6700 / LT6700HV (reference-comparator style devices)
- Find the tPD vs overdrive information and note the exact test conditions (VDD/Temp/CL/definition).
- Translate the real waveform into VOD(t) and verify VOD at tPD(max).
- Replicate conditions on the bench and capture a timing histogram to quantify spread.
FAQs: propagation delay vs overdrive (tPD–VOD), slew, jitter, and verification
Short, actionable answers for timing predictability. Each FAQ uses the same data structure: Symptom / Check / Threshold / Action. No cross-topic expansion.
Why does my measured propagation delay vary a lot at small signals?
- Inspect the crossing region: does VIN linger near VTH (VOD ≈ 0 for “too long”)?
- Look for repeated crossings (ringing/noise) that can re-trigger.
- Swap probe/ground method: does the histogram change (probe loading)?
- Lock delay definitions and output load first (same VTH/VOUT threshold, same CL/cable).
- Increase crossing slope or effective VOD growth near VTH (remove slope-killing RC/source resistance first).
- Re-verify using a timing histogram at the worst-case corner, then budget with max + margin.
Which datasheet conditions make tPD numbers incomparable across parts?
- Overdrive point used (fixed VOD? curve? “typ only”?)
- Input stimulus (edge rate, step size, source impedance)
- Output load (CL/RL/cable/termination) and output swing
- Delay definition (VIN crossing reference; VOUT level such as 50% or logic threshold)
- VDD and temperature corner
- Build a one-page “condition alignment” table before comparing parts.
- Budget using tPD(max) only after matching VOD, definitions, load, and corners.
- Confirm with the same lab setup and a histogram at the worst-case point.
How do I estimate jitter from input noise and slew rate?
- Measure or simulate dVIN/dt exactly at the crossing region.
- Estimate the effective noise/perturbation at VIN near VTH (including pickup and measurement loading).
- Confirm the result is stable across trigger/probe changes (avoid “instrument jitter”).
- Increase crossing slew rate first (remove slope-killing RC and reduce effective source impedance).
- Reduce noise coupled into the crossing region (shorten loops, clean reference/ground, stabilize loads).
- Budget timing using distribution metrics (spread) at the worst-case waveform and corner.
What overdrive should be used when budgeting worst-case timing?
- Translate the real crossing waveform into VOD(t) (effective overdrive growth).
- Read VOD at the relevant decision time (near the worst-case delay window).
- Confirm the datasheet tPD(max) condition uses the same VOD definition and load.
- Budget with tPD(max) + margin at the smallest effective VOD region.
- If the waveform operates near zero-cross / tiny signal, include distribution spread (jitter/dispersion) explicitly.
- Verify with a histogram under the same VDD/Temp/load/definition used in the budget.
Why is tPLH different from tPHL and when does it matter?
- Measure both tPLH and tPHL with identical definitions and load.
- Confirm output swing and threshold level are the same for both directions.
- Check if the output structure (push-pull vs open-drain) makes one direction load-dependent.
- Budget using the slower direction (max + margin) for the edge the system actually uses.
- Align output load and termination to the real receiver.
- Re-verify with a histogram for that edge at the smallest effective overdrive condition.
My delay is fine on the bench but worse on the PCB—what changed first?
- Compare effective VOD(t) and slope at VTH: source impedance, RC, cabling, protection parts.
- Confirm output load on PCB matches bench load (CL/termination/receiver threshold).
- Probe close to the pins and change probe grounding: does the story change (coupling/ground bounce)?
- Recreate PCB load and definitions on the bench before comparing results.
- Measure the decision-point waveform on PCB (at the input pin) and recompute VOD(t).
- Only after waveform and load are aligned, tune networks or choose a faster comparator class.
How does input RC protection affect effective overdrive?
- Measure slope at VTH with RC enabled vs bypassed (same stimulus, same load).
- Look for a “flattened” crossing region where VOD(t) grows slowly.
- Confirm the RC does not introduce ringing that creates multiple crossings.
- Keep RC elements switchable for bench isolation and regression testing.
- Budget using the worst-case slope delivered with protection enabled.
- Verify across the smallest effective overdrive and worst corners (VDD/Temp/load).
Can adding hysteresis “speed up” the delay at small overdrive?
- Verify the real issue is repeated crossings (ringing/noise) rather than slow regeneration alone.
- Check whether the system can tolerate a shifted effective switching threshold (accuracy impact).
- Confirm the load and threshold definition remain unchanged when comparing results.
- Use hysteresis to eliminate repeated crossings, then re-check delay distribution at the worst-case waveform.
- Record the new effective switching point and re-run the system timing budget.
- If small-VOD dispersion remains large, improve slew/effective VOD growth instead of increasing hysteresis further.
What’s the quickest way to sweep tPD vs VOD in the lab?
- Use a fast, clean edge and vary amplitude/bias to sweep effective overdrive.
- Keep VDD/Temp/output load/threshold definition fixed throughout the sweep.
- Collect repeated timestamps per point (histogram), not single screenshots.
- Fix the load and threshold definition; lock trigger source and bandwidth settings.
- Sweep VOD using amplitude/bias changes while keeping edge rate constant.
- Report each point as a pair: (tPD metric) + (spread metric) at the worst-case corner.
Why does the delay depend on output load and output swing?
- Repeat the same VOD point while varying CL/cable/termination and log the shift.
- Confirm the output measurement level (50% or logic threshold) is consistent.
- Check for reflection-induced ringing near the output threshold.
- Budget delay using the real receiver load and swing, not a lab-only setup.
- Fix cable/termination during sweeps and record them in the measurement fields.
- If the system needs tight timing, choose output types and loads that minimize threshold-crossing variability.
How to avoid false jitter introduced by oscilloscope triggering?
- Repeat the same point with different trigger sources (input reference vs output) and compare histograms.
- Toggle bandwidth limits/noise filters and observe whether spread changes more than it should.
- Verify probe grounding and noise pickup are controlled (short ground, minimal loop).
- Lock a single trigger definition and keep it unchanged during sweeps.
- Minimize probe loading and pickup (short ground, consistent probing point near pins).
- Validate jitter with a second method (time-interval style measurement) before final budgeting.
For zero-cross detection, how to keep timing stable near 0VOD?
- Confirm the crossing region is not a slow ramp (small dV/dt) or a ringing region (multi-cross).
- Verify the decision point is measured close to the input pin (avoid cable/probe artifacts).
- Check the output load/threshold definition is fixed across measurements.
- Increase crossing slew rate at the decision point (remove slope killers first: RC/source resistance/probe loading).
- Eliminate multi-crossing mechanisms (damping or hysteresis trade-offs) and then re-check the histogram.
- Budget timing using max + margin plus distribution spread at the worst-case waveform and corner.