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Consumer Health Wearables: PPG/ECG/Temp AFEs & Low-Power Design

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Consumer health wearables succeed or fail mainly on hardware realities—optics/mechanics, analog headroom, power integrity, and RF coexistence—long before algorithms. This page shows the key AFEs/PMIC/SoC/security hooks and an evidence-driven validation + field-debug method so problems can be measured, attributed, and fixed.

H2-1 — Scope, device taxonomy, and what counts as Consumer Health Wearables

This section sets hard boundaries: which devices and measurements belong on this page, what “consumer-grade” means in engineering terms, and what the content intentionally does not cover to prevent cross-topic overlap.

What this page is (engineering scope)

Consumer health wearables are compact, body-worn devices that sense physiological proxies on the edge—typically PPG, single-lead ECG, and skin temperature trends—and must remain reliable under motion, sweat, sunlight, and battery constraints. The focus here is the hardware signal chain and evidence-based debug: what fails first, how to measure it, and what design knobs change outcomes.

In scope (typical devices)

  • Health rings: reflective PPG modules, tight power budgets, small antenna and aggressive duty-cycling
  • Recovery bands: continuous or scheduled PPG/HRV sampling, motion artifact pressure
  • Consumer ECG patches: single-lead ECG with contact variability, lead-off detection, saturation recovery
  • Temperature trackers: skin-contact temperature trending, thermal path dominated behaviors

Out of scope (avoid cross-topic overlap)

  • Smartwatch platform content: apps, OS/UX, ecosystem, feature comparisons
  • Medical/clinical claims: diagnosis, regulatory compliance deep dives, hospital workflows
  • Cloud/app backend: dashboards, server pipelines, data science infrastructure
  • Protocol-stack deep dives: BLE stack internals, OTA platform architecture
  • Smart Scale / BIA: body impedance measurement belongs to a different page
Signals and what they imply (hardware meaning, not marketing)

HR / HRV (from PPG)

Dominated by optical SNR, motion coupling, ambient light rejection, and timing stability. Failures often present as beat-to-beat jitter, rate spikes, or dropouts aligned with movement or radio activity.

SpO₂ (PPG-derived)

Highly sensitive to dynamic range, LED/photodiode matching, ambient leakage, and strap pressure. The common hardware signature is front-end saturation or ambient-dominated baselines outdoors.

Single-lead ECG

Dominated by electrode contact impedance, DC offsets, CMRR and right-leg-drive stability, plus lead-off detection reliability. Typical failures: clipping, baseline wander, flat-line events.

Skin temperature trends

Not a direct core temperature measure. Behavior is set by thermal path and contact: sensor placement, board self-heating, and ambient gradients. Common failures: charging heat bias and contact loss drift.

Boundary statement (deliverable): The content focuses on hardware hooks (AFE, power, timing, storage, security) and evidence-based debug (waveforms, flags, rails, counters). It does not provide clinical interpretations or protocol-stack walkthroughs.
Consumer Health Wearables Scope Map: what belongs on this page In-scope Devices Health Ring Recovery Band ECG Patch Temp Tracker Signals Covered PPG → HR/HRV PPG → SpO₂ ECG (1-lead) Skin Temp Engineering Focus AFEs ULP PMIC Timing & Storage Security Hooks Not Covered Here Apps / OS / UX Clinical claims Cloud backend BLE stack
Figure H2-1: Scope map to prevent cross-topic overlap — devices, signals, hardware focus areas, and explicit exclusions.

H2-2 — System-level error budget: what ruins accuracy in the real world

Wearable accuracy is usually lost before algorithms begin: motion, ambient light, contact variability, thermal gradients, and power/RF coexistence create errors that look “random” unless evidence is captured in a structured way.

A practical mental model

Wearable biosignals are small and fragile. The observable metric (HR/HRV, SpO₂, ECG waveform stability, temperature trend consistency) is limited by an error budget across the full chain: physics (motion + optical path + electrode contact), environment (sunlight, sweat, airflow), and electronics (front-end saturation, rail noise, ground bounce during radio bursts). A valid debug approach ranks causes by (1) probability in the field and (2) ability to confirm with a single measurement session.

Error sources grouped by “how they enter”

Physics & mechanics (often the #1 driver)

  • Motion artifact: periodic (walking/running) vs impulsive (wrist taps). Periodic motion can overlap the heart-rate band.
  • Fit & pressure: strap tightness changes optical coupling and perfusion; electrode pressure changes contact impedance.
  • Sweat/skin condition: alters reflectivity and contact impedance; increases variability across users and sessions.
  • Placement: sensor-to-bone distance, hair, tattoos, and curvature change the optical path and contact stability.

Electronics & coexistence (often the hidden root cause)

  • AFE saturation: insufficient dynamic range under sunlight or contact offset; recovery can corrupt a whole window.
  • LED current nonlinearity: pulse amplitude drift with battery, temperature, or driver limits.
  • Rail droop / ground bounce: BLE TX bursts or flash writes pull rails; microvolt-level AFEs see baseline jumps.
  • Regulator mode events: PFM/PWM transitions or load-step ringing can land inside the sampling window.
Priority rule: Confirm the “dominant error source” with evidence before changing filtering or tuning. Without rail traces, LED current sense, AFE output snapshots, and time alignment, algorithm changes risk hiding root causes.
Symptom → root cause → evidence (field-friendly table)

The table is designed to be actionable: each row includes the electrical signature to look for and a minimal first fix that does not require full redesign.

Symptom (field) Most likely physical root cause Electrical signature (what changes) Measurement to confirm (fast) First fix to try (minimal)
SpO₂ collapses outdoors / large bias in sunlight Ambient light leakage; optical DR insufficient TIA/ADC rails hit; baseline dominated by ambient; reduced effective modulation depth Strong-light A/B test: capture AFE output + saturation flags; log ambient cancel headroom Increase ambient rejection headroom; adjust gain staging; narrow sampling window; improve optical shielding
HR spikes exactly during radio activity Rail droop / ground bounce during BLE TX AFE baseline steps aligned to TX; AO rail shows droop/ringing; LED current pulse shape changes Overlay timestamps: AFE output + rail scope + TX event marker Move sampling away from TX window; isolate AFE rail (LDO/load switch); reduce loop area; add local decoupling
HRV becomes noisy when strap is loose Optical coupling variability; motion sensitivity increases PPG amplitude swings; higher low-frequency drift; more saturation recoveries Pressure sweep test: strap tightness steps + accelerometer correlation Mechanical fit guidance; improve module placement; adjust LED current range to keep headroom
ECG waveform clips or sticks to rails DC offset + contact impedance; insufficient input headroom Input saturation; slow recovery; RLD loop instability; lead-off toggles Contact impedance sweep (dry/sweaty); capture AFE input/common-mode and saturation flag Improve electrode interface; tune lead-off thresholds; ensure input protection does not add excessive leakage
ECG flat-line events in motion or sweat Intermittent lead contact; connector micro-motion Lead-off assertions; abrupt impedance change; baseline step before drop Mechanical agitation test + logging of lead-off counters + input bias stability Rework contact mechanics; add strain relief; adjust lead-off debounce; verify RLD stability
Temperature trends drift after charging Self-heating; thermal path coupling to PMIC/SoC/charger Board temperature rises with charge current; skin sensor lags and shows bias Charge/no-charge A/B: log sensor + PCB temp; step response capture with airflow changes Relocate sensor; add thermal isolation; enforce measurement windows away from high-power states
Data gaps appear without obvious crash Buffer overrun; storage write stalls; brownout during burst Sequence counters skip; brownout flags; flash busy spikes Enable monotonic sequence ID; log rail min and reset reasons; capture write latency histogram Increase buffering; gate writes; add brownout margin; adjust PMIC UVLO and load switching order
Error-budget checklist (do this before tuning)

Wear & environment checks

  • Repeatability across strap tightness and placement
  • Outdoor strong light vs indoor baseline comparison
  • Sweat/wet skin condition and fast temperature transitions
  • Motion profiles: periodic vs impulsive, and correlation with IMU

Electronics & coexistence checks

  • AFE headroom: saturation flags, recovery time, baseline stability
  • LED current pulse shape and repeatability across battery and temperature
  • AO rail minimum, ringing, and coupling during TX / flash writes
  • Regulator mode transitions and sampling-window placement
Deliverable: A usable error budget is created when each major symptom has (1) a dominant physical hypothesis, (2) a measurable electrical signature, and (3) a minimal first fix that can be tested within one iteration.
System Error Injection Map Where accuracy gets broken (before algorithms) Sensors PPG / ECG / Temp AFEs DR • Noise • Saturation MCU / BLE SoC Timestamp • Buffer Metrics HR/SpO₂/ECG Ambient Light Motion Contact / Fit Coexistence & System Effects Rail Noise / Droop TX burst • flash write Thermal Path self-heating • airflow Ground Bounce / EMI AFE baseline steps Probe: AFE out • LED current • saturation flag Log: TX markers • buffer counters • reset reasons
Figure H2-2: Error injection map — highlights where motion, ambient light, contact, thermal coupling, and power/RF events enter the chain. Use it as a navigation map for evidence capture.

H2-3 — PPG AFE architecture deep dive (LED/PD/TIA/ADC) for low power + robustness

A robust PPG chain is built around dynamic range headroom, ambient-light resilience, and repeatable pulse energy—then optimized for noise and power. The goal is a signal chain that survives sunlight, skin tone diversity, loose fit, and radio/power coexistence without “mystery” failures.

Canonical PPG chain (hardware viewpoint)

The PPG path is a controlled optical excitation (LED pulses) followed by current-to-voltage conversion (PD + TIA) and digitization (ADC). The chain must preserve a small modulated component under a large DC background (ambient + tissue reflectance) while staying within analog headroom. In practice, many field failures are saturation-first problems; noise optimization only matters after headroom is proven.

Dynamic range planning: the first design constraint

Budget the “worst case” before tuning

  • Sunlight / strong indoor lighting can push PD current high enough to consume most of the TIA/ADC headroom.
  • Skin tone + fit/pressure changes the modulation depth; the desired AC component may shrink while the DC background stays large.
  • Loose strap increases motion sensitivity and variability, often forcing higher LED energy which further stresses headroom.
Design principle: confirm headroom under strong ambient and worst fit. If the front-end clips or recovery tails dominate a window, algorithm tuning will mask rather than fix root causes.
Design knobs that matter (with field-facing evidence)

LED wavelength (high-level only)

  • Changes optical coupling, signal amplitude, and susceptibility to ambient leakage.
  • Alters the power vs headroom optimum point under diverse skin/fit conditions.
  • Evidence focus: outdoor bias behavior and headroom consumption under strong light.

LED driver pulse shaping (low-power core)

  • Pulse energy is set by current × pulse width × duty-cycle (conceptual).
  • Over/undershoot and slow edges can cause transient saturation or wasted energy.
  • Evidence focus: LED current sense stability across battery/temperature and burst modes.

Photodiode sizing & optical coupling

  • Larger PD increases current (better relative SNR) but raises saturation risk under ambient.
  • Smaller PD reduces headroom stress but can be night-noise limited.
  • Evidence focus: PD/TIA operating point shifts with pressure and placement.

TIA gain / bandwidth / noise

  • Night/indoor noise is often TIA noise + bandwidth + pulse energy interplay.
  • Stability is sensitive to parasitics; layout can silently change bandwidth and peaking.
  • Evidence focus: noise floor at TIA output and sensitivity to bandwidth/gain changes.

Ambient / DC cancellation strategy (hardware-facing requirements)

  • Cancellation must preserve headroom margin; “cancellation used up” is a measurable failure mode.
  • Useful hooks: LED-off sampling, ambient headroom indicators/flags, saturation counters.
  • Evidence focus: cancellation headroom vs light conditions; correlation to clipping events.
Decision tree: outdoor failures vs night-only noise

The decision tree is meant to converge within one debug session by using headroom and pulse evidence, not algorithm tuning.

Observed condition Most likely dominant cause Fast evidence to capture First knobs to turn
Fails outdoors, strong light; indoor seems normal Ambient leakage + insufficient DR/headroom TIA/AFE output near rails; saturation flags; ambient headroom indicators Increase ambient rejection margin; change gain staging; narrow sampling window; improve optical shielding
Fails at night or indoor; noise persists even when still TIA noise / bandwidth / insufficient pulse energy Noise floor at TIA output; LED current pulse repeatability; sensitivity to bandwidth setting Optimize TIA gain/BW; increase pulse energy within limits; improve decoupling on AFE rail
Becomes unstable when strap is loose or placement shifts Optical coupling variability + motion sensitivity PPG amplitude swings; more clipping/recovery tails; strong correlation with IMU peaks Mechanical fit guidance; module placement; adjust LED energy range; verify headroom under loose-fit
HR spikes coincide with radio events Power/ground coupling into analog baseline AFE baseline steps aligned to TX markers; AO rail droop/ringing during bursts Move sampling away from TX; isolate AFE rail; reduce loop area; increase local decoupling
Deliverables: PPG chain checklist + probe priority

PPG chain checklist (design/bring-up)

  • Headroom proven under strong ambient and worst fit (no sustained clipping in a window).
  • LED pulse energy is repeatable across battery, temperature, and duty-cycle modes.
  • TIA stability and bandwidth are verified with real layout parasitics.
  • Ambient/DC cancellation has measurable margin (headroom indicators/flags exist and are logged).
  • Sampling windows avoid known high-noise system events when possible (radio/flash bursts).

What to probe first (fast root-cause separation)

  1. LED current sense: pulse shape and repeatability (battery/temperature/modes).
  2. TIA/AFE output: clipping, recovery tail, and noise floor over a window.
  3. PD node (if accessible): confirm ambient dominance vs downstream issues.
  4. Analog rail (AO): droop/ringing aligned to sampling windows and radio bursts.
  5. AFE flags/counters: saturation, ambient headroom, error states.
PPG AFE Chain Design knobs: headroom • ambient • noise • pulse energy LED Driver Pulse Energy LED Wavelength PD Area/Coupling TIA Gain • BW • Noise ADC / AFE DR • Saturation Ambient / DC Cancel Headroom Margin Evidence to capture LED I-sense TIA output Saturation flag Decision branches Outdoor failures Prioritize: Ambient + DR Night-only noise Prioritize: TIA noise + Pulse
Figure H2-3: PPG AFE chain with design knobs and a field-friendly decision split (outdoor vs night). Keep labels short; capture headroom and pulse evidence first.

H2-4 — Motion artifact coupling: using IMU/time alignment as a hardware requirement

Motion artifact is not “random noise.” It is an interference source that correlates with wrist dynamics. Without tight time alignment between IMU events and PPG windows, root-cause evidence becomes ambiguous and fixes become guesswork.

Why IMU is an evidence channel (not smartwatch content)

IMU data is valuable because it provides a motion timeline. When PPG anomalies (rate spikes, dropouts, baseline shifts) are time-aligned to motion peaks, the dominant error source can be confirmed quickly. When time alignment is weak, motion-induced failures can be misdiagnosed as optical, analog, or power issues.

Time alignment requirements (conceptual, hardware-controlled)

Shared timebase & timestamping

  • PPG windows and IMU samples must be referenced to a common time domain (shared counter/clock domain).
  • Each PPG burst window needs start/end markers; each IMU sample/burst needs timestamps or sample counters.
  • Evidence goal: motion peaks and PPG artifact peaks remain consistently aligned across a session.

Clock drift & interrupt jitter

  • Drift causes alignment error to accumulate over long logs; correlation weakens even if motion is the true cause.
  • Jitter (wake/interrupt latency variation) blurs causal ordering inside short windows.
  • Evidence goal: alignment error does not grow with time; window-to-event mapping remains stable.
Sampling cadence and window coverage (hardware-friendly rules)

Window-first thinking

  • PPG is often burst/window-based; IMU must cover the window plus a margin before/after to capture the initiating motion.
  • If IMU is duty-cycled, ensure motion peaks are not systematically missed during PPG bursts.
  • When accuracy is evaluated, record the window schedule and IMU schedule together, not separately.
Placement and mechanical coupling (avoid false or weak correlation)

Mechanical design can distort evidence. If the IMU and PPG module experience different motion (relative flex, soft mounting, or different structural references), the IMU timeline will not represent the disturbance seen by the optical module. Strong correlation requires consistent mechanical coupling to the same rigid reference.

Deliverable: “Alignment rules” checklist ensures that motion artifacts can be confirmed with evidence, not inferred. The checklist belongs to hardware/firmware integration and must be validated during bring-up.
Alignment rules checklist (field-test ready)
  • PPG and IMU share a stable timebase; timestamps are comparable without external post-processing tricks.
  • Every PPG window has start/end markers; every IMU record has a timestamp or monotonic sample counter.
  • Alignment error does not accumulate over time (drift is bounded and observable).
  • Interrupt/wake jitter does not dominate short-window timing (jitter is measured and kept within a defined budget).
  • IMU placement is mechanically coupled to the PPG module reference; relative flex is minimized.
Evidence capture package (minimal signals that resolve disputes)
PPG window markers IMU timestamps Sample counters Drift indicator Jitter measurement Correlation snapshots
IMU ↔ PPG Time Alignment Hardware requirement for motion artifact evidence Shared timeline Shared Timebase PPG windows WIN WIN WIN WIN IMU samples Drift bounded Jitter measured Placement coupling Wearable chassis PPG module IMU
Figure H2-4: A single shared timebase makes motion artifact evidence repeatable. Drift and jitter must be bounded/measured, and IMU placement must be mechanically representative of the PPG module motion.

H2-5 — ECG AFE architecture: single-lead wearable realities (contact, offset, lead-off)

Wearable single-lead ECG is dominated by electrode contact impedance swings and large DC offsets from polarization and skin potentials. The front-end must survive common-mode injection, prevent saturation, and expose actionable evidence (lead-off, saturation, RLD behavior) before any field trials.

Why wearable ECG is hard (hardware-first)

A small electrode area and changing skin conditions create a wide range of contact impedance. At the same time, electrode polarization and skin potentials introduce DC offsets and slow drift that can push the analog input stage toward clipping. Environmental coupling (mains hum, touch, and radiated sources) appears largely as common-mode. If the front-end runs out of headroom, recovery tails and baseline wander can dominate entire windows and invalidate the waveform.

Front-end building blocks and their failure modes

Input protection + bias path

  • Protection is required, but leakage and bias interactions can create slow offsets under sweat and contamination.
  • A defined bias return path is essential; otherwise high-impedance contact becomes an uncontrolled operating point.
  • Typical failure signature: baseline steps, long recovery tails after touch or contact transitions.

CMRR + RLD (common-mode control)

  • High CMRR reduces mains/common-mode conversion to differential error, but real conditions can still inject large common-mode.
  • RLD is used to drive common-mode down and preserve headroom; its benefit must be validated with evidence.
  • Typical failure signature: hum bursts or clipping that correlates with contact changes or charging/touch events.

Lead-off detect: treat as evidence, not a checkbox

  • Lead-off must handle edge conditions (partial contact, intermittent contact, wet/dry transitions) without chattering.
  • Expose lead-off state, counters, and timing so that waveform anomalies can be attributed to contact reality.
  • Typical failure signature: “flatline” segments or sudden noise bursts with frequent lead-off toggling.
Saturation recovery and baseline wander (conceptual signatures)

When DC offset or common-mode pushes the input stage into saturation, recovery can take a meaningful portion of a capture window. This produces clipped segments, long exponential-like tails, and apparent baseline drift. Baseline wander can also occur without hard clipping when the contact impedance and bias time constants shift with motion and pressure.

Symptom → likely cause → quick verification

Use fast evidence (flags, counters, and a small set of node probes) to separate contact reality from analog headroom limits.

ECG symptom Likely cause Electrical signature to look for Quick verification
Clipped peaks or rails reached Large DC offset, common-mode headroom exhausted, or input protection/bias interaction Saturation flag/counter increments; long recovery tails; RLD output at extremes Apply controlled DC offset on bench; compare behavior with/without RLD; check if clipping coincides with touch/charging
Wandering baseline (slow drift) Electrode polarization drift, bias time constants shifting, intermittent contact impedance Baseline moves without proportional noise increase; drift changes with pressure or moisture Pressure/fit sweep; wet/dry swap; observe drift time constant changes; inspect leakage paths on protection network
Noisy trace (mains hum / bursty noise) Insufficient common-mode control, CMRR limitations in real wiring, poor coupling paths Hum at mains frequency; amplitude changes with touch/ground reference; RLD effectiveness varies Common-mode injection test; touch/hand proximity test; compare shield/ground conditions; verify RLD reduces hum without instability
Flatline segments or step to constant level Lead-off detection triggered or input open-circuit behavior Lead-off state toggles; waveform becomes uncorrelated and may settle to bias point Force partial contact; confirm lead-off flag timing matches waveform loss; tune debounce thresholds only after evidence is logged
Intermittent spikes (sharp artifacts) Contact micro-slip, ESD/transient coupling, protection clamp events Short high-amplitude pulses; sometimes paired with baseline step or recovery tail Controlled motion/pressure perturbation; small transient stimulus (bench-safe); inspect clamp behavior and post-event recovery
Deliverable: minimal bench tests before field trials

Bench tests (fast + high value)

  1. DC offset tolerance: sweep input offset; verify no prolonged clipping and acceptable recovery.
  2. Contact impedance sweep: emulate dry/wet/high-Z conditions; observe baseline stability and noise.
  3. Common-mode injection (conceptual): verify CMRR + RLD keep headroom under injected common-mode.
  4. Lead-off edge cases: partial contact and intermittent contact without chatter; log counters and states.
  5. Protection side-effects: confirm leakage does not create slow drift after humidity/contamination exposure.
  6. Recovery window check: after a forced saturation event, measure tail duration vs capture window.

Evidence outputs to require

  • Lead-off state + counters + timestamps
  • Saturation flag/counter (per window if available)
  • RLD output monitor point or status indicator
  • AFE output capture points for clipping/recovery signatures
Wearable ECG AFE Single-lead realities: contact Z • DC offset • common-mode • lead-off Real-world sources Contact impedance (Z) DC offset / polarization Common-mode injection Electrodes Skin Input Protection Bias Path ECG AFE CMRR • Headroom Recovery • Baseline ADC / Log RLD Driver Evidence outputs Lead-off flag/counter Saturation flag/counter RLD out monitor Minimal bench validation DC offset sweep Z sweep CM inject Lead-off edges Recovery tail
Figure H2-5: Wearable ECG AFE reality map. Contact impedance, DC offsets, and common-mode are primary failure drivers; require lead-off, saturation, and RLD evidence outputs before field trials.

H2-6 — Skin temperature sensing: thermal path, self-heating, and “what temp actually means”

Skin temperature readings are mostly a thermal-path problem, not a sensor-accuracy problem. Placement, mechanical contact, airflow, and self-heating from PMIC/SoC and charging states dominate the observed value.

What “skin temperature” represents in wearables

A wearable temperature reading is the output of a heat network: skin coupling, enclosure conduction, PCB conduction, and air convection. Changes in fit and contact pressure can shift the thermal resistance dramatically. The same sensor can report different values under identical ambient conditions purely due to contact quality and device operating state. Credible temperature reporting therefore depends on controlling and observing the thermal path.

Placement rules: build a controlled thermal path

Skin-side sensor (measurement point)

  • Place near the skin contact interface with a short, repeatable thermal path to skin.
  • Minimize parasitic conduction to heat sources; avoid direct copper “heat pipes” from PMIC/SoC.
  • Evidence goal: stable response time constant when contact is consistent.

Board/heat-source sensor (self-heating reference)

  • Place near PMIC/SoC/charger to capture state-dependent self-heating.
  • Use as a reference to separate “board heating” from “skin coupling changes.”
  • Evidence goal: board temperature increases correlate with power/charging states.
Airflow and ambient: why the same device reads differently

Ambient airflow changes surface convection and can pull the enclosure temperature away from the skin-side temperature. Open-air exposure, wrist position, and movement can increase convection, making the reading appear cooler even when internal heat generation is unchanged. This is why a single-point sensor is often insufficient to distinguish contact loss from environmental cooling.

Compensation hooks (hardware-facing, algorithm-agnostic)

Second sensor and delta-T indicators

  • Use at least two points: skin-side and board/ambient reference.
  • Track ΔT = (skin-side) − (board/reference) and its time behavior.
  • Contact loss often appears as a rapid ΔT collapse or a change in the thermal time constant.
Deliverable: thermal measurement plan (bring-up + validation)

Where to place sensors

  • Skin-side: near skin interface, controlled path, shielded from heat sources.
  • Board: near PMIC/SoC/charger to quantify self-heating.
  • Optional ambient: near vents/surface region influenced by airflow.

What deltas indicate contact loss

  • ΔT suddenly decreases and stays low while board temperature is stable.
  • Skin-side response becomes much faster/slower (time constant shift).
  • Skin-side temperature becomes highly sensitive to airflow changes compared to baseline.
Measurement discipline: log device operating state (charging/high power) alongside temperature. Without state tags, self-heating can be misinterpreted as physiological change.
Skin-side temp Board temp ΔT trend Charging flag Power state tag Time constant shift
Skin Temperature in Wearables Thermal path • self-heating • airflow • delta-T evidence Simplified thermal network Skin Contact variability Enclosure Conduction path PCB Copper & ground planes PMIC / SoC Self-heating + Airflow Sensor placement & evidence Skin-side sensor Board sensor ΔT = Skin − Board Contact loss ΔT collapse
Figure H2-6: Skin temperature is a thermal network output. Use a skin-side sensor plus a board/reference sensor, then track ΔT and time-constant shifts to detect contact loss and self-heating bias.

H2-7 — Low-power PMIC & rail strategy: duty-cycling without corrupting biosignals

Low-power architecture must be designed around sampling windows. In wearables, inrush, droop, ground bounce, and brownout edges can push AFEs into nonlinearity (baseline steps, saturation, and recovery tails) long before software can “fix” anything.

Rail partitioning: protect the analog truth

Start by partitioning rails into always-on (quiet) and burst (dirty) domains. The purpose is not just power savings—it’s containment: burst domains (RF TX, LED pulses, storage writes, haptics) must not inject droop or noise into the AFE analog domain during capture windows.

Always-on (quiet) rails

  • AFE analog rail: preserves headroom and baseline integrity.
  • Reference/timebase rail: prevents subtle drift and window misinterpretation.
  • Low-noise sensor rail (if used): avoids state-dependent offsets.

Burst (dirty) rails

  • RF/BLE TX rail: peak current and ground bounce during bursts.
  • LED driver rail: pulse current; inrush on enable.
  • Storage rail: flash write peaks and stall behavior.
  • Display/haptics rail (if present): strong transients and coupling.
LDO vs buck vs load switch gating (signal-quality view)

LDO vs buck

  • LDO: easier low-noise behavior for sensitive analog rails, but reduces efficiency and can raise self-heating.
  • Buck: higher efficiency, but switching ripple and layout/return-path choices can couple into AFE baselines.
  • Rule: keep AFE analog quiet; place aggressive switching activity in burst domains with isolation.

Load switch duty-cycling

  • Benefit: large power savings by gating burst rails.
  • Risk: inrush and rail droop on VSYS/VBAT can hit AFE headroom; wake edges can create baseline steps.
  • Rule: define enable order and verify “no droop during capture” with rail monitors and markers.
Brownout behavior: prevent “valid-looking but wrong” data

Low-voltage edges are dangerous because the system may continue running while analog performance collapses. AFE rails near dropout can become nonlinear and amplify errors without an obvious reset. The design must define low-voltage thresholds and expose explicit evidence (low-voltage flags, reset reason, and rail minima) so missing/incorrect data can be attributed to power reality.

Deliverable: power tree template

Use this structure to document domains, noise sensitivity, peak events, and required evidence hooks.

Rail / domain Type Noise sensitivity Peak event Required evidence hooks
AFE_AO (analog) Always-on High Must survive RF/LED events Rail min monitor; saturation counter marker; “AFE ready” flag
REF/Timebase Always-on High Wake / state changes Brownout flag; reset reason; timebase continuity indicator
RF_TX Burst Med TX burst current TX burst marker; VSYS droop capture; ground return review checkpoint
LED_PWR Burst Med LED pulse + inrush on enable Pulse marker; inrush event marker; AFE window “no-enable” guard
STORAGE Burst / Conditional Med Flash write peaks / stalls Write stall counter; low-voltage cutoff flag; buffer state snapshot
Deliverable: sequencing checklist (to avoid AFE corruption)

Sequencing rules (hardware-facing)

  1. AFE_AO stable → reference stable → sampling window opens (log “AFE ready” marker).
  2. RF TX bursts must not overlap capture windows unless AFE_AO droop is proven below threshold.
  3. LED rail enable must not pull VSYS/VBAT down into AFE headroom; verify inrush signature.
  4. Storage writes must not stall during capture if the rail causes droop or interrupts DMA/buffering.
  5. Brownout edges: capture rail minima and set explicit “data invalid” markers when thresholds hit.

What to probe (minimum)

  • VBAT/VSYS (system droop during bursts)
  • AFE_AO (analog headroom integrity)
  • RF_TX rail (burst current edges)
  • STORAGE rail (write peaks / stalls)
F4 — Power Events vs Sampling Timeline Duty-cycling risks: inrush • droop • brownout edges • AFE headroom Time Events Rails AFE outcome RF TX burst LED pulse Flash write Wake VBAT / VSYS AFE_AO (analog) Sampling window Sampling window Saturation Recovery tail Baseline step Markers rail min / brownout TX / LED / write saturation counter
Figure H2-7 (F4): Map burst events to rail droop/inrush and AFE outcomes. Use markers and rail minima to prove whether duty-cycling corrupts sampling windows.

H2-8 — BLE SoC + data path (hardware hooks only): sampling, buffering, and retention

This section defines the embedded pipeline without BLE stack details. Data integrity depends on ownership of sampling, DMA/buffering watermarks, timestamp continuity, and storage behavior under low-voltage and write stalls.

Pipeline view: data is a chain of contracts

A “good waveform” requires more than an ADC. Sampling cadence must be consistent, buffering must not overflow, timestamps must remain monotonic, and storage writes must complete without stalling the pipeline. Hardware-facing hooks (markers, counters, and rail probes) are required to attribute missing samples to power edges, write stalls, or buffering failure modes.

ADC ownership: AFE-integrated vs MCU ADC (evidence implications)

AFE-integrated ADC

  • Closer to the analog chain; can expose saturation and lead-off evidence directly.
  • Often provides stable sampling primitives when system rails and timebase are correct.
  • Still requires markers: sample window, burst events, and rail minima correlation.

MCU ADC

  • Flexible, but more sensitive to sequencing and shared resource contention.
  • Requires strict DMA discipline and buffer watermarks to avoid hidden gaps.
  • Must track reset reason and low-voltage events to explain discontinuities.
DMA + buffering: track watermarks and drops

Failure modes to instrument

  • Buffer overrun: samples dropped; timestamp jumps or missing windows.
  • DMA stall: cadence stretches; gaps appear without obvious resets.
  • Pointer inconsistency under low voltage: duplicates, reordering, or “ghost” segments.
Timestamp integrity: monotonic or meaningless

Timestamps must share a single timebase with sampling markers. Drift, resets, and counter wraps must be visible as explicit events. Without these hooks, the system can produce plausible-looking records that cannot be aligned to physiology or motion evidence.

Retention choices: flash vs FRAM (hardware consequences)

Flash

  • Write latency variability can create write stalls.
  • Write current peaks can pull rails down near low-voltage thresholds.
  • Requires stall counters and low-voltage cutoffs to guarantee consistency.

FRAM

  • Fast writes; more resilient to low-voltage edges for small records.
  • Often simplifies “never lose the last N seconds” retention strategies.
  • Still needs markers and reset reasons to prove continuity.
Deliverable: debug checklist for “battery drop + missing data”

Follow evidence first. Do not guess firmware filters until counters, markers, and rail probes confirm the failure class.

Which counters / logs to add

  • overrun_count, dma_drop_count, max_buffer_level
  • write_stall_count, write_retry_count
  • low_voltage_event_count, reset_reason
  • sample_window_marker, RF burst marker, flash write marker

Which rails to probe (minimum)

  • VBAT/VSYS (global droop + brownout edges)
  • AFE_AO (analog continuity during capture)
  • STORAGE rail (write peaks / stalls correlation)
  • RF_TX rail (burst correlation to gaps)
Rule of attribution: if gaps align with burst markers or write markers, the root cause is typically sequencing, rail droop, or buffering contention—not BLE link behavior.
sample marker RF burst marker write marker overrun_count max_buffer_level write_stall_count low_voltage_event reset_reason
Sampling-to-Retention Data Path Hardware hooks only: markers • counters • timestamps • retention evidence AFE / ADC DMA Ring Buffer Timestamp marker / timebase Storage Flash / FRAM Retention / Recovery last-N seconds • consistency Injected events RF burst Low voltage Write stall Evidence outputs overrun_count max_buffer_level write_stall_count low_voltage_event reset_reason sample marker Root-cause by correlation Align gaps with markers and rail minima before changing software filters
Figure H2-8: Hardware data path from sampling to retention. Instrument markers and counters, then correlate missing data with rail minima, RF bursts, and write stalls.

H2-9 — Data-security hooks: secure boot, key storage, and protecting health data at the edge

Wearables need a practical baseline: only authenticated firmware runs, secrets are not extractable in production, and health data is protected at rest with auditable security events. This section stays device-side (no protocol-stack deep dive).

Threat surfaces that actually show up in small wearables

Firmware + device control risks

  • Unauthorized firmware: modified images running without authenticity checks.
  • Rollback: older firmware bypasses newer security controls.
  • Debug exposure: production units ship with accessible debug ports.
  • Identity cloning: repeated IDs or shared secrets across units.

Data + evidence risks

  • Plaintext storage: health records/logs cached in flash without encryption.
  • Untrusted logs: security events can be erased or rewritten silently.
  • Ambiguous state: no markers for “secure / degraded / invalid” modes.
  • Weak recovery: failures keep collecting data without clear integrity bounds.
Secure boot chain: one trust path from power-on to app

A minimal secure boot chain for wearables is a sequence of verifications: Boot ROM → verified bootloader → verified application. The rule is simple: every executable stage must validate the next stage’s authenticity before handing off control. When verification fails, the device must produce a clear, persistent evidence signal (error code + event counter) so field issues can be attributed to authenticity failures rather than “random bugs.”

Debug lock and provisioning: production defaults must be locked

Debug features that are necessary in development become a liability in production. A practical baseline includes: production debug ports locked by default, unlock attempts recorded as security events, and provisioning steps that establish per-device identity and secret material without reuse across units.

Key storage and derivation: keep secrets non-exportable, derive by purpose

Small devices should treat the root secret material as non-exportable and derive purpose-specific keys for: data at rest, encrypted logs, and device binding. Purpose separation limits blast radius and makes review easier. Rollback protection must cover the update path so older firmware cannot bypass key policy or log integrity requirements.

Pairing risk surfaces (high-level) + device identity

Wearables should expose a stable, verifiable device identity and maintain a protected binding state. Binding must be integrity-protected so “rebind/replay” does not silently redirect data to an unintended host. Keep details high-level: the required hook is a persistent, verifiable binding record plus security events on unusual transitions (rebind, erase, or reset reason changes).

Deliverable: minimal security baseline checklist
Baseline item What “good” looks like Evidence hook
Secure boot All stages verify the next stage before execution. Boot verify status + persistent fail counter + error code.
Signed updates Update images verified before install; reject unauthenticated packages. Update verify log + signature-fail event.
Anti-rollback Downgrades rejected based on monotonic version counter. Rollback-reject event + stored version counter.
Debug lock Production units ship locked; unlock requires explicit authorized flow. Debug lock state + unlock-attempt event counter.
Non-exportable root secret Root secret is not readable by normal application software. Key-store access policy + audit event on policy violation.
Purpose-derived keys Separate keys for storage, logs, and binding. Key-derivation “purpose tags” recorded in secure events.
Encrypted data at rest Health caches and records stored encrypted (or strong integrity + encryption). Encryption-enabled marker + storage format version.
Encrypted / integrity-protected logs Security events cannot be silently modified. Log integrity marker + write-once counter (or monotonic index).
Device identity Unique per-device identity and binding state protected against cloning. Identity presence check + binding-state integrity flag.
Secure failure mode On authenticity failure, device enters restricted mode with explicit markers. Restricted-mode flag + reason code.
Data wipe hook Local data can be erased for transfer/return; wipe is verifiable. Wipe-complete marker + post-wipe counter reset evidence.
Security review rule: every control must have a device-side evidence hook (flag/counter/log). Without evidence, security cannot be debugged in the field.
F5 — Secure Path (Boot → Keys → Data → Update) Small wearable baseline: authenticity • non-exportable secrets • auditable events Boot chain Boot ROM root trust Verified BL signature check Verified App authentic code Keys Key Store non-exportable Root secret Policy Key Derivation derive by purpose Storage key Log key Bond key Data & evidence Encrypted Data health records Encrypted Logs boot • rollback • debug OTA Update signed package Verify Install Anti-rollback version counter Debug Port locked (prod) Blocked Evidence: verify status • fail counters • security events
Figure H2-9 (F5): A device-side secure path that connects verified boot, non-exportable secrets, purpose-derived keys, encrypted data/logs, signed updates, and anti-rollback—plus locked debug in production.

H2-10 — EMC/ESD + analog coexistence: keeping microvolt signals alive next to RF

Wearables fail “on wrist” when return paths, fast edges, and interface transients couple into high-impedance biosensing nodes. This section focuses on layout, protection placement, and measurement-window isolation.

Field symptoms that indicate coupling (not algorithms)

ECG / electrode path

  • Baseline steps and slow recovery after touch/ESD events.
  • Periodic hum correlated with charging or power switching states.
  • Random spikes that align with RF bursts or connector handling.

PPG / optical path

  • Waveform jitter aligned with RF TX windows.
  • Ghost pulses near LED edge transitions and ground bounce.
  • Charging-time noise that disappears when off-charger.
Coupling paths to design against

Reliable coexistence comes from mapping energy flow, not adding random filters. The dominant paths are: return-path coupling (high current sharing AFE reference), supply coupling (droop/ripple hits headroom), electric-field coupling (high dv/dt edges near high-impedance nodes), and ESD/transient entry (electrodes/ports inject fast energy).

Grounding strategy: keep AFE reference quiet while RF burns current

Review rules

  • Do not allow RF / charger return currents to traverse the AFE reference region.
  • Minimize loop area for LED pulse currents; keep the loop away from electrode/TIA nodes.
  • Use explicit “keep-out” around high-impedance inputs and avoid routing fast edges nearby.
  • If shielding/cans are used, ensure they do not create unintended return paths through the AFE region.
ESD placement: electrodes and charging port must clamp early

For wearables, the electrode path and the charging interface are common transient entry points. Place protection so energy is clamped near the interface and does not propagate into sensitive analog regions. Recovery behavior matters: clamping and leakage must not produce long baseline tails or state-dependent offsets that masquerade as physiology.

Charger noise injection: isolate or mark measurement windows

Charging paths can inject ripple and shift local ground potential. The system must either isolate biosensing rails/returns from charger activity or ensure capture windows are protected with explicit markers (charging state, switching state) to prevent silent corruption. If “charging” aligns with noise, treat it as a hardware coexistence issue (return paths, partitioning, and window discipline).

Deliverable: biosensing layout review checklist
Area What to separate / guard What to filter / protect What to mark / probe
Partitioning AFE input zone kept away from RF, charger, and switching nodes (keep-out defined). Shield/can only if return paths remain controlled. Document “capture windows” vs burst/charge states.
Return paths RF/charger/LED loops do not share AFE reference region; minimize loop areas. Provide local decoupling near sensitive rails (AFE analog). Probe VBAT/VSYS + AFE rail minima during bursts/charge.
Routing High-impedance electrode/TIA traces short; far from fast edges and high dv/dt nets. Guarding around high-impedance nodes where appropriate (layout rule). Marker: LED pulse / RF burst / charger switching state.
Interfaces Electrode and charging interface entry kept away from analog core paths. ESD clamp close to interface; avoid long energy path into board interior. Record ESD-related resets / fault flags for correlation.
Charging coexistence Charger return currents do not traverse AFE reference region. Isolate charger ripple from biosensing rails (partitioning + filtering as needed). Marker: charging state; correlate noise with charge events.
Analog + RF Coexistence Coupling Map Design against paths: return • supply • E-field • ESD Wearable PCB (simplified) AFE zone high-Z nodes RF zone TX bursts LED driver fast edges Charger ripple + return Interfaces Electrodes Charge port ESD clamp ESD clamp Return path Supply ripple E-field ESD entry Port transient Markers sample window RF / LED / charge Probe rails VBAT / VSYS AFE_AO min Keep-out: fast edges away from high-Z
Figure H2-10: A coupling-path map for biosensing coexistence. Review return paths, supply ripple, E-field proximity, and ESD entry points—then correlate noise with RF/LED/charging markers.

H2-11 — Validation plan (bench → wrist → field): what to measure, what “pass” means

A repeatable wearable validation plan must produce measurable outputs (markers, counters, waveforms, and rail minima), and define acceptance criteria as ranges/thresholds. The same evidence bundle should work from bench bring-up to wrist tests and long field trials.

Three-stage funnel: why each stage exists

Bench (isolate variables)

  • Verify AFE linear range, saturation recovery, rail headroom, and protection behavior.
  • Prove that markers/counters are trustworthy before involving motion and sunlight.
  • Output: waveforms + register/status flags + rail minima + event logs.

Wrist (controlled realism)

  • Introduce motion, strap pressure, sweat/skin optics, and ambient light variability.
  • Validate that “quality gates” reject bad data rather than output plausible wrong data.
  • Output: validity ratio, saturation duty, motion-aligned artifacts, drift markers.

Field (long duration, random states)

  • Capture charging, RF burst patterns, thermal soak, and user behavior randomness.
  • Verify that failures are attributable using a consistent evidence bundle.
  • Output: symptom correlation with markers (RF/LED/charge), reset reasons, rail minima.

Definition of “pass”

  • Not “looks good”: it is thresholds on measurable metrics.
  • Pass criteria should be stratified by scenario (indoor/outdoor, light/strong motion).
  • Every test must name the evidence hook(s) to capture for root-cause attribution.
Example BOM/MPN set used to instrument evidence hooks
PPG AFEs (integrated LED drivers, status hooks): Analog Devices ADPD4100 Texas Instruments AFE4404 Texas Instruments AFE4405 Maxim/ADI MAX86141 Maxim/ADI MAX86150 (PPG+ECG) Texas Instruments AFE4950 (PPG+ECG)
ECG AFEs (single-lead wearable): Maxim/ADI MAX30003 Texas Instruments ADS1292R Analog Devices AD8233
Temperature sensors (low drift / high accuracy): Texas Instruments TMP117 Texas Instruments TMP116 Maxim/ADI MAX30205 Silicon Labs Si7051
BLE SoCs (timestamp + markers + logging control): Nordic nRF52832 Nordic nRF52840 Nordic nRF5340 Renesas DA14695 Silicon Labs EFR32BG22
Power/charging hooks: TI BQ25120A (charger/PMIC) TI BQ25155 TI TPS22918 (load switch) TI TPS62743 (buck) Maxim/ADI MAX17055 (fuel gauge) TI BQ27441 (fuel gauge)
Retention/logging (field evidence): Winbond W25Q128JV (SPI flash) Infineon/Cypress FM24CL64B (I²C FRAM) Fujitsu MB85RC256V (FRAM)
ESD for ports (examples): TI TPD1E10B06 TI TPD4E02B04 Nexperia PESD5V0S1UL

Note: These part numbers are practical, commonly-used reference options for wearable biosensing hooks and debug instrumentation. Final selection depends on target power, package, and interface constraints.

Deliverable: structured validation matrix (test → setup → instrument → acceptance)
Test Setup (variables swept) Instrument / evidence capture What to capture (must-have signals/logs) Acceptance criteria (example ranges) Example BOM hooks (MPNs)
PPG — ambient stress Indoor → window → outdoor sunlight; optional partial shading. Oscilloscope + data logger; ambient light source meter if available. PPG saturation/clip flags, DC level trend, LED current marker, AFE rail minima, RF/charge markers. D_sat < 1% (target) in “intended use” lighting; recovery time T_rec < 200 ms after transient saturation; valid sample ratio > 90% (indoor), > 75% (outdoor). ADPD4100, AFE4404/AFE4405, MAX86141, MAX86150; TPS22918 (gating); INA219 (rail correlation).
PPG — motion (repeatable) Treadmill walk/jog profiles; fixed cadence segments. IMU marker + PPG stream; export time-aligned logs. IMU magnitude bucket, timestamp jitter marker, quality gate output, rail minima around RF bursts. Quality-gate “invalid” detection triggers under high motion; false-valid ratio < 5% (target); timebase drift < 50 ppm equivalent over test duration (target). nRF52832/52840, EFR32BG22; PPG AFE list above; TMP117 for drift correlation (optional).
PPG — motion (random impulses) Hand gestures, taps, rapid direction changes; strap conditions fixed. High-rate IMU logging + event markers. Artifact bursts aligned to IMU impulses, AFE saturation counters, LED pulse marker. Artifact rate measurable and traceable; no sustained saturation; post-impulse recovery < 300 ms (target). MAX86141 / AFE4405; nRF5340 for higher compute/logging headroom.
PPG — strap pressure sweep Loose / nominal / tight; repeatable tension method if available. Pressure proxy + PPG quality metrics. DC baseline shift, AC amplitude, ambient leakage indicator (if provided), validity ratio. Nominal pressure band maintains stable quality; out-of-band pressure triggers quality degradation flags; avoid “silent wrong data.” PPG AFE: MAX86141 / ADPD4100; storage: FM24CL64B (evidence persistence).
ECG — contact impedance sweep Impedance network sweep (low→high); simulate contact degradation. Signal generator + scope; capture AFE status and lead-off flags. Input saturation flag, baseline wander trend, lead-off state transitions, AFE rail minima. Within intended impedance range: no sustained clipping; lead-off detect asserts reliably; baseline stabilization after step < 2 s (target). MAX30003, ADS1292R, AD8233; TPD1E10B06 (ESD at interface, if applicable).
ECG — lead-off behavior Open/short/ intermittent contact patterns; connector micro-motions. Toggle fixture + log flags + waveform snapshots. Lead-off flag latency, false lead-off rate, “flatline” classification marker. Lead-off detection latency < 1 s (target); false lead-off < 1% (target); flatline must be flagged as invalid. MAX30003 / ADS1292R; FRAM FM24CL64B for event retention.
ECG — ESD robustness + recovery Controlled transient injection at electrode/port in lab-safe manner. Capture reset reason + event log + recovery waveform. Reset reason, protection trigger event, recovery time from saturation, post-event noise floor. No lock-up; recovery time T_rec < 3 s (target); event is logged with timestamp and reason. TPD4E02B04 / PESD5V0S1UL (ports); MAX30003 / ADS1292R.
Temp — ambient step response Ambient step (cool/warm airflow); fixed contact condition. Temp logger + timestamps; optional second sensor for ambient reference. Time constant tau, delta(skin-adjacent vs board/ambient), charging/RF markers. Tau within target window (example: 20–90 s depending on mechanics); drift under stable ambient < 0.05°C/min (target). TMP117/TMP116, MAX30205, Si7051.
Temp — self-heating characterization Enable RF bursts / logging / charging states; compare to idle baseline. Power monitor + temp logger; correlate state markers. Temperature rise vs power state; thermal soak time; charging marker alignment. Self-heating rise ΔT within budget (example target: < 0.3°C over 60 s in measurement window); state-dependent bias is detectable and marked. BQ25120A/BQ25155, TPS62743; TMP117; MAX17055/BQ27441.
Timebase integrity Long run (hours); include sleep/wake cycles. Log timestamps + event counters; compare to reference clock if available. Timestamp continuity marker, wrap/reset indicator, interrupt jitter marker. No unmarked discontinuities; drift within target (example: < 100 ppm equivalent without correction); all resets labeled. nRF52840/nRF5340; FRAM FM24CL64B (monotonic counters).
Rail droop under RF burst Worst-case RF TX duty; low battery; cold start. Scope on VBAT/VSYS/AFE rails; log RF markers. Rail minima, brownout flags, AFE saturation alignment to TX markers. AFE rail droop < headroom budget; no repeated brownouts; “HR jump” correlates only if droop present (debug gate). INA226/INA219 (monitor), TPS22918 (gating), MAX17055/BQ27441 (battery model).
Evidence bundle rule: every run should export (1) markers (RF/LED/charge), (2) rail minima + reset reasons, (3) AFE clip/lead-off flags, (4) timestamp continuity indicator, and (5) a compact “validity ratio” metric. This keeps bench, wrist, and field results comparable.
F6 — Validation Funnel & Matrix Bench → Wrist → Field • measurable outputs • pass = thresholds Bench Wrist Field isolate variables controlled realism long duration PPG ECG Temp Ambient + linearity Motion + pressure Outdoor + charging Impedance + clip Lead-off + micro-move ESD + recovery log Step response Contact variability Self-heating bias Outputs (must be measurable) markers • rail minima • clip/lead-off flags • timestamp continuity • acceptance thresholds
Figure H2-11 (F6): A staged validation funnel. Each stage produces the same evidence bundle so failures can be attributed by markers, rail minima, counters, and thresholds.

H2-12 — Field debug playbook: symptom → evidence → root cause → fix

Field failures should be debugged by evidence gates (markers, rail minima, AFE flags, reset reasons, storage stalls), not by guessing algorithms. This SOP converts symptoms into a repeatable decision flow.

Deliverable A: “Top 10” signals/logs to always capture

Always-capture evidence bundle (protocol-independent)

  1. VBAT / VSYS minimum + brownout/UVLO flags (correlate power integrity).
  2. AFE analog rail minimum (or “analog rail OK” flag) during capture windows.
  3. RF TX marker (timestamped burst indicator from BLE SoC).
  4. LED pulse marker (PPG window timing / LED current enable marker).
  5. Charging state marker (charger on/off + switching activity indicator if available).
  6. Reset reason (watchdog, brownout, software reset, fault reset).
  7. AFE clip/saturation counter (PPG/ECG) + recovery time estimate.
  8. Lead-off/contact state (ECG) with transition timestamps.
  9. Storage write stall counter (flash busy time / FRAM write count) + buffer overrun count.
  10. Timestamp continuity marker (wrap/reset/clock step + interrupt jitter marker).

Example hook parts (MPNs): nRF52840 / nRF5340 (markers + logging), FM24CL64B (event retention), INA226 (rail correlation), MAX17055 (battery model), BQ25120A (charging state marker), MAX30003 (lead-off + clip flags).

Deliverable B: decision gates (fast root-cause classification)
Three fast gates: Marker alignment? Rail droop / reset reason? AFE flags / lead-off / storage stall?
If symptom aligns with RF/LED/charging markers, suspect coexistence or power-path coupling. If rail minima drops or reset reason changes, suspect power integrity and sequencing. If AFE clip/lead-off asserts or storage stalls spike, suspect front-end headroom/contact or retention pipeline.
Deliverable C: SOP table (symptom → evidence → root cause → fix order)
Symptom (field) Evidence to capture first Likely root-cause class Fast fix order (hardware-first) Example BOM/MPNs to implement hooks or mitigations
HR jumps during BLE TX RF TX marker alignment; VBAT/VSYS min; AFE rail min; clip counter. Power droop + AFE headroom loss; RF return-path coupling. 1) Verify rail droop under burst → 2) partition returns → 3) gate measurement windows or isolate rails. INA226/INA219 (monitor), TPS22918 (rail gating), TPS62743 (quiet buck), nRF52840 (TX marker).
Outdoor SpO₂ collapses Ambient stress markers; AFE saturation duty; LED current marker; DC baseline trend. Ambient overload + insufficient dynamic range; optical leakage. 1) Confirm saturation/DR → 2) improve ambient rejection (optics + AFE settings) → 3) enforce quality gating. ADPD4100, AFE4404/AFE4405, MAX86141; low-leakage ESD: TPD1E10B06 (if port coupling involved).
ECG intermittently flatlines Lead-off transitions; contact state marker; clip flags; connector motion correlation. Contact intermittency; lead-off threshold; electrode polarization offset causing saturation. 1) Validate lead-off detection → 2) confirm saturation/recovery → 3) review electrode path protection + leakage. MAX30003, ADS1292R, AD8233; ESD arrays: TPD4E02B04 / PESD5V0S1UL.
Temp trends drift after charging Charging state marker; temp delta vs board/ambient; thermal soak time; self-heating profile. Self-heating bias; thermal path coupling from charger/PMIC/SoC. 1) Quantify self-heating → 2) relocate/insulate sensor path → 3) add ambient reference sensor for compensation. TMP117/TMP116, MAX30205; BQ25120A/BQ25155 (charger state marker).
Random gaps / missing biosignal blocks Storage stall counter; buffer overrun; timestamp continuity; VBAT dips at write time. Flash busy stalls; brownout during write; insufficient buffering. 1) Measure stall/overrun → 2) add retention (FRAM) or increase buffering → 3) protect writes with power policy. W25Q128JV (flash), FM24CL64B / MB85RC256V (FRAM), MAX17055/BQ27441 (battery estimation).
Only fails while charging Charge marker alignment; VSYS ripple; AFE rail ripple; ESD/port event flags. Charger ripple injection; return-path overlap; port ESD susceptibility. 1) isolate charger return → 2) improve rail filtering/partition → 3) enforce measurement windows away from noise. BQ25120A/BQ25155; INA226 (ripple correlation); TPS22918 (window isolation); TPD4E02B04 (port ESD).
Deliverable D: field capture package (what to send back from real devices)

Field evidence package (repeatable)

  • Duration: include at least one charging segment and one outdoor segment; include motion + idle.
  • States: RF burst present, LED pulses present, charging on/off transitions captured.
  • Files: markers + counters + rail minima + reset reasons + AFE clip/lead-off + storage stalls + timestamp continuity.
  • Snapshot triggers: on clip, on lead-off, on rail droop, on watchdog reset, on buffer overrun.

Practical retention strategy (MPNs): FM24CL64B (FRAM for event logs), W25Q128JV (bulk records), nRF52840 (marker/timebase), INA219 (rail correlation).

F7 — Field Debug Decision Tree Symptom → evidence gates → root cause class → fix order Symptoms HR jumps @ TX Outdoor SpO₂ drop ECG flatline Temp drift post-charge Evidence gates Marker alignment? RF • LED • charge Rail droop / reset? VBAT/VSYS min • reason AFE / contact flags? clip • lead-off Storage / timebase? stall • overrun • jumps Root cause class Power integrity Coupling / EMC Contact / optics Storage pipeline Timebase issues Fix order (hardware-first) measure → correlate → classify → fix returns/rails/protection → enforce markers & quality gates
Figure H2-12 (F7): A field SOP that gates decisions by marker alignment, rail integrity, AFE/contact flags, and storage/timebase evidence—then routes to a root-cause class and fix order.

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H2-13 — FAQs (Hardware evidence + validation focused)

These answers stay hardware-focused: measurable evidence (markers, rail minima, AFE flags, lead-off/contact state, storage stalls), and practical hooks (example MPNs). No clinical claims; the goal is diagnosability and robustness.

How to use: For each symptom, first confirm marker alignment (RF/LED/charging), then check rail minima and AFE flags (clip/lead-off), then verify storage/timebase continuity. This prevents “looks plausible but wrong” outcomes.
Why does HR look stable indoors but becomes chaotic outdoors in sunlight?

Outdoors usually collapses because ambient light pushes the PPG chain out of linear range before any “algorithm issue.” Prove it by capturing saturation/clip flags, DC baseline drift, and LED current markers during an ambient stress sweep. If saturation duty rises or recovery time increases, prioritize ambient rejection + dynamic-range headroom (optics + AFE settings), and enforce quality gating. Example AFEs: ADPD4100, AFE4405, MAX86141.

Mapped: H2-3 / H2-11
Evidence: saturation duty, DC baseline, LED marker, valid ratio
ADPD4100AFE4405MAX86141
Why does tightening the strap change HRV noticeably—sensor problem or physiology?

Treat strap pressure as a controlled variable. If HRV changes repeatably with pressure while motion and ambient are held constant, the dominant mechanism is usually optical coupling (leakage, contact micro-motion) rather than physiology. Confirm with AC amplitude, DC shift, and quality/invalid ratios across loose/nominal/tight settings. Hardware response: widen LED current control range, improve mechanical sealing, and make “invalid” flags explicit. Example AFEs: MAX86141, AFE4404; add retention (FM24CL64B) to preserve evidence.

Mapped: H2-2 / H2-3
Evidence: strap sweep, AC/DC trends, validity flags
MAX86141AFE4404FM24CL64B
ECG works on some users but clips on others—what evidence separates contact vs AFE dynamic range?

Run a contact-impedance sweep (fixture or controlled electrode conditions) and log clip flags, baseline recovery time, and lead-off/contact transitions. If clipping correlates with high impedance or intermittent contact, the culprit is contact/polarization offset. If clipping persists even under good contact, headroom/CMRR/rail integrity is the likely bottleneck. Wearable-focused ECG AFEs provide lead-off and status hooks: MAX30003 or ADS1292R; a simple AFE like AD8233 helps isolate front-end behavior.

Mapped: H2-5 / H2-11
Evidence: impedance sweep, clip flag, recovery time, lead-off state
MAX30003ADS1292RAD8233
Why do missing intervals appear right after BLE transfers?

Treat BLE transfer as a power-and-timebase stressor. First check marker alignment: do gaps start within a fixed window after TX? Then gate by evidence: VBAT/VSYS minima (rail droop), buffer overrun counters, and flash/FRAM stall time. Typical root causes are RF burst current causing analog rail droop (AFE resets/clip) or storage stalls starving buffers. Add a load switch for quiet measurement windows (TPS22918) and log with FRAM (FM24CL64B); BLE SoCs like nRF52840/nRF5340 provide precise TX markers.

Mapped: H2-7 / H2-8 / H2-12
Evidence: TX marker, rail minima, overrun + stall counters, timestamp continuity
nRF52840TPS22918FM24CL64B
How can motion artifact dominance be identified without complex DSP?

Use correlation and gating rather than DSP. If PPG “quality” collapses whenever IMU magnitude spikes (with consistent time alignment), motion artifact is the dominant driver. Capture IMU marker, timestamp jitter, PPG validity ratio, and clip flags. Periodic artifacts (treadmill cadence) vs impulsive artifacts (taps) should produce different marker patterns; both are diagnosable without waveform-level DSP. Hardware requirement: tight sampling alignment and stable timebase. A BLE SoC (nRF5340) plus an IMU provides the necessary markers.

Mapped: H2-2 / H2-4
Evidence: IMU alignment, validity ratio, timestamp jitter
nRF5340IMU marker
Why does SpO₂ get worse at low battery even if the device still runs?

“Device runs” does not mean “PPG chain is linear.” Low VBAT can reduce LED current headroom, increase rail ripple, and raise saturation duty, especially during RF bursts. Prove it by logging VBAT/VSYS minima, LED current marker integrity, and AFE clip counters under low-battery conditions. If quality degradation correlates with droop, prioritize power partitioning: quiet analog rail (buck like TPS62743 + local LDO if needed), burst rail gating (TPS22918), and accurate battery estimation (MAX17055 or BQ27441) to schedule measurement windows.

Mapped: H2-7 / H2-3
Evidence: rail minima, LED marker, clip duty vs SoC/battery state
TPS62743TPS22918MAX17055
Temperature trends drift after charging—how to prove self-heating vs ambient change?

Add explicit state markers and a second temperature reference. If temperature drift begins in a repeatable window after charging enable, and the board/ambient reference rises earlier than the skin-adjacent sensor, the mechanism is self-heating + thermal path coupling. Validate with step-response tests (ambient airflow) and a controlled charging on/off sequence, then quantify time constants and ΔT (skin-adjacent vs board/ambient). Practical sensors: TMP117/TMP116 (high accuracy), MAX30205 (skin-adjacent use cases); charging marker from BQ25120A/BQ25155.

Mapped: H2-6 / H2-11
Evidence: charge marker, dual-sensor delta, thermal time constants
TMP117MAX30205BQ25120A
Top 3 layout mistakes that kill microvolt ECG next to RF?

Three recurring killers: (1) broken/long return paths that force RF current through the ECG reference region, (2) high-impedance ECG inputs routed near fast edges (RF, LED pulses, charger switch nodes), and (3) protection/ESD leakage paths that bias inputs or reduce CMRR. Prove each class by marker-aligned noise, rail ripple checks, and lead-off/clip flags during controlled RF/charging states. Use low-leakage ESD arrays at ports (TPD4E02B04 / PESD5V0S1UL) and keep ECG input protection consistent with the AFE’s headroom.

Mapped: H2-10
Evidence: marker-aligned noise, rail ripple, lead-off + clip flags
TPD4E02B04PESD5V0S1ULMAX30003
If adding a secure element, what’s the minimum integration that truly improves security?

Minimum “real improvement” requires: non-exportable keys, verified boot (firmware authenticity), rollback protection, and debug lock policy. A secure element only helps if it anchors device identity + signing/attestation and prevents key extraction even with physical access. Keep it practical: store long-term keys in the secure element, use it to verify firmware signatures, and log security-relevant events. Examples: Microchip ATECC608B (compact identity/crypto), NXP SE050, Infineon OPTIGA Trust M—choose by interface, power, and lifecycle needs.

Mapped: H2-9
Evidence: secure boot status, rollback counter, debug lock state, signed event logs
ATECC608BSE050OPTIGA Trust M
What logs/counters should be added so field returns are diagnosable in one round-trip?

Build a “one-shot evidence bundle”: RF/LED/charging markers, VBAT/VSYS minima, analog rail minima, AFE clip counters, lead-off transitions, reset reasons, storage stall + buffer overrun counters, and timestamp continuity markers. Also add snapshot triggers on clip/lead-off/droop/watchdog. Persist the last N events in FRAM so power loss does not erase evidence (FM24CL64B / MB85RC256V), and store bulk traces in SPI flash (W25Q128JV). With a BLE SoC marker (nRF52840), symptoms can be correlated to state transitions immediately.

Mapped: H2-12
Evidence: markers + minima + flags + stalls + reset reasons + continuity
FM24CL64BMB85RC256VW25Q128JV
Why does the same hardware differ across skin tones or wrist sizes, and what can hardware do?

The dominant issue is optical and mechanical variability changing the PPG operating point: reflected signal amplitude, ambient leakage, and coupling stability. Hardware can widen usable range by budgeting dynamic range for worst-case ambient + low reflectance, expanding LED current control range, improving ambient rejection (AFE + optics), and adding explicit quality/invalid flags. Validate using a controlled ambient + strap pressure sweep and compare saturation duty and validity ratio rather than raw “accuracy.” AFEs with robust status hooks (ADPD4100, MAX86141) make these differences measurable and actionable.

Mapped: H2-2 / H2-3
Evidence: DR margin, saturation duty, ambient leakage indicators, validity ratio
ADPD4100MAX86141AFE4405
How to validate “accuracy stability over time” without clinical trials?

Focus on stability and drift under controlled, repeatable stimuli: long runs with state cycling (idle/RF bursts/charging), thermal soak + temperature cycling, and periodic strap pressure repeats. Define pass criteria as drift bounds on signal-quality metrics (baseline shift, saturation duty, recovery time) and timebase continuity, not clinical endpoints. Log markers + minima + reset reasons so changes are attributable. Use high-accuracy temperature sensing (TMP117) to separate thermal bias from sensor drift, and retain event history in FRAM (FM24CL64B) to survive brownouts.

Mapped: H2-11
Evidence: drift markers, thermal cycling, saturation/recovery trends, continuity
TMP117FM24CL64BINA226
F8 — FAQ Map: Symptom → Evidence → Chapter Keep answers diagnosable: markers • rail minima • AFE flags • storage/timebase Symptoms (FAQs) Evidence hooks Mapped H2 Outdoor HR chaos BLE → missing data ECG clip / flatline Temp drift after charge Security minimum Saturation + DC drift LED marker • valid ratio TX marker + minima overrun • stall • continuity Lead-off + clip recovery time Charge marker + ΔT tau • soak Boot + keys + lock rollback • audit events H2-3 / H2-11 H2-7/8/12 H2-5 / H2-11 H2-6 / H2-11 H2-9 Typical IC blocks (examples) PPG AFE: ADPD4100 / AFE4405 / MAX86141 • ECG AFE: MAX30003 / ADS1292R • PMIC/charger: BQ25120A • BLE SoC: nRF52840 • FRAM: FM24CL64B • Secure: ATECC608B
Figure H2-13 (F8): Each FAQ is designed as a diagnosable path: symptom → evidence hooks → mapped chapter(s), plus typical IC blocks that implement the hooks.