Introduction & Scope — Why Post-Reg for PLL/VCO/RF/Audio
Ultra-low-noise LDOs act as post-regulators after a noisy pre-reg (buck/PMIC/general LDO) to suppress residual ripple and broadband noise on PLL/VCO, RF LNA/LO, ADC/DAC references, and audio preamps. This guide focuses on µV-level integrated noise, wideband/high-frequency PSRR, and NR/Bypass pins, plus stability, layout, and validation rules for small-batch builds.
- Two-stage cascade: pre-reg delivers efficiency; low-noise LDO cleans the last tens of µV and raises spur/SNR margins.
- Headroom rule: VIN − VOUT ≥ VDO@IOUT + 0.3–0.5 V to keep high-freq PSRR effective; avoid operating in dropout for sensitive rails.
- NR/Bypass helps low-frequency noise and soft-start; discharge/sequence it properly to avoid audio “pop”.
Noise Fundamentals — nV/√Hz & Integrated Noise
Convert noise density (nV/√Hz) to integrated noise (µVrms) over the bandwidth of interest. Use two standard windows for comparability: 20 Hz–20 kHz (audio) and 10 Hz–100 kHz (instrumentation/reference). If A-weighting is used, label it explicitly—A-weighted values are not directly comparable with flat bandwidth results.
- Flat-band estimate: Vrms ≈ en,flat × √B; add 1/f contribution via low-frequency segment then RSS with the flat region.
- Report consistently: en@1 kHz / 10 kHz (nV/√Hz); Vrms@20 Hz–20 kHz and @10 Hz–100 kHz (µVrms); 1/f corner fc.
- Typical targets: audio rails ≤5–10 µVrms (20 Hz–20 kHz); PLL/Ref ≤5–15 µVrms (10 Hz–100 kHz) + strong high-freq PSRR.
Wideband / High-Freq PSRR (100 Hz–10 MHz)
For PLL/VCO, RF, ADC/DAC refs, and audio rails, high-frequency PSRR determines how much switching residue leaks through. Keep headroom (VIN − VOUT) above dropout so the LDO remains in its linear region where PSRR is meaningful. In cascades (pre-reg → LDO → load), treat attenuation in dB as approximately additive at the same conditions.
- Bands matter: 100 Hz–10 kHz (loop-dominant), 10 kHz–1 MHz (loop + device limits), >1 MHz (parasitics/layout).
- Targets (typical): @100 kHz ≥ 40–60 dB; @1 MHz ≥ 20–40 dB (verify datasheet test conditions).
- Headroom rule: VIN − VOUT ≥ VDO@IOUT + 0.3–0.5 V to keep HF-PSRR from collapsing.
NR/Bypass Pin & Soft-Start Pop
The NR/Bypass pin filters the internal reference and shapes soft-start. Use a small ceramic capacitor to reduce low-frequency noise and to control the ramp. Provide a discharge path so NR returns to ground at power-down; sequence NR to avoid audio “pop/thump”.
- Starting point: CNR = 10–47 nF (C0G/NP0); up to 100 nF when pop sensitivity is high.
- Discharge: if no internal bleed, add 100–330 kΩ to GND to guarantee reset between cycles.
- Timing: EN ↑ → NR ramp → VOUT settles → connect downstream audio/input. Reverse for power-down.
Stability & Output Impedance
View LDO stability through output impedance Zout(f). The loop’s poles/zeros interact with Cout, ESR, ESL and the load. Bigger, lower-ESR capacitors often reduce integrated noise but may raise a resonance peak unless properly damped.
- Choose within the datasheet window: Cout and ESR ranges guarantee stability across PVT.
- Damping strategy: a small RC snubber can tame Zout peaks (value must be verified on bench).
- Light-load modes: ensure minimum load for loop health when PLL/Audio enter low-power states.
Dropout & Headroom Rules
High-frequency PSRR collapses first as headroom shrinks. Do not regulate at the edge—budget VIN − VOUT with margin above VDO@load so the LDO stays in the linear region during VIN swings and load steps.
- Rule of thumb: VIN − VOUT ≥ VDO@IOUT + 0.3–0.5 V for RF/PLL/Audio rails.
- Cascade budgeting: set the buck slightly higher, use LC/SSFM to pre-trim ripple, let the low-noise LDO finish the last 40–60 dB.
- Validate worst case: check PSRR at 100 kHz & 1 MHz at the minimum headroom corner (temp, load, battery sag).
Layout & Grounding
Board-level practice decides if a low-noise LDO stays low-noise. Split AGND/PGND with a single star point, use Kelvin sense to the load, guard sensitive nodes, and keep clock nets away from audio/refs.
- AGND/PGND: one star tie near the LDO reference or “quiet ground”.
- Kelvin: VOUT_S/GND_S thin, short, and independent; terminate at the load return pin.
- Guard/Shield: ring sensitive nodes and stitch to quiet ground; avoid large ground slits.
- Clock vs Audio: keep distance, cross orthogonally, add a ground fence if needed.
Application Recipes
Quick, field-tested pairings for sensitive rails. Each recipe states targets, connection & layout tips, selection factors, and validation.
PLL/VCO — Spur Suppression & Reference Coupling
- Targets: 10 Hz–100 kHz ≤ 5–15 µVrms; PSRR @100 kHz ≥ 50 dB; @1 MHz ≥ 25–35 dB.
- Connect: buck → LC → low-noise LDO → AVDD/REF; Kelvin to PLL ground.
- Select: HF-PSRR curve, NR availability, min-load spec, headroom margin.
- Validate: spur at ±fsw/2fsw, phase noise offsets 10 kHz–1 MHz.
RF LNA/LO — Cross-Band Sensitivity
- Targets: 1 MHz band PSRR ≥ 25–40 dB; supply-noise-induced NF rise < 0.2 dB (goal).
- Connect: per-domain LC + low-noise LDO; avoid LNA domains modulating each other.
- Select: HF-PSRR, light-load stability, min-load, density at MHz range.
- Validate: sensitivity A/B with injected supply noise; blocker tests.
ADC/DAC/Ref — SNR/ENOB & Reference Polishing
- Targets: 10 Hz–100 kHz ≤ 5–10 µVrms; PSRR @100 kHz ≥ 50 dB.
- Connect: post-reg before ref buffer; Kelvin return to the reference ground; split analog/digital returns.
- Select: 1/f corner, NR efficacy, Cout/ESR window, transient behavior.
- Validate: SNR/THD/SINAD vs injected supply noise; static/dynamic ENOB.
Audio Pre / Headphone — 20 Hz–20 kHz & Pop/Thump
- Targets: 20 Hz–20 kHz ≤ 5–10 µVrms (flat/A-weighted labeled); pop peak & duration specified.
- Connect: NR-shaped soft-start; sequence connection of the audio path to avoid thumps.
- Select: NR condition in datasheet, light-load stability, noise density curve; discharge behavior.
- Validate: flat & A-weighted noise, pop waveform (peak/duration), listening blind test.
Validation Playbook
Turn “spec-sheet low noise” into repeatable, bench-verified results. Define bandwidths, measure with the same apertures, and record at fixed headroom.
Bench Checklist (copy-paste)
- Report bandwidth & weighting: 20 Hz–20 kHz (flat/A-w), 10 Hz–100 kHz (flat).
- Record headroom for each test point: VIN − VOUT = VDO + margin.
- Noise: log density, 1/f corner, integrated µVrms.
- PSRR: sweep 100 Hz→1 MHz; capture @100 kHz & @1 MHz values.
- Startup: EN→NR→VOUT timing; pop peak/duration.
- Thermal: −40→+85 °C (or automotive); re-check dropout boundary.
- A/B: Cout type, C_NR, headroom, layout distance, Kelvin.
IC Selection Guide
Pick by scenario targets, then confirm PSRR/Noise under the same headroom you will use in product. Prefer parts with NR/Bypass and stable Cout/ESR windows.
Parameters (normalized fields)
Noise: report both 20 Hz–20 kHz and 10 Hz–100 kHz; label flat vs A-weighted. PSRR: state @100 Hz/1 kHz/100 kHz/1 MHz under headroom ≥ VDO+0.3–0.5 V.
| Brand | Series | PN | VOUT / IOUT | Noise (µVrms) | PSRR key points (dB) | Dropout | VIN | IQ | NR/Bypass | Cout / ESR window | Min load | AEC-Q | Pkg | Rec. headroom | Notes |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| TI | TPS7A47 | TPS7A4700RGW | Adj / 1 A | 5–10 (20–20k) ~10–20 (10–100k) |
100 kHz ≥ 50; 1 MHz ≥ 25–35 | ~200–300 mV | 3–36 V | ~4 mA | Yes (10–47 nF) | 4.7–22 µF / low-ESR | ~1–5 mA | — | RGW | VDO+0.4–0.5 V | PLL/Audio classic; good HF-PSRR. |
| TI | TPS7A33 | TPS7A3301RGW | Adj / 1 A (−V) | — | Good @100 kHz | ~300 mV | −36 to −3 V | ~3 mA | — | 4.7–22 µF / low-ESR | ~1–5 mA | — | RGW | VDO+0.4 V | Pair with 7A47 for ± rails. |
| TI | TPS7A83A | TPS7A8300 | Adj / 2 A | low | HF-PSRR strong | ~200 mV | 1.5–6.5 V | ~1 mA | — | 10–47 µF / low-ESR | ≥0 mA | — | VQFN | VDO+0.3–0.4 V | Higher current rails. |
| ST | LDLN | LDLN050 | Fixed / 50 mA | very low | 100 kHz ≥ 50 | ~100 mV | 1.5–5.5 V | ~25 µA | — | 1–4.7 µF / low-ESR | ≥0 mA | — | DFN | VDO+0.3 V | RF/audio small loads. |
| ST | LD390xx | LD39050 | Fixed / 500 mA | low | good @100 kHz | ~200 mV | 1.5–5.5 V | ~1 mA | — | 2.2–10 µF | ≥0 mA | — | DFN | VDO+0.3–0.4 V | Mid-current analog rails. |
| Renesas | ISL9001A | ISL9001A | Fixed / 150 mA | very low | 100 kHz ≥ 45–50 | ~100–150 mV | 2.3–6.5 V | ~35 µA | — | 1–4.7 µF | ≥0 mA | — | DFN | VDO+0.3 V | Portable audio/PLL. |
| Renesas | ISL9021A | ISL9021A | Fixed / 300 mA | low | good HF-PSRR | ~150 mV | 2.3–6.5 V | ~55 µA | — | 1–10 µF | ≥0 mA | — | DFN | VDO+0.3–0.4 V | ADC/Ref medium loads. |
| onsemi | NCP167 | NCP167 | Fixed/Adj / 1 A | low | 100 kHz strong | ~200 mV | 2.2–16 V | ~300 µA | — | 10–47 µF | >=0 mA | — | DFN/QFN | VDO+0.3–0.4 V | RF front-end rails. |
| onsemi | NCP171 | NCP171 | Fixed / 150 mA | low (check) | moderate HF-PSRR | ~120 mV | 1.7–5.5 V | < 50 nA (Iq) | — | 1–4.7 µF | ≥0 mA | — | WLCSP | VDO+0.3 V | Ultra-low Iq; verify noise. |
| Microchip | MIC5219 | MIC5219-xx | Fixed/Adj / 500 mA | low | 100 kHz ~ good | ~260 mV | 2.5–12 V | ~80 µA | — | 2.2–10 µF | ≥0 mA | — | MSOP/SOIC | VDO+0.3–0.4 V | Audio/ADC utility LDO. |
| Microchip | MIC5317 | MIC5317-xx | Fixed/Adj / 500 mA | very low | HF-PSRR good | ~100–150 mV | 2.5–6 V | ~38 µA | — | 2.2–10 µF | ≥0 mA | — | MLF | VDO+0.3 V | Compact low-noise choice. |
| NXP | PCA9420 PMIC | PCA9420 | Multi-rail / LDOs | (rail-dep.) | integrated PSRR | — | 2.5–5 V | — | — | per rail | — | — | QFN | set headroom on rail | Use PMIC LDO rail + post-reg if needed. |
| Melexis | Sensor + LDO | MLX90393 + low-noise LDO | System | — | — | — | — | — | — | per LDO | — | — | — | per LDO | Pair Melexis sensor with TI/ST/Renesas low-noise post-reg. |
Values above are typical orientation points; verify with your target headroom and bandwidths on bench.
Mini Shortlists by Scenario
- PLL/VCO: TI TPS7A4700, ST LDLN050, Renesas ISL9001A, Microchip MIC5317; ± rails add TI TPS7A3301.
- RF LNA/LO: ST LDLN050 / Renesas ISL9001A (small), TI TPS7A20/TPS7A83A / Microchip MIC5317 / onsemi NCP167 (mid).
- ADC/Ref: TI TPS7A47, Renesas ISL9001A, Microchip MIC5219; put LDO before ref buffer.
- Audio Pre/HP: TI TPS7A47 / TPS7A20, ST LDLN050, Microchip MIC5317; tune NR for pop control.
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Frequently Asked Questions
Engineer-tone answers built for search intent and social discussion. Always state bandwidth (20 Hz–20 kHz or 10 Hz–100 kHz) and weighting (flat/A-weighted), and record PSRR at explicit headroom (VIN−VOUT = VDO + margin).
Why do integrated noise numbers differ for the same LDO?
Integration bandwidth and weighting drive the result. A 20 Hz–20 kHz A-weighted value can be far lower than a 10 Hz–100 kHz flat number because it de-emphasizes low and high frequencies. Always label bandwidth + weighting, log the 1/f corner, and publish both windows when decisions hinge on audio vs. RF/PLL priorities.
When should I integrate 20 Hz–20 kHz vs 10 Hz–100 kHz?
Use 20 Hz–20 kHz for audio perception and preamps; optionally report A-weighted. Use 10 Hz–100 kHz for analog references, PLL/VCOs, and mixed-signal rails where wideband noise matters. Publish both if the rail fans out to audio and RF blocks. Keep test fixtures identical and state the input filter chain explicitly.
How do I sweep PSRR to 1 MHz without over-reporting?
Inject a small ripple at the source using a summing network or transformer, measure at the load with Kelvin sense, and maintain constant headroom. Repeat at VIN−VOUT = VDO + {0.0, 0.2, 0.5} V. Quote @100 kHz and @1 MHz points. Avoid ground loops, LISN resonances, and spectrum-analyzer preamp clipping.
Does a cascaded buck→LDO always clean high-frequency ripple?
No. LDO PSRR typically falls at hundreds of kilohertz to MHz; cleaning depends on headroom, output capacitor impedance, and layout. Add an LC pole between buck and LDO, keep the LDO’s ground quiet, and verify at the buck’s fsw and 2fsw. If residuals persist, increase headroom or move the LC corner lower.
What headroom margin avoids PSRR collapse near dropout?
As VIN−VOUT approaches VDO, loop gain shrinks and PSRR degrades quickly. Keep VIN−VOUT ≥ VDO + 0.3–0.5 V for RF/PLL/audio rails unless the datasheet proves otherwise. Validate at your cold-corner dropout, as VDO rises with temperature and current. When space allows, design for the worst-case VDO plus extra margin.
How do NR cap value and discharge path reduce startup “pop”?
Use the datasheet’s NR range (e.g., 10–47 nF) to create a gentle reference ramp. Sequence EN → NR ramp → connect audio path. Provide an NR discharge path so shutdown does not excite the reference buffer. Log pop peak and duration; increase CNR or delay signal-path connection until the reference fully settles.
How to power-down and avoid headphone “thump” or reverse discharge?
Disconnect the audio path first, then pull EN low, and finally release NR with a defined bleed. Provide output discharge or a small load to drain coupling capacitors. Avoid back-feeding the rail through ESD paths or op-amp inputs. Confirm on bench with a slow scope timebase and replicate worst-case loads.
Which Cout/ESR windows maintain stability and low noise at light load?
Follow the part’s stability chart; most low-noise LDOs prefer low-ESR MLCC within a µF window (e.g., 4.7–22 µF). Verify with your exact layout parasitics and check light-load stability, where control changes mode. Polymer caps can lower noise at mid-band but may shift zeros; sweep output impedance to confirm.
Do I need a minimum load to avoid burst ringing or oscillation?
Some LDOs specify a minimum load for stable operation and good PSRR. If your rail idles too light, add a small bleed (e.g., 1–5 mA) or ensure downstream circuits present enough quiescent current. Validate with long timebases and fast steps; watch for relaxation oscillations and elevated noise density at low frequencies.
How should I route Kelvin sense vs the power path?
Run thin, short, independent VOUT_S and GND_S lines directly to the load pins. Keep them at least a few line-widths away from the high-current path and avoid long parallel runs. Limit to one via each if possible. This preserves measurement accuracy and prevents current-induced error showing up as “mystery” noise.
When do I add a ground fence between CLK/LO and audio/reference?
If clock nets must pass near high-impedance audio or reference nodes, insert a ground fence and keep distance. Cross orthogonally when changing layers. Add a guard ring around sensitive nodes tied to quiet ground. Verify with a conducted-noise injection on CLK and check for spur/leakage at the victim output.
Quick test for PLL/VCO rails to notch spurs around fsw?
Build a two-stage path: buck → LC → low-noise LDO. Sweep injected ripple around ±fsw and 2fsw while keeping headroom fixed. Check phase-noise offsets at 10 kHz–1 MHz. If residuals persist, increase LC attenuation, add headroom, or move the LC pole below fsw/10 to intercept switching energy.
RF LNA/LO: how do I confirm sensitivity isn’t supply-noise limited?
Inject a controlled ripple on AVDD and re-measure sensitivity and blocker performance across bands. Aim for PSRR ≥ 25–40 dB in the 1–10 MHz region and limit NF degradation to <0.2 dB. Separate LNA domains, use Kelvin returns, and maintain headroom; document frequency-dependent results for each bandplan.
ADC/DAC/Ref: turning SNR/THD logs into a pass/fail rule?
Test with and without injected supply noise while holding stimulus and load constant. Define a pass if SNR loss ≤0.3 dB and THD rise ≤1 dB at target headroom. Correlate with integrated noise over 10 Hz–100 kHz. If margins fail, add headroom, adjust Cout type/value, or move the LDO physically closer.
Audio rails: report flat vs A-weighted noise and run a quick blind test?
Publish both flat and A-weighted 20 Hz–20 kHz numbers and attach pop peak/duration for startup. For listening, match levels within 0.1 dB, randomize order, and record preference with comments. If results correlate with measured noise/PSRR differences, lock the BOM; otherwise, increase CNR or headroom and repeat.
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