What this page solves

This page explains when it is worth replacing a simple diode bridge with an active bridge or bridgeless rectifier, and how dedicated controllers improve loss, thermal headroom and monitoring in modern power supplies and adapters.

Pain points with traditional diode bridges

A classic diode bridge is simple and robust, but its fixed forward drop turns into a significant loss block once input power rises. At hundreds of watts, the bridge can burn several watts on its own, often becoming one of the hottest components on the board.

• Forward drop drives conduction loss and pushes case temperature toward user or safety limits.
• Bridge heating consumes thermal budget that could otherwise be used by MOSFETs, magnetics or output stages.
• Current waveforms contribute to distortion and make it harder for the PFC stage to meet PF and THD targets.
• At light load, a largely constant VF still penalizes efficiency and idle power.

Once power density, efficiency certification or elevated ambient temperature become design constraints, the diode bridge quickly moves from a “good enough” element to a primary target for optimization.

Where active bridge and bridgeless rectifiers shine

Active bridge and bridgeless rectifier controllers replace fixed diodes with MOSFETs that conduct with much lower effective drop. The benefit is most visible in demanding applications such as:

• High-power adapters and external charger bricks in the 65 W to a few hundred watt range, where small enclosures and user touch temperature limits amplify every watt of bridge loss.
• Server, CRPS and telecom rectifiers chasing 80 PLUS Gold, Platinum or Titanium efficiency levels, where bridge loss directly erodes the overall budget.
• High-density communication and base-station PSUs that operate in constrained airflow or high altitude conditions and must limit internal heat sources.
• Industrial and fanless supplies exposed to 50–60 °C ambient, where bridge temperature rise can push devices beyond safe junction limits without aggressive derating.

Whenever a design already needs special thermal treatment for the input bridge, or has to use more expensive low-VF diodes to manage loss, moving to an active bridge or bridgeless front-end becomes a serious option.

Scope of this page in the PSU architecture

The focus here is the active rectifier controller block: the IC that senses AC line conditions, coordinates MOSFET conduction and exposes protection and efficiency-related telemetry.

• PFC current-loop design and PF / THD optimization are covered in the PFC (CCM/CRM/Totem-Pole) page.
• LLC resonant design and downstream conversion are handled by the LLC Resonant Half-Bridge and Primary-Side Flyback pages.
• Secondary-side synchronous rectification for low-voltage, high-current DC rails is developed in the Synchronous Rectification Controller page.
• EMI filter design and surge handling belong to the AC Input & EMI Front-End topic.

This page treats the active bridge or bridgeless rectifier as a distinct controllable and observable block, and explains how its controller IC reduces bridge loss while feeding useful status and efficiency information into the rest of the power-supply control system.

System context: where active bridges live in the PSU stack

Active bridges and bridgeless rectifiers are not stand-alone building blocks. They sit between the AC input and the PFC or DC-DC stages, shaping how line current enters the power train and how heat and efficiency are distributed across the supply.

Position in the AC → DC conversion chain

A typical offline PSU or adapter can be viewed as a sequence of functional blocks:

AC input → EMI filter → (optional) diode bridge / active bridge / bridgeless front-end → PFC stage → bulk capacitor → LLC or flyback converter → secondary rectification and point-of-load rails.

The active bridge or bridgeless stage replaces or extends the rectifier “slot” in this chain. It cooperates with the EMI filter in front of it and the PFC controller behind it, and it influences the shape and ripple of the high-voltage DC bus that feeds downstream conversion.

Typical placements of active and bridgeless rectifiers

Single-phase active bridge in front of the PFC stage

In many single-phase offline supplies, the active bridge sits directly after the EMI filter and before a boost PFC stage. The bridge controller senses line voltage and current, drives the MOSFET network so that it emulates an idealized rectifier, and hands a lower-loss DC waveform to the PFC controller.

Depending on the implementation, phase and zero-crossing information may be detected locally by the active bridge IC, or shared between the PFC controller and the rectifier so that both stages use a consistent view of the AC line.

Three-phase and Vienna-type active rectifiers

In higher-power telecom, server or industrial rectifiers, three-phase AC often feeds an active rectifier front-end such as a Vienna or related topology. Here the controller must track three phase voltages, coordinate multiple switches per phase and maintain a controlled DC link for the downstream DC-DC stage.

Detailed modulation strategies and current-loop design for these topologies belong in the PFC domain; from the active-bridge perspective, the key is support for multi-channel sensing, high-integrity gate drives and fault reporting that can be consumed by a supervisory MCU or digital PSU controller.

Secondary-side active rectifiers on high-current DC rails

A second category of active rectification appears on the secondary side of LLC or phase-shifted bridges, where MOSFET matrices replace discrete Schottky diodes on low-voltage, high-current outputs. These stages share similar concerns around conduction windows, current direction detection and cross-conduction prevention, but they live electrically far from the AC input.

Secondary synchronous rectifier gate-drive algorithms, timing and interaction with the main PWM controller are developed in the Synchronous Rectification Controller topic. In this page, these stages are referenced only to show that active rectification can appear both at the AC front-end and near the load.

Interfaces around the active-bridge controller IC

The active-bridge controller IC does not operate in isolation. Its effectiveness depends on clean interfaces to the rest of the power stage:

• PFC controller: shares line-phase information in some designs and accepts fault and status signals when the bridge detects abnormal current, voltage or thermal conditions.
• Gate drivers: use logic-level or medium-power outputs from the rectifier controller to drive high-side and low-side MOSFETs, often through isolated gate driver ICs with high CMTI and robust UVLO.
• Current and voltage sensing: provide shunt, current-transformer, Hall or sigma-delta feedback that the controller uses to determine conduction windows, enforce protection and estimate bridge loss or efficiency.

These interfaces create the link between the local rectifier controller and higher-level digital control, allowing the active bridge to behave like a well-bounded, observable block inside the larger PSU architecture.

Loss & efficiency map vs diode bridges

Active bridges and bridgeless rectifiers change how rectifier loss scales with load current. Instead of a nearly fixed forward drop multiplied by line current, the bridge behaves more like a low-resistance switch network whose I²R loss can be tailored by MOSFET selection and layout.

Conduction loss: I×VF vs I²×R_DS(on)

A diode bridge presents two forward drops in the current path during each conduction interval, so loss increases almost linearly with current. In contrast, an active bridge built from MOSFETs behaves like a selectable resistance: loss scales roughly with I² times the effective R_DS(on), which can be reduced by device choice, paralleling and better thermal spreading.

At low to moderate power, the absolute loss in the bridge may still be only one contributor among many. As power rises, however, the combination of higher current and limited cooling area causes diode bridge loss to grow into a dominant hotspot, while a well-chosen MOSFET bridge can keep its share of the total loss budget under control.

Loss contribution at 65 W, 150 W and 500 W levels

Around 65 W: efficiency gains vs cost and complexity

In a 65 W class adapter targeting roughly 90 % efficiency, bridge loss is visible but not yet dominant. Primary-switch loss, transformer loss and secondary rectification still consume a large share of the budget. An active bridge can reduce bridge heating and improve thermal margin, but the decision often hinges on enclosure size, ambient temperature and cost rather than on efficiency alone.

Around 150 W: bridge loss becomes a primary optimization target

In the 120–200 W range, many supplies pursue 93 % or higher efficiency. A diode bridge can burn several watts by itself, often occupying a large fraction of the allowed loss budget and emerging as one of the hottest components on the board. Thermal limits on the case or the connector shell may start to be dictated by bridge heating alone, making active rectification a strong candidate.

500 W and above: efficiency standards and thermal density

At 500 W and higher, especially in server, CRPS or telecom PSUs with 80 PLUS Gold, Platinum or Titanium requirements, the bridge can easily become one of the single largest loss contributors if implemented with diodes. In these designs, the rectifier stage is almost always revisited with active or integrated PFC-centric topologies so that its loss contribution remains compatible with tight overall efficiency and cooling budgets.

High-temperature behavior and thermal headroom

Diode bridges concentrate loss into a compact package with relatively high thermal resistance. As ambient temperature climbs from room temperature to 50–60 °C, the same wattage of loss drives the junction closer to its limit, often forcing derating or larger heatsinks. Active bridges distribute conduction across multiple MOSFETs that can be spread over a wider copper area, enabling better heat sharing and giving more freedom to the mechanical and thermal design.

Light-load efficiency and controller operating modes

Active rectification does not automatically win at every operating point. Under light or ultra-light load, diode bridge loss is small in absolute terms because current is low, while the control circuitry and gate-driving of an active bridge can represent a larger fraction of total loss. For adapters that spend most of their life in standby, this trade-off needs to be weighed carefully.

Modern controllers address this by entering burst, skip or diode-emulation modes at low load. In these modes, the bridge behaves more like an intelligent diode: switching and sensing activity are reduced, or conduction criteria are relaxed so that control overhead is minimized while still preventing reverse conduction and unsafe operating points.

Design takeaways for adopting an active bridge

An active bridge becomes particularly attractive when any of the following conditions apply:

• Efficiency targets at or above the low- to mid-90 % range for offline conversion.
• Power levels from roughly 150 W upwards, or tight power-density and enclosure constraints.
• Elevated ambient temperatures or fanless operation that leave little thermal margin for a hot bridge block.
• Compliance with strict energy or efficiency standards that penalize unnecessary rectifier loss.

For low-power designs that operate mostly at light load, the bridge choice should be evaluated together with controller low-power modes and system-level standby consumption, rather than on peak efficiency alone.

Topology variants: active bridge and bridgeless options

Active rectification can appear in several topological forms. Some architectures simply replace a diode bridge with four MOSFETs, while others combine rectification more tightly with the PFC function. The controller IC must fit into these structures without duplicating the role of the main PFC controller.

Full-bridge active rectifier: four MOSFETs in place of diodes

The most direct form of active rectification replaces the diode bridge with a full MOSFET bridge. Four switches form the familiar full-bridge arrangement, but each leg is driven in a phase-aware manner so that only the devices that support the instantaneous current direction are turned on.

The active-bridge controller senses the AC line voltage and current, computes conduction windows and generates high-side and low-side gate signals. High-side outputs often feed isolated gate drivers, while low-side outputs may drive directly or through non-isolated drivers. The PFC controller downstream still manages current shaping and bus regulation.

Semi-bridgeless and half-bridge rectification structures

Semi-bridgeless or half-bridge rectifiers combine diodes and MOSFETs to reduce the number of devices in the conduction path. One or more legs of the classical bridge are replaced by controlled MOSFETs, while other legs retain diodes for simplicity or cost reasons.

From the controller IC perspective, these topologies still require accurate knowledge of line polarity and conduction direction so that the MOSFET legs switch at the correct time and avoid reverse conduction. The controller works alongside the PFC stage rather than absorbing the PFC function itself, leaving current-loop design to the dedicated PFC controller.

Relation to totem-pole PFC and integrated PFC front-ends

Totem-pole PFC and related integrated front-ends blur the line between rectifier and PFC stages. In these architectures, a set of MOSFET legs simultaneously performs rectification and controlled current shaping, often under the direction of a single PFC-centric controller or digital PSU control IC.

When the same controller is responsible for gate timing, current-loop regulation and PF / THD performance, the topology is best treated as a PFC subject. The active-bridge topic focuses instead on cases where the rectifier slot can be viewed as a distinct block: a MOSFET bridge or leg network with its own controller that hands a pre-rectified waveform to a separate PFC or DC-DC stage.

Signal view: what the active-bridge controller senses and drives

Across these topologies, the active-rectifier controller IC sees a consistent set of signals and outputs:

• Reference inputs: AC line voltage for polarity and phase tracking, and line or leg current for conduction window control and protection.
• Gate-drive outputs: high-side and low-side drive signals for the MOSFET network, usually routed through isolated gate drivers on high-side positions.
• Sync and coordination: optional synchronization with the PFC controller or PWM timing, or an internal PLL and zero-crossing detector that supply status signals back to the system controller.

Later sections build on this signal view to derive control, sensing and protection requirements for the active bridge and bridgeless rectifier controller IC family.

Control & sensing essentials for active-rectifier controllers

An active-rectifier controller must align MOSFET conduction with the AC line, enforce correct current direction and coordinate its timing with the PFC and downstream stages. Control and sensing quality directly affect both efficiency and robustness of the rectifier block.

Phase synchronisation and conduction window control

Correct conduction starts with an accurate view of the AC waveform. The controller uses zero-crossing detection or a phase-locked loop to track line polarity and frequency, then opens conduction windows only in the quadrants where a given MOSFET pair should carry current.

In simple single-phase bridges, clean zero-crossing detection may be sufficient. For three-phase or distorted mains, a PLL-based approach gives a more stable phase reference, preventing conduction windows from drifting or becoming noisy when harmonics or frequency offsets are present.

The conduction window must also coexist with PFC switching action. If the active bridge turns devices on while a boost switch is commutating, unnecessary switching loss or stress can result. Some controllers therefore accept synchronisation inputs from the PFC stage or compress conduction windows to avoid overlap with the most critical PFC transitions.

Current-direction and body-diode based conduction criteria

Conduction decisions are not based on phase information alone. The controller needs a clear view of current direction so that MOSFETs assist the natural current flow instead of inadvertently supporting reverse conduction. Typical sensing options include current transformers for fast line current sensing, shunt-based amplifiers for accurate low-frequency measurements and sigma-delta modulators for isolated, high-resolution current feedback.

Many controllers also observe MOSFET body-diode conduction. A short interval of body-diode conduction confirms both current direction and path integrity before the channel is driven fully on. Once conduction is established, the controller reduces body-diode time to cut loss, while still reacting quickly if current reverses or the sensed waveform no longer matches the expected direction.

Conduction control, dead-time and DCM/CCM behaviour

Safe conduction requires a carefully controlled dead-time between high-side and low-side devices in each leg. Excess dead-time increases body-diode conduction and rectifier loss, while insufficient dead-time risks shoot-through. Active-rectifier controllers therefore implement programmable dead-time combined with adaptive timing that reacts to sensed voltage and current transitions.

Behaviour also changes between discontinuous and continuous conduction modes. In DCM, current naturally returns toward zero in each cycle and the controller can use near-zero current as a cue for turning devices off. In CCM, current remains non-zero over the half-cycle, so the controller must rely more heavily on phase and current thresholds to define turn-off points without cutting conduction prematurely.

System controllers sometimes share loading information or operating mode hints with the active-rectifier IC, so that timing profiles can be tuned for heavy-load CCM or light-load DCM, improving efficiency while maintaining safe margins.

Boundary with secondary-side synchronous rectification

Active-bridge controllers synchronise to the AC line and work near the input of the supply. Their job is to steer AC current into the high-voltage DC bus in the correct quadrants. Secondary-side synchronous rectifier controllers instead reference the transformer secondary waveform and PWM timing and operate on low-voltage DC rails. The Synchronous Rectification Controller page covers those secondary-stage controllers, while this page is dedicated to AC-side bridge topologies and line synchronisation.

Protection & efficiency monitoring features

Beyond basic conduction control, an active-rectifier controller needs strong protection and observability. Local safeguards keep the bridge within safe limits, while monitoring features expose how much loss and thermal margin the rectifier consumes inside the power train.

Protection functions: overcurrent, gate faults and sense integrity

Overcurrent and short-circuit conditions are the most obvious threats. A faulted leg can route large line current directly into the DC bus. The controller therefore implements fast overcurrent and short detection, with response paths that immediately turn off the affected MOSFETs and assert a fault signal to the PFC or digital controller. Different time scales need to be covered, from sub-microsecond shoot-through events up to sustained overloads.

Gate-drive faults form a second category. A missing gate-drive supply, a stuck-high driver or a short between gate and source can leave a device uncontrolled. Robust controllers monitor driver supply levels and gate status, preventing normal conduction logic from running when gate-drive circuits are not in a known-good state and flagging “gate fault” conditions separately from generic overcurrent events.

A third group of protections targets sensing integrity. Open or shorted current-sense paths, broken voltage dividers or out-of-range measurements suggest that the controller no longer has a reliable view of the bridge. In these cases, many designs move into a safe degraded mode, such as disabling active drive and falling back to diode-like behaviour while reporting a diagnostic condition to the system controller.

Efficiency and thermal margin monitoring

Modern bridge controllers increasingly act as small telemetry hubs. By tracking conduction time and duty for each MOSFET leg, the controller can provide insight into how current is shared across devices and how heavily the bridge is utilised. Persistent asymmetry or unusually high conduction duty on a particular leg can highlight layout or magnetic imbalances early.

Temperature and current data help estimate rectifier loss and thermal headroom. When combined with internal or external temperature sensors, the controller can report whether the bridge is operating far below its limits, close to its safe boundary or intermittently exceeding desired thresholds. This information can feed fan-speed control, derating logic or predictive maintenance strategies at the system level.

Digital PSU controllers with PMBus or similar interfaces can aggregate these metrics as software-readable telemetries, such as rectifier loss estimates, hotspot warnings and fault counters. These data points support field diagnostics and allow firmware updates to refine operating limits over time without revising hardware.

Coordination with PFC control and rail-level protection

Fault signalling from the active bridge must integrate cleanly with PFC and digital control. A clear, debounced fault output allows the PFC to halt switching, ramp down current or initiate a controlled restart sequence. Some systems also use enable and mode inputs from the PFC controller to sequence the bridge, ensuring that active rectification only begins after bias rails and gate drivers are stable.

It is also important to distinguish bridge-level protection from rail-level protection. The active-rectifier controller concentrates on the safety of the rectifier stage itself: MOSFET stress, leg current and sensing validity. eFuse and hot-swap controllers, covered in the eFuse & Hot-Swap topic, are responsible for protecting entire DC rails and hot-plug events downstream. Together, they form a layered protection scheme from the AC source through to the load.

IC role mapping for active-bridge control

An active-bridge stage typically combines a controller, gate drivers, sensing front-ends and optional digital monitoring. Mapping these roles clearly in the BOM helps ensure that every function required for safe and efficient rectification is covered without duplication.

Functional IC families in an active-bridge front-end

The device set around an active bridge can be grouped into a few recurring functional families:

• Active-bridge controller: implements AC phase tracking, zero-cross and conduction-window logic, monitors current direction and body-diode conduction, manages dead-time and provides local protection and status flags. Some devices include integrated high-side and low-side gate drivers.
• High-side / low-side gate drivers: used when the controller outputs only logic-level signals. These drivers generate the required gate voltage swing and current for MOSFETs, with high CMTI ratings, UVLO, Miller clamp and fault-handling features.
• Current and voltage sensing front-ends: shunt amplifiers, isolated amplifiers or sigma-delta modulators that feed accurate line-current and line-voltage information into the controller and PFC. They provide the basis for conduction-direction decisions and protection thresholds.
• Digital monitoring and PMBus interface ICs: supervisory devices or power-management MCUs that aggregate telemetry such as rectifier loss estimates, temperature and fault counters and expose them over PMBus, SMBus or other system interfaces.
• Bias and temperature-sensing helpers: LDOs or bias regulators that supply the controller and drivers, and temperature sensors or NTC interfaces for bridge hotspot monitoring.

Example BOM roles: 300 W single-phase adapter with active bridge + PFC

A 300 W offline adapter with a single-phase active bridge followed by a CCM PFC stage typically includes the following IC roles around the rectifier:

• U1 · Active-bridge controller: single-phase active rectifier controller with integrated zero-cross detection, conduction-window logic and local protection. Accepts line-voltage and line-current sense signals and provides four gate outputs for the MOSFET bridge or external drivers.
• U2 · High-/low-side gate driver (optional): if U1 outputs only logic signals, U2 supplies high-side and low-side gate-drive capability for the bridge MOSFETs. Typical features include 600 V class high-side support, CMTI in the tens of kV/µs, 1–4 A peak drive and UVLO/Miller clamp.
• U3 · PFC controller: manages the boost PFC current and voltage loops and coordinates with the active bridge via sync and fault pins. U3 uses line-current sensing primarily for shaping and regulation, while U1 uses the same information for conduction-direction decisions and protection.
• U4 · Line-current sense amplifier: shunt-based or isolated current-sense front-end placed between the active bridge and PFC input. Its output fans out to both U1 and U3, tying rectifier control and PFC control to a common, accurate current reference.
• U5 · Temperature monitor: a simple temperature-sensing IC or NTC interface connected to the controller or system MCU, positioned near the bridge MOSFETs or heatsink to support thermal margin monitoring.
• U6 · Digital monitor / PMBus manager (optional): a supervisory IC or system MCU that collects status from U1–U5, counts protection events and exposes rectifier-related telemetry to the system. In simpler adapters this role may be absorbed by the PFC controller or primary-side control MCU.

Reviewing the BOM against these roles helps confirm that conduction logic, gate drive, sensing, local protection and communication with the PFC stage are all properly covered in the design.

Example BOM roles: three-phase telecom rectifier active stage

In a 2–3 kW three-phase telecom rectifier, the active rectifier and PFC functions are often combined in a digital control platform. The IC roles can still be mapped clearly around that core:

• U1 · Digital PFC / active-rectifier controller: a DSP, high-performance MCU or dedicated digital power controller that implements three-phase voltage and current sampling, grid synchronisation, PFC algorithms and gate timing for the active rectifier legs.
• U2–U4 · Isolated gate drivers: driver ICs that provide high-side and low-side drive for each three-phase leg, with very high CMTI ratings, multi-amp drive capability and protection features such as DESAT detection and soft turn-off.
• U5–U7 · Three-phase current-sense front-ends: current transformers with amplifiers or sigma-delta modulators that deliver accurate phase-current information to U1 for both control and protection.
• U8 · Three-phase voltage-sense front-end: divider and amplifier or isolated amplifier network used by U1 for PLL operation, phase detection and abnormal voltage detection.
• U9 · Digital power / PMBus manager: an on-board controller or dedicated PMBus device that exposes rectifier operating data, efficiency metrics and fault logs to the rack or system controller. In some designs this role is integrated into U1.
• U10 · Temperature monitor ICs: sensors located near the switch modules or heatsinks, feeding U1 or U9 so that derating and protection thresholds can account for real thermal conditions.

Even when the core control function is highly integrated, separating the BOM into these IC roles simplifies reviews and makes it easier to verify that each aspect of active rectification—control, drive, sensing and monitoring—is robustly implemented.

Layout, EMI & common-mode considerations

Active and bridgeless rectifiers place switching devices directly in the AC path, tightening efficiency but also raising stress on PCB layout and EMI performance. High di/dt loops, high dv/dt nodes and common-mode currents must be controlled at the layout level before the EMI filter can complete the job.

Layout priorities for active and bridgeless front-ends

The first priority is to minimise high-current, high di/dt loops. The path from the AC input through the active bridge and into the PFC inductor or bulk capacitor should form a compact loop with closely coupled forward and return conductors. This reduces radiated and conducted noise and lowers parasitic inductance that can stress the MOSFETs and rectifier devices.

Power paths and control paths should be separated physically. Gate-drive routes must be short, direct and paired with their return paths, while current- and voltage-sense traces should follow defined Kelvin paths to shunts or measurement points. Symmetry in the bridge legs helps balance current sharing and common-mode behaviour, reducing the tendency of one side of the structure to dominate the EMI profile.

High dv/dt nodes, control-signal isolation and CMTI

High dv/dt nodes, such as MOSFET leg midpoints connected to the PFC stage, are strong sources of capacitive coupling into nearby copper. Layout should keep sensitive control and sensing traces away from these regions and avoid routing small-signal lines across switching nodes on inner layers, where parallel-plate capacitance can inject significant noise.

Gate-driver connections should be implemented as tight loops between driver and MOSFET source, with a clearly defined local reference. Isolated drivers and digital isolators must offer adequate CMTI for the expected dv/dt stress, and their placement should avoid large overlapping areas with high dv/dt copper. Analogue and digital grounds near the controller are usually consolidated in a quiet region, connected to the power ground through a short, controlled link rather than across noisy current paths.

Common-mode EMI challenges in bridgeless architectures

Bridgeless and totem-pole style front-ends tend to excite stronger and less symmetric common-mode currents than traditional diode bridges. In these architectures, line conductors often connect more directly to switching nodes, and responsibility for balancing common-mode behaviour shifts heavily toward device selection and layout.

A symmetric layout of the active legs and careful control of dv/dt through gate resistors and snubbers help reduce common-mode emission at the source. Nevertheless, the EMI filter must often be sized with additional margin for bridgeless designs. Driver and isolator CMTI requirements are typically higher than in diode-based front-ends, because dv/dt swings between line and neutral can be larger and more frequent.

Interface to the AC input & EMI front-end

Layout choices around the active bridge impose constraints on the EMI filter but do not replace filter design. This page focuses on noise generation and coupling at the rectifier itself: high di/dt loops, high dv/dt nodes, common-mode paths and the placement of control and sensing circuits. The AC Input & EMI Front-End page covers differential-mode and common-mode filter design, CM choke and Y-capacitor selection and compliance with EMC standards based on the noise profile produced by the front-end.

Treating layout and EMI filtering as a combined optimisation problem allows active-bridge and bridgeless designs to meet both efficiency and emission targets without relying on excessive filtering or over-conservative derating.

Application mini-stories (PSU & adapter cases)

Real designs highlight how active-bridge controllers, gate drivers, sensing front-ends and digital monitors work together. The following mini-stories show typical migration paths and integration hooks for adapters, server PSUs and specialised medical or industrial power supplies.

300 W USB-PD desktop adapter: from diode bridge to active bridge + totem-pole PFC

A 300 W USB-PD desktop adapter originally used a diode bridge followed by a boost PFC and an isolated DC-DC stage. Conduction loss and hotspot temperature concentrated in the bridge area, making it difficult to meet high efficiency and enclosure-temperature targets without oversized heatsinks or airflow. Migrating the front-end to an active bridge feeding a totem-pole PFC reduces the rectifier drop and spreads loss more evenly across the power train.

The active-bridge controller becomes the hub for line synchronisation and local protection. Integrated zero-crossing or PLL logic tracks the AC waveform, opens conduction windows only in the correct quadrants and uses body-diode conduction plus line-current direction sensing to confirm safe current flow before each MOSFET turns fully on. Adaptive dead-time and fast overcurrent response protect the bridge legs during abnormal conditions.

A typical device chain for this adapter includes:

• U1 · Active-bridge controller: receives line-voltage and line-current sense signals, computes conduction windows and generates gate commands for the bridge MOSFETs.
• U2 · High-/low-side gate driver: when needed, boosts U1 logic outputs to full gate-drive levels with sufficient current and CMTI to handle the switching node dv/dt.
• U3 · Totem-pole PFC controller or digital PSU controller: shares line-current information with U1 and accepts fault and status signals from the bridge so that PFC switching can be reduced or halted on rectifier faults.
• U4 · Line-current sense front-end: shunt amplifier or isolated modulator that feeds a common current reference to both U1 and U3.
• U5 · USB-PD controller: negotiates output profiles and can apply derating policies based on temperatures or status information exposed by the power-train controllers.

This migration typically frees several points of rectifier efficiency margin and lowers bridge hotspot temperatures, enabling more compact mechanical designs or reduced fan speeds without compromising reliability.

1–2 kW server PSU: three-phase active rectifier with digital PFC and PMBus monitoring

In a 1–2 kW server power supply fed from a three-phase AC line, a three-phase active rectifier replaces a passive diode front-end to improve efficiency and power-factor performance under a wide range of loading conditions. A digital power controller coordinates both the active rectifier and PFC behaviour while providing detailed telemetry to a rack-level energy management system.

The control core samples three-phase voltages and currents through dedicated sensing front-ends, runs a three-phase PLL and computes gate patterns for the rectifier legs and PFC stage. Its architecture turns the active rectifier into a managed subsystem: the controller can adjust modulation strategies to trade switching loss against harmonic content, and can track imbalances between phases in real time.

The IC chain typically includes:

• U1 · Digital PFC / active-rectifier controller: DSP or high-performance MCU that implements the three-phase control algorithms, grid synchronisation and rectifier gate timing.
• U2–U4 · Isolated gate drivers: high-CMTI drivers that interface U1 to the rectifier MOSFETs or power modules, providing DESAT protection and controlled turn-off under faults.
• U5–U7 · Phase-current sensing front-ends: CT-based or sigma-delta-based channels feeding phase current into U1 for both regulation and protection.
• U8 · Voltage-sensing front-end: measures phase or line voltages for PLL operation and abnormal input detection.
• U9 · PMBus or system management IC: aggregates rectifier telemetry such as loss estimates, phase imbalance, fault counters and thermal margins and exposes them to the rack controller.

With this structure, the active rectifier not only improves efficiency but also gives the data center a more detailed window into how each PSU behaves, enabling rack-level optimisation and predictive maintenance based on rectifier stress and event history.

Medical and industrial PSUs: managing loss and leakage with active bridges

In medical and industrial power supplies, leakage current limits and long-term thermal reliability add constraints on top of basic efficiency and cost. A traditional passive bridge concentrates loss and often pushes heatsink temperature close to limits, while aggressive EMI filtering with large Y-capacitors can consume much of the allowable leakage current budget.

Introducing an active bridge reduces conduction loss and enables more refined dv/dt control through gate-drive tuning and snubbers. Cleaner switching behaviour at the rectifier reduces some of the pressure on EMI filtering, which helps balance leakage-current and emission requirements. Thermal headroom improves, allowing either a modest power increase in the same enclosure or quieter operation at the same power level.

The key device roles include:

• U1 · Active-bridge controller: supports programmable gate-drive strength, flexible dead-time and coordination with snubber networks to balance dv/dt, efficiency and EMI.
• U2–U4 · Isolated gate drivers: high CMTI devices that minimise common-mode injection through the isolation barrier while enforcing safe turn-off under abnormal conditions.
• U5 · Current and voltage sense front-ends: provide accurate information for both control and protection without violating insulation or creepage requirements.
• U6 · Medical or compliance monitor: supervises isolation, leakage and relevant safety metrics, while also tracking temperatures and fault events in the active-bridge area.

In these applications, the active bridge is justified not only by its efficiency gain but also by the way it eases thermal and leakage-current trade-offs when combined with careful layout and EMI filter design.

Design checklist for active-bridge stages

This checklist captures the main decisions and verification points for an active-bridge or bridgeless front-end. It can be used at architecture review and layout sign-off to ensure that topology, sensing, control, protection, thermal and telemetry aspects of the rectifier stage are covered.

System input and efficiency targets

• Input voltage and frequency ranges defined (single-phase, three-phase, 50/60 Hz, other).
• Rated and peak output power established, including overload and surge profiles.
• Target efficiency or certification level (such as 80 PLUS or internal spec) documented.
• Maximum ambient temperature, allowable case temperature rise and cooling method confirmed.

Topology and architecture selection

• Expected efficiency gain versus a diode bridge quantified across load range.
• Active-bridge topology chosen: full-bridge, semi-bridgeless, bridgeless or totem-pole arrangement.
• Responsibility split between active-bridge controller and PFC controller clearly defined.
• Behaviour at very light load evaluated, including any burst or diode-emulation modes.

Current and voltage sensing with EMI and safety in mind

• Line-current sensing method selected (shunt amplifier, CT, isolated amplifier, sigma-delta modulator).
• Sensing location chosen with respect to EMI filter and PFC stage, avoiding unintended noise loops.
• Voltage sensing points defined for line, neutral and DC bus as required by the control scheme.
• Isolation ratings and creepage/clearance distances for sensing paths verified against safety targets.

Control IC capabilities and gate-drive margins

• Active-bridge controller supports the chosen topology and input range, including ZCD/PLL and conduction windows.
• Integrated or external gate drivers provide sufficient V_gate and peak current for selected MOSFETs or SiC devices.
• CMTI ratings of drivers and isolators exceed worst-case dv/dt with adequate margin.
• Dead-time settings and body-diode conduction strategy reviewed for both CCM and DCM operation.
• Sync, enable and fault lines between active-bridge controller and PFC/digital controller defined and tested.

Protection paths and coordination with eFuse / hot-swap

• Per-leg overcurrent and short-circuit detection implemented with verified response times.
• Gate-driver faults (UVLO, gate short, driver-supply loss) detected and mapped to safe turn-off behaviour.
• Sense-fault detection in place for critical current and voltage channels.
• Rail-level eFuse or hot-swap protection on the DC bus specified and coordinated with bridge protection.
• Clear fault-handshake defined between rectifier-stage protection and system-level shutdown or restart logic.

Thermal design and layout around the active bridge

• Switch and rectifier devices selected with appropriate R_DS(on), Q_g and package for thermal and switching targets.
• High di/dt power loops minimised and kept tight, with symmetric routing where applicable.
• High dv/dt nodes identified and separated from control and sensing traces in all layers.
• Temperature sensors or NTCs placed near active-bridge hotspots and linked to control or monitoring logic.
• Thermal modelling or measurements confirm junction-temperature margins under worst-case operating conditions.

Telemetry requirements and system integration

• Rectifier-related telemetry values defined (input power, loss estimates, temperatures, phase balance, PF if applicable).
• Event counters for faults, restarts and thermal limit excursions implemented where required.
• Data paths for telemetry selected: PMBus, SMBus, dedicated monitoring IC, ADC channels or GPIOs.
• System firmware and energy-management functions identified that will consume these measurements.
• Start-up, shutdown and fault-recovery sequences validated with the same observability as steady-state operation.

Active-bridge FAQs

These FAQs summarise when to adopt active bridges, how they interact with PFC stages, and which sensing, protection, layout and telemetry decisions matter most in offline PSUs and adapters.