Smart Irrigation / Garden – Soil & Flow Sensing + LoRa
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Central thesis: A smart irrigation node is an outdoor, low-power controller that must prove watering actions using hardware evidence (soil/flow + actuation waveforms) while surviving solar/battery constraints and harsh cable-borne surge/ESD/EMC.
H2-1. Definition & Boundary: What “Smart Irrigation Node” Covers
A Smart Irrigation / Garden node is an outdoor controller that closes a practical loop: measure soil/flow evidence → decide watering action → actuate valve/pump → verify by response (flow/pressure) → report telemetry under constrained solar/battery power. This page stays at the hardware evidence chain: sensing AFEs, actuation drivers, power/harvesting, and ruggedness for long cables.
Node types (engineering boundary anchors)
- Valve-control node: Drives irrigation valves (24VAC solenoids or DC latching). Must include coil protection and basic diagnostics (open/short / energy delivered).
- Pump-control node: Switches pump/booster (relay/SSR) and proves water movement using flow evidence. Requires surge/EMC attention on high-energy switching paths.
- Sensor-only node: Captures soil/flow evidence and transmits it; still must survive outdoor surge/ESD and manage burst current from LPWAN radios.
- Soil sensing AFEs (capacitive/resistive), input protection, sampling artifacts, and drift guards.
- Flow pulse capture and “valve action verification” using response windows (did water actually move?).
- Valve/pump actuation hardware (24VAC SSR/relay, DC latching pulse drivers), clamps/snubber, coil current evidence.
- Solar harvesting PMIC behavior (MPPT/cold start), storage ESR effects, rail partitioning for bursts.
- LPWAN/LoRa hardware coexistence: TX burst current, return paths, and analog/RF hygiene.
- Outdoor ruggedness for long cables: surge/ESD/EFT port stacks and evidence-driven validation.
- HEMS / whole-home energy switching (branch metering and home energy orchestration).
- Home hub / gateway deep dives (Matter bridge architecture, multi-protocol routing design).
- Leak / water sensor product chain details (this page is irrigation control, not leak alarm design).
- Cloud/app/backend architecture, OTA/protocol tutorials, and UX workflows (kept to hardware evidence only).
Scope enforcement tip: Any paragraph that cannot point to a measurable signal, waveform, counter, or port-level protection stack is likely drifting out of the hardware evidence boundary.
H2-2. System Architecture: Sensor → Decision → Actuation → Telemetry
The architecture should be read as four coupled domains: Sensor (soil/flow evidence), Actuation (valve/pump energy delivery), Power (harvest/storage/rails), and Radio (LPWAN bursts). Reliability comes from making coupling paths explicit: actuation and TX bursts must not corrupt analog baselines, and energy drops must never cross reset margins.
Evidence anchors (minimum “must-capture” signals)
Three chains (how the page stays vertically “deep”)
- Signal chain: soil AFE/ADC raw + flow pulse capture → quiet sampling windows → drift guards that can be verified on raw signals.
- Power chain: harvester PMIC (MPPT/cold-start) → storage (battery/supercap) → rails (always-on vs burst) → droop margin and reset policy.
- Actuation chain: driver topology (24VAC SSR/relay or DC latching pulse) → coil waveform truth → flow response truth → diagnostics + event log.
Architecture invariant: Any time the system transmits (TX burst) or actuates (valve/pump), either the sensor chain must be quiet (no sensitive sampling) or the baseline must be measured/compensated with explicit evidence.
H2-3. Soil Sensing AFEs: Moisture, Temperature, (Optional) EC/Salinity
Soil sensing is an analog problem disguised as a percentage number. Reliable irrigation decisions require raw electrical evidence (amplitude/phase/count) that stays interpretable across wet soil, long probe cables, and strong interference from valve switching and LPWAN bursts. The design goal is not “a stable UI value” first, but a sensor chain whose failure modes have distinct signatures.
Resistive vs capacitive sensing (engineering decision view)
| Dimension | Resistive (conductive path) | Capacitive (dielectric change) |
|---|---|---|
| Main risk | Electrode polarization, corrosion, DC leakage drift | Parasitic cable capacitance, surface moisture film, shielding sensitivity |
| Excitation | Prefer AC / pulsed excitation to reduce polarization | Oscillator/charge-transfer; frequency choice impacts EMI & cable loading |
| Cable sensitivity | Leakage dominates when wet; input impedance must be controlled | Parasitic C dominates when long; guard/driven shield often needed |
| Interference coupling | Ground bounce can look like “wetness” if measured near switching events | RF/valve edges can inject charge and shift baseline if sampling windows are not controlled |
| Best raw evidence | Amplitude + phase (or AC magnitude) vs temperature | Frequency/count or charge-transfer count vs temperature |
Design checklist (the parts that decide reliability)
- Excitation strategy: avoid DC bias on electrodes; use AC/pulsed excitation and sample after settling to reduce polarization artifacts.
- Port protection with low leakage: design the probe port as a “precision input” even outdoors; protect against ESD/surge without adding large leakage or parasitic capacitance that distorts readings.
- ADC settling budget: ensure source impedance and RC filters settle within the sampling window; otherwise, sampling capacitor charge injection becomes “fake moisture”.
- Quiet sampling windows: schedule soil measurements away from valve actuation edges and LPWAN TX bursts; if not possible, capture a baseline reference and explicitly flag the sample as “disturbed”.
- Shielding/guard strategy: use guard ring for leakage control; consider driven shield for long cables when parasitic capacitance dominates the transfer function.
- Reference ground control: keep valve/pump return currents out of the AFE reference; route surge return paths so they do not traverse AFE ground.
Log raw amplitude/phase/count (not a post-processed percentage) with a timestamp and a supply snapshot at the sampling instant. This makes drift and interference distinguishable.
At a fixed soil condition, record raw readings at 2–3 temperatures (e.g., cool/room/warm). The goal is not full calibration, but verifying that drift direction/magnitude matches physics rather than switching noise.
Common error signatures → how evidence separates causes
- Slow monotonic drift (minutes–hours): raw baseline moves gradually; changing excitation frequency changes drift → more consistent with electrode polarization or contamination.
- Step jump aligned with valve switching: raw jumps at actuation edges; disappears when sampling window is shifted → more consistent with ground bounce/return path coupling.
- Periodic baseline shift aligned with TX bursts: raw shifts during LoRa transmission; correlates with VBAT droop → more consistent with reference/supply disturbance or RF injection.
- Channel-to-channel “memory” after multiplexing: raw depends on scan order; improves with longer settle time → more consistent with ADC sampling capacitor/charge injection limits.
H2-4. Flow Sensing & Valve Verification: Pulse, Debounce, and “Did Water Actually Move?”
Flow sensing becomes valuable when it is treated as verification evidence, not just a telemetry number. The control loop must distinguish three cases with minimal hardware: (1) valve actuated + water moved, (2) valve actuated + no water (blocked/no pressure), and (3) water moved signal is false (noise, bounce, or missed pulses). This chapter binds the flow pulse chain to a clear response window that can be tested.
Pulse capture chain (what decides correctness)
- Input conditioning: ensure clean edges with defined thresholds (Schmitt behavior) and controlled RC so cable noise does not become pulses.
- Debounce strategy: avoid over-filtering that kills low-flow pulses; validate by sweeping flow and confirming pulse width/spacing margins.
- Low-flow robustness: the design must prevent “missing pulses” at low speed where edges are slow and supply is weak.
- Back-injection immunity: valve/pump switching must not inject into the pulse line; treat the flow port as an outdoor cable with surge/ESD needs.
Low-power counting (sleep without losing evidence)
- Sleep-safe counting: prefer hardware counters / low-power capture paths that can count edges while the MCU sleeps.
- Verification window wake: after a valve open/close event, enter a short wake window to capture and classify flow response with high confidence.
- Timestamped evidence: store count + window duration + supply snapshot to separate true “no water” from “no counting”.
Response window verification (simple, testable acceptance rule)
| Rule | What it proves | Typical failure indicated |
|---|---|---|
| Open → within N sec → pulses ≥ Pmin | Water movement exists after actuation | No pressure / blockage / valve stuck / pump not running |
| Close → within M sec → pulses decay < Pstop | Flow stops when commanded | Valve leakage / siphon / sensor false pulses |
| Pulses during actuation edge only | Noise injection suspected | Coupling from valve/pump switching into pulse input |
Pulse frequency vs supply and temperature. If pulses disappear only when VBAT droops or temperature shifts, the issue is electrical margin, not hydraulics.
Minimum pulses within the verification window. This turns “did water move?” into a pass/fail condition that can be validated on the bench.
Field rule: A valve command is not considered “effective” until both truths exist: actuation evidence (coil waveform) and response evidence (flow pulses within the window).
H2-5. Valve / Pump Actuation: 24VAC Solenoids, DC Latching, Relays/SSR
Actuation is the highest-stress electrical event in a smart irrigation node. A reliable design must deliver enough energy to the load while preventing dv/dt false triggers, long-cable ringing, and supply droop that causes brownout resets. Diagnostics should treat coil current waveform as the first truth, and bind it to flow verification evidence as the second truth.
Short selection tree (choose topology by load truth)
- 24VAC solenoid valve: Triac / AC SSR / Relay. Primary risk: dv/dt false trigger and line surge.
- DC latching valve: H-bridge dual-pulse drive. Primary risk: insufficient pulse energy and storage ESR.
- Pump / high-power load: Relay or SSR by voltage/current type. Primary risk: inrush, EMI, and return-path coupling.
24VAC solenoids: dv/dt false trigger and surge-aware switching
AC valves often sit behind long outdoor cables that behave like inductive antennas. Triac/AC-SSR switching must tolerate fast line transients; otherwise, parasitic capacitances can inject gate-equivalent current and create unintended conduction. Node-level suppression should focus on controlling dv/dt at the valve port and keeping the surge return path away from sensitive analog references.
DC latching valves: dual-pulse drive and pulse energy budgeting
Latching solenoids require two opposite-polarity pulses (open/close). The decisive quantity is pulse energy E ≈ V × I × t delivered at the coil under real wiring resistance and storage ESR. A local storage capacitor can prevent the actuation pulse from collapsing system VBAT, but it must be sized for both energy and acceptable inrush.
Long cables create ringing that can stress switches and confuse diagnostics. Use the correct clamp strategy (flyback diode vs TVS vs snubber) based on whether fast release or EMI reduction is prioritized.
Use coil current waveform features (slope, peak, hold/decay shape) to classify open/short/stall, then confirm with the flow verification window (pulses within N seconds).
Failure mode → evidence → first fix (fast field triage)
| Failure mode | Evidence signature | First fix |
|---|---|---|
| Open circuit (valve not connected) | Coil current near zero; flow verification fails | Check wiring/connector, port corrosion, cable continuity; validate with a known-good load |
| Short / overload | Current rises too fast or too high; VBAT droop; BOR/reset counter increments | Add current limit / increase local storage isolation; verify clamp strategy and cable damage |
| Insufficient latching energy | Peak too low or pulse too short; mechanical actuation inconsistent; flow window intermittently fails | Increase pulse energy (t or V margin), reduce path resistance, lower storage ESR, schedule actuation when VBAT is highest |
| dv/dt false trigger (24VAC) | Uncommanded short conduction bursts; often correlated with nearby switching or surges | Improve dv/dt immunity (snubber/RC at port), tighten layout/return path, consider relay where appropriate |
Minimum evidence to log: coil current waveform features (slope/peak/shape) and VBAT droop during the drive pulse, plus flow response window result.
H2-6. Solar Harvesting & Power Path: Cold Start, Storage, and Rail Strategy
Solar-powered irrigation nodes fail in ways that look like “random resets” or “weak actuation” unless the power path is treated as a state machine. The engineering goal is to guarantee cold start behavior, maintain a stable always-on domain for sensing and logging, and isolate burst domains (LPWAN TX and actuation) so their current peaks do not collapse VBAT or corrupt analog measurements.
MPPT sets the operating point, UVLO gates charging, and cold-start defines the minimum input needed to bootstrap rails from zero energy.
Supercap favors bursts but suffers leakage and ESR drift; rechargeable battery favors energy density but limits pulse current and low-temp margin.
Rail domains: AON vs TX burst vs Actuation burst
A robust node separates power domains by function. The always-on domain keeps MCU timebase and sensor baselines stable. The TX domain tolerates short bursts, and the actuation domain draws high current from local storage under controlled release. Isolation is validated by measuring VBAT droop and reset counters during bursts.
Checklist (make the system testable, not hopeful)
- Cold-start threshold: characterize the minimum input condition that boots the AON rail without oscillation.
- Energy budget discipline: treat sleep current as the dominant 24h term; treat bursts as short peaks that must not trigger BOR.
- Domain isolation: provide local storage for actuation; keep sensing references and AFE sampling away from burst events.
- Inrush control: prevent large capacitors or actuation-domain enable from collapsing the harvester operating point.
- Evidence logging: record VBAT droop during TX/actuation and increment reset reason counters (BOR/WDG) for field triage.
Evidence points (what to measure to prove margin)
| Evidence | What it answers | Typical failure implied |
|---|---|---|
| Cold-start curve (VIN/IIN/VBAT vs time) | Can the node bootstrap from zero energy? | UVLO oscillation, insufficient input power, excessive inrush |
| VBAT droop during TX burst | Does radio burst collapse the domain? | Storage ESR too high, rail isolation insufficient |
| Reset counters vs event timeline | Which activity triggers resets? | BOR margin too small, actuation pulse too aggressive |
H2-7. LPWAN/LoRa Hardware Coexistence: Bursts, Antenna, and Noise Hygiene
LoRa reliability on a solar irrigation node is dominated by hardware coexistence: TX bursts create steep current pulses that can pull down VBAT, inject ground bounce, and shift sensor baselines. Antenna placement and RF return routing must avoid coupling into high-impedance analog nodes. The goal is to keep sensing trustworthy while RF transmits and to keep RF output stable while the supply and temperature vary.
Three coexistence rules (hardware-only)
- Rule 1 — Domain isolation: feed TX bursts from a burst-friendly rail; keep AFE/ADC references on a quiet always-on rail.
- Rule 2 — RF return hygiene: RF return current must not cross AFE reference / probe shield return paths.
- Rule 3 — Quiet sampling: schedule sampling outside TX bursts, or tag samples taken during TX as “high-risk”.
TX burst coupling: what to prove with evidence
Capture AFE/ADC raw baseline and align it to TX activity. A synchronous step indicates supply/return coupling, not “soil variation”.
Track RSSI/SNR as observations against VBAT droop and temperature. Correlation points to hardware margin (PA supply, matching drift).
Antenna and matching: hardware pitfalls to avoid
- Keep-out discipline: maintain a clear antenna zone away from long probe/valve cables and noisy switching nodes.
- Matching placement: place matching close to the RF pin, with a clean local ground return that does not share analog reference copper.
- Coupling awareness: avoid routing high-impedance sensor traces under/near the RF feed and antenna reference region.
Two most common layout failures (and quick fixes)
| Layout failure | Field symptom | Evidence & first fix |
|---|---|---|
| Shared impedance between TX rail and AFE rail | Sensor baseline steps during TX; intermittent false moisture/flow changes | Prove with TX-aligned raw steps + VBAT droop; fix by isolating rails and improving local decoupling & return routing |
| RF return crosses AFE reference region | RSSI/SNR unstable and sensor noise increases only when RF active | Prove with baseline vs TX + location-dependent RF quality; fix by rerouting RF return/ground stitching away from AFE reference |
Minimum capture set: LoRa_TX_I (or TX_EN), VBAT droop during TX, and AFE/ADC raw baseline aligned to TX timing.
H2-8. Outdoor Ruggedness: Surge/ESD/EFT, Long Cables, Ground Potential
Outdoor irrigation nodes are defined by long cables and uncontrolled environments. Ruggedness is achieved by port-by-port protection stacks and disciplined surge return routing. The strategy is not a generic EMC textbook: each port (sensor, valve, solar, RF) is treated as a boundary with a specific threat model, a protection stack, and a measurable evidence signature (resets, counter gaps, false actuation).
Port partition (write protection as four boundaries)
- Sensor port: high-impedance signals + long probe leads → ESD and leakage sensitivity
- Valve port: inductive load + long cable → ringing, surge, false triggers
- Solar port: outdoor panel leads → surge + hot-plug + cold-start collapse risks
- RF port: antenna ESD exposure → protection must save the radio without harming RF too much
Protection stacks (port-by-port, node-relevant)
| Port | Threat focus | Stack logic (blocks) | Evidence signature |
|---|---|---|---|
| Sensor port | ESD, cable injection, moisture leakage | Series-R/RC → low-leak clamp (TVS) → optional CMC (if long harness) → keep return away from AFE REF | ADC RAW step, false pulses, counter gaps after ESD |
| Valve port | Inductive ringing, surge, dv/dt false trigger | Snubber/TVS/MOV (by load) → controlled return path → separate high-current loop from AFE/RF ground | False actuation, coil current abnormal envelope, BOR/reset during actuation |
| Solar port | Surge, hot-plug, cold-start oscillation | Input clamp (TVS or GDT at boundary) → inrush control/limit → harvester PMIC UVLO stability | VIN oscillation, VBAT fails to rise, repeated cold-start resets |
| RF port | Antenna ESD | RF-ESD device near connector/antenna feed → short return loop to RF ground → keep away from AFE REF | RF sensitivity drop or intermittent link after ESD |
Surge return routing: the non-negotiable rule
Protection devices only work when surge current returns through an intended path. If surge return crosses the AFE reference region or the RF return region, the node will exhibit false sensor baselines, false pulse counts, or even unintended actuation. Return paths should be short, wide, and confined to the port boundary area.
Rugged evidence pack: reset reason counters (BOR/WDG), pulse counter integrity checks, actuation event timestamps, and VBAT waveforms captured during ESD/EFT stress.
H2-9. Firmware Hooks That Hardware Depends On (No Protocol Deep Dive)
Hardware evidence chains require firmware hooks. Without deterministic duty cycling, timestamps, and reset-aware fail-safe behavior, sensor readings and actuation results cannot be correlated to TX bursts, brownouts, or environmental changes. This chapter defines the minimal hooks and the minimal field records required to make hardware root-cause analysis possible.
Three hooks (only what hardware depends on)
- Hook 1 — Duty cycling windows: isolate
SENSEfromTXbursts andACTdrive windows using guard bands. - Hook 2 — Low-power timebase: provide timestamps + monotonic sequence counters for every sample, TX, and actuation event.
- Hook 3 — Fail-safe recovery: define valve default state, watchdog policy, and brownout recovery that prevents unintended actuation.
Duty cycling: guard windows that protect analog truth
Apply TX_GUARD around TX activity. Samples taken inside the guard window must be tagged as high-risk.
Apply ACT_GUARD around valve/pump drive windows. Prevent high-impedance sensing and flow qualification from overlapping.
Attach sample_risk_flag (QUIET / IN_TX / IN_ACT). This separates true soil changes from coupling artifacts.
Fail-safe behavior: keep the node predictable
- Valve default state: on boot/brownout, force a known safe state before enabling actuation outputs.
- Watchdog: resets must be explainable with a reset reason code and a last-known state marker.
- Brownout recovery: after BOR, gate TX/actuation until VBAT and timebase integrity are verified.
Minimum field log: 12 required fields
| Group | Field | Why it matters (hardware evidence) |
|---|---|---|
| Alignment | boot_id, ts_rtc, sample_seq, tx_seq, act_seq |
Align raw sensing, TX bursts, and actuation events on one timeline. |
| Root cause | reset_reason, brownout_count, vbat_min_recent, tx_burst_count, actuation_count |
Prove whether anomalies are power-margin events, burst-related, or actuation-related. |
| Acceptance | flow_anomaly_count, sample_risk_flag |
Verify “valve commanded” vs “water moved” while excluding samples taken in risk windows. |
Field debug shortcut: when an anomaly appears, first check sample_risk_flag and reset_reason, then correlate with vbat_min_recent and act_seq.
H2-10. Calibration & Drift: Soil Variability, Sensor Aging, Seasonal Effects
Soil is inherently uncertain. Calibration must remain evidence-based: track raw distributions instead of forcing absolute “truth”, separate environment-driven shifts from aging-driven trends, and eliminate pseudo-drift caused by power and burst interference. The outcome is a drift classification that stays actionable in the field.
Three drift classes (each with a discriminator)
- Environment drift: temperature/salinity changes shift raw distributions (median shifts, spread changes).
- Aging drift: electrode fouling or material aging creates slow, mostly one-direction trends.
- Power/noise pseudo-drift: raw steps align to TX/actuation windows or VBAT droop events.
Use raw distributions, not “percent moisture” narratives
Track P10 / P50 / P90 and IQR for raw samples. Shifts in P50 indicate drift; widening IQR indicates instability or non-uniform contact.
Compare raw distributions across time windows. A gradual shift is often environmental; abrupt steps usually indicate coupling or a discrete event.
Discriminators: how to decide which drift class dominates
| Drift class | Signature | Fast discriminator | First fix |
|---|---|---|---|
| Environment | P50 shifts with temperature/salinity; IQR may widen with heterogeneous soil | Correlation of P50 with temperature; stable power + quiet samples | Apply simple temperature-aware correction and re-baseline at known “dry/wet” endpoints |
| Aging | Slow one-direction drift; sensitivity reduces over months | Long-term trend in rolling median; response amplitude to known wetting events decays | Probe maintenance/replacement schedule; tighten leakage control and shielding |
| Power/Noise | Step-like raw jumps; high variance only during activity | Raw anomalies align with sample_risk_flag, TX bursts, actuation, or VBAT droop |
Rework domains/returns, enforce guard windows, improve burst rail decoupling |
Lightweight calibration (hardware-friendly, field-friendly)
- Two-endpoint baseline: store raw references for “clearly dry” and “clearly wet” to anchor the local mapping.
- First-order temperature handling: track raw vs temperature slope and apply only a simple correction.
- Trust tagging: mark samples taken during risk windows and exclude them from long-term drift estimation.
Field workflow: first eliminate pseudo-drift (risk windows + VBAT droop). Then classify as environment vs aging using distribution shifts and long-term trends.
H2-11. Validation & Field Debug Playbook: Symptom → Evidence → Isolate → Fix
This playbook is designed for fast field diagnosis with minimal tools. Each symptom starts with “first two measurements” to separate power margin, actuation hardware, sensor integrity, and TX coexistence. Keep every conclusion evidence-based.
- VBAT@Storage and VBAT@PMIC/MCU (droop + distribution under load)
- COIL_I / ACT_I (coil/pump current waveform or peak + decay)
- TX_I (LoRa TX burst current or TX_EN timing)
- AFE_RAW (ADC raw code / sensor node voltage, not “percent”)
- FLOW_PULSE (pulse amplitude/edge/debounce integrity)
- Reset evidence:
reset_reason,brownout_count,boot_id,sample_risk_flag,flow_anomaly_count
Jump to symptom: 1 · 2 · 3 · 4 · 5 · 6 · 7 · 8 · 9 · 10
Symptom 1 — Valve occasionally does not open (often at dawn)
- First 2 measurements:
VBAT@PMIC+COIL_Iduring actuation. - Quick log check:
reset_reason(BOR?) +brownout_countdelta near the event. - Discriminator: repeat once with TX disabled and single-valve only; compare VBAT droop and COIL_I rise slope.
- Likely causes: low-temp ESR increase; storage not replenished; pulse energy insufficient (latching valves); shared impedance.
- First fix: schedule actuation only when VBAT margin is met; add isolated “actuation reservoir” capacitor; increase pulse energy (V×I×t) within ratings.
- Acceptance: 100% success over multiple dawn cycles; no BOR; COIL_I reaches expected peak within the first pulse window.
MPN examples (verify ratings for valve type and supply)
- H-bridge for DC latching valves: TI DRV8833, TI DRV8876
- Low-side MOSFET (actuation): Infineon BSC010NE2LS5, Vishay SiRA80DP
- Current sense amp (coil I): TI INA180A1, ADI LTC6102
- Shunt resistor: Vishay WSL2512 (low-ohm series, select value by current)
- Brownout supervisor: TI TPS3839, Maxim MAX809
Symptom 2 — Valve opens but no flow (or intermittent flow)
- First 2 measurements:
COIL_I+FLOW_PULSEwithin the verification window. - Quick log check:
flow_anomaly_count+act_seq(commanded vs verified mismatch). - Discriminator: define a fixed “flow window” (N seconds) after actuation; check minimum pulse count threshold.
- Likely causes: valve stuck / plumbing restriction; pulse conditioning wrong at low speed; noise injection during actuation.
- First fix: tighten pulse conditioning (Schmitt/comparator + debounce); move flow verification outside actuation guard; retry once before declaring failure.
- Acceptance: flow appears within the window for known-good plumbing; pulse edges remain clean during actuation events.
MPN examples
- Schmitt buffer (pulse clean-up): SN74LVC1G17, SN74AHCT1G14
- Micropower comparator (pulse): TI TLV3691, ADI LTC1540
- ESD for sensor/flow inputs: TI TPD1E10B06, Nexperia PESD5V0S1UL
- TVS (rugged cable ports): Littelfuse SMBJ58CA (choose voltage per port), Bourns SMBJ series
Symptom 3 — Node crashes when multiple valves actuate (worse with longer cables)
- First 2 measurements:
VBAT@PMIC+ totalACT_Iat the moment of crash. - Quick log check:
reset_reason(BOR vs WDG) +vbat_min_recent. - Discriminator: ramp load: 1 valve → 2 valves → 3 valves; find the “crash threshold” current and droop.
- Likely causes: no power-domain separation; shared ground return; cable ringing injects into logic/AFE; inrush too high.
- First fix: stagger actuation (avoid concurrency peaks); add current limiting/soft-start; reroute returns so actuation current does not pass AFE/MCU reference.
- Acceptance: no reset across worst-case concurrency; VBAT droop stays above BOR threshold with margin.
MPN examples
- High-side switch / eFuse (domain isolation): TI TPS1H100-Q1, TI TPS25940
- Load switch (smaller rails): TI TPS22918, ON Semi NCP45520
- Bulk polymer capacitor (reservoir): Panasonic OS-CON series (select ESR/cap)
- Common-mode choke (long cable noise): TDK ACM2012 series (select for line)
Symptom 4 — Reset occurs when LoRa transmits (often only on cloudy days)
- First 2 measurements:
TX_I+VBAT@PMICaligned to the burst. - Quick log check:
reset_reason+brownout_countnear TX time. - Discriminator: repeat with TX disabled; then repeat with lower burst rate; compare droop depth and recovery time.
- Likely causes: burst rail shares impedance with AON rail; storage at low SOC; UVLO near edge; insufficient local decoupling.
- First fix: split rails (burst vs quiet); add local decoupling at RF PA supply; enforce TX guard windows for sensing/actuation.
- Acceptance: no BOR during TX bursts at worst-case low light; AFE_RAW baseline remains stable in QUIET samples.
MPN examples
- LoRa transceivers/modules: Semtech SX1262, Semtech SX1276, ST STM32WLE5 (MCU+LoRa)
- Energy harvesting PMIC (solar): TI BQ25570, ADI ADP5091, e-peas AEM10941
- Low-IQ buck/boost (burst rail): TI TPS62740, ADI LTC3531
- Antenna ESD (low-C): Semtech RClamp0502B, Nexperia PESD5V0S1UL
Symptom 5 — Soil readings show step jumps (often synchronized to TX or actuation)
- First 2 measurements:
AFE_RAW+TX_EN(orACT_EN) aligned in time. - Quick log check:
sample_risk_flag(IN_TX / IN_ACT) +tx_seq/act_seq. - Discriminator: force sampling only in QUIET windows; if steps disappear, treat as coupling pseudo-drift.
- Likely causes: reference/return contamination; probe cable injection; input protection return path crosses AFE reference.
- First fix: enforce guard windows; add driven shield/guard where applicable; reroute surge/ESD return away from AFE reference.
- Acceptance: QUIET samples show stable baseline; step events align only with risk windows (never in QUIET).
MPN examples
- Low-bias op-amp for AFE buffers: TI OPA333, ADI ADA4505-2
- Analog switch (excitation/measurement mux): ADI ADG704, TI TMUX1101
- Input ESD (low leakage focus): TI TPD1E10B06, Nexperia PESD5V0S1UL
Symptom 6 — Large drift after rain (environment shift vs pseudo-drift)
- First 2 measurements: QUIET-window
AFE_RAWdistribution (P50/IQR) +VBATstability. - Quick log check:
sample_risk_flagrate +brownout_count(wet leakage can reduce margin). - Discriminator: classify distribution change: SHIFT (P50) vs SPREAD (IQR) vs STEP (activity-synced).
- Likely causes: true environment shift; probe leakage; pseudo-drift during activity (TX/actuation/charging).
- First fix: exclude IN_TX/IN_ACT samples from drift estimation; reinforce sealing/creepage for probe port; apply simple temperature-aware baseline only.
- Acceptance: drift classification remains stable across weather changes; pseudo-drift eliminated in QUIET sampling.
MPN examples
- Conformal coating (field-proven families): HumiSeal 1B31, Dow 1-2577 (verify process/material)
- RTC for stable timestamps: Micro Crystal RV-3028-C7, NXP PCF8523
- FRAM for event logs: Fujitsu MB85RC256V, Cypress FM24CL64B
Symptom 7 — Flow pulse loss at low flow / unstable counting
- First 2 measurements:
FLOW_PULSEwaveform + counter input edge quality (noise/undershoot). - Quick log check:
flow_anomaly_count+ pulse interval statistics (if recorded). - Discriminator: compare with stricter Schmitt/comparator threshold and debounce; confirm if missing pulses are amplitude-related or timing-related.
- Likely causes: weak edges at low RPM; long cable noise; incorrect pull-up; ground potential modulation.
- First fix: add Schmitt buffer; adjust RC; route pulse return properly; isolate pulse ground from actuation return.
- Acceptance: stable counting across low flow; no false pulses during actuation or TX bursts.
MPN examples
- Hall flow sensor (common turbine style): Honeywell SS49E (element), Allegro A3144 (switch)
- Schmitt buffer: SN74LVC1G17, SN74AUP1G17 (lower power variants)
- Pull-up resistor array (robust): Bourns CRA06S series
Symptom 8 — After ESD / storms: readings look normal but battery drains fast
- First 2 measurements: sleep current + VBAT self-discharge over time (with ports disconnected one-by-one).
- Quick log check:
tx_burst_countincrease (retries) + unexpected wake frequency. - Discriminator: isolate by disconnecting: sensor port → valve port → solar port; identify which port drives leakage.
- Likely causes: TVS/protection leakage after stress; moisture-induced bias leakage; damaged front-end clamp.
- First fix: replace suspect protection components; reduce continuous bias on exposed lines; improve creepage/return paths.
- Acceptance: sleep current returns to baseline; no unexplained wake bursts after port isolation.
MPN examples
- TVS (replace-to-test): Littelfuse SMBJ series, Vishay SMBJ series (select per port voltage)
- Low-cap ESD for small-signal: TI TPD1E10B06, Nexperia PESD5V0S1UL
- High-energy GDT option (severe surge): Bourns 2038 series (use only where appropriate)
Symptom 9 — Cold start fails / morning boot loops (UVLO oscillation)
- First 2 measurements: solar input VIN + VBAT during startup (look for repetitive charge/collapse cycles).
- Quick log check:
boot_idincrements repeatedly +reset_reasonpattern. - Discriminator: reduce load (disable TX/actuation) and increase light; if startup stabilizes, margin is insufficient.
- Likely causes: cold-start threshold too high; inrush too large; rails not gated during startup.
- First fix: gate non-essential rails until storage is above threshold; add inrush limiting; verify UVLO hysteresis is adequate.
- Acceptance: single clean boot under low light; no oscillation; stable VBAT ramp.
MPN examples
- Harvesting PMIC (cold-start capable): TI BQ25570, ADI ADP5091, e-peas AEM10941
- Load switch for startup gating: TI TPS22918, ON Semi NCP45520
- Supercap (reservoir): AVX BestCap series, Panasonic Gold Cap series (select leakage/ESR)
Symptom 10 — Unintended valve actuation / false trigger (long cables, surge-prone sites)
- First 2 measurements: actuation control node (gate/drive) +
COIL_I(confirm dv/dt induced turn-on). - Quick log check: unexpected
act_seqgaps + correlation with surge events (if logged). - Discriminator: add temporary snubber or gate clamp and repeat; if false triggers drop, dv/dt coupling dominates.
- Likely causes: dv/dt false triggering (triac/SSR or MOSFET); floating control line; surge return crosses logic ground.
- First fix: add gate clamp/RC; enforce default-safe state on boot/BOR; reroute surge/actuation returns away from AFE/MCU reference.
- Acceptance: zero unintended coil current events across stress switching; actuation only occurs with explicit command + valid VBAT margin.
MPN examples (24VAC / relay / solid-state options)
- Optotriac driver (zero-cross): onsemi MOC3063, Vishay VO3062
- Triac for 24VAC switching: ST BTA08-600, Littelfuse Q4025 (verify current/thermal)
- Relay (field-proven families): Omron G5Q series, Panasonic TQ2 series (verify coil/contact)
- TVS/snubber parts: Littelfuse SMBJ series (TVS), WIMA MKP film caps (snubber)
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H2-12. FAQs (12) — Evidence-Based, No Scope Creep
Each answer stays inside this page’s evidence chain (sensing / actuation / power / outdoor EMC / validation). Every fix is framed as: two measurements → one discriminator → smallest fix → acceptance.
