Answer. Isolated delta-sigma modulators are suited to high-bandwidth, high-accuracy current sensing on the high side of inverters and power stages. Compared with Hall current sensors, a ΔΣ channel usually offers better DC accuracy, lower drift, tighter linearity and a well-defined digital interface that is easier to synchronise with PWM and control loops. Hall sensors are attractive where board simplicity, galvanic isolation and large current range are more important than tight accuracy or response time.

Data. Typical isolated ΔΣ modulators support signal bandwidths in the 20–100 kHz range with effective resolutions around 12–16 bits after digital filtering. Offset and gain drift can be kept within a few tens of ppm/°C, with integral non-linearity often better than ±0.5 % of full scale. Hall sensors commonly provide bandwidths of 1–5 kHz, offset errors of several percent and drift in the tens of mA over automotive temperature ranges. Power dissipation in shunts must be managed for ΔΣ designs, whereas Hall sensors introduce minimal insertion loss.

Use-case. Isolated ΔΣ modulators are preferred for field-oriented control, fast over-current protection and precision torque or power measurements. Hall current sensors are suitable for lower-bandwidth overload detection, simple current monitoring and retrofits where inserting a shunt is difficult.

Answer. The required CMTI rating depends on the worst-case dv/dt of the power stage plus a safety margin. For modern IGBT-based inverters, minimum CMTI ratings in the 25–50 kV/µs range are common targets. For SiC-based inverters with much faster voltage edges, minimum CMTI ratings of 50 kV/µs and above are typically preferred to avoid bitstream glitches and loss of accuracy during switching events.

Data. As a rough estimate, an 800 V DC bus switching in 20–50 ns corresponds to a dv/dt of approximately 16–40 kV/µs. Devices with CMTI minimum ratings clearly above this range, for example 50–100 kV/µs, provide more margin in noisy layouts. The minimum CMTI value in the datasheet is the key figure; typical values should not be used as the design limit.

Use-case. Industrial drives with silicon IGBTs often operate safely with CMTI(min) around 25–50 kV/µs, while high-speed SiC traction or fast-switching renewable inverters generally benefit from CMTI(min) at or above 50 kV/µs, combined with careful PCB layout and shielding.

Answer. Basic isolation provides a single insulation barrier intended to protect against electric shock under normal operating conditions, whereas reinforced isolation is designed to offer protection comparable to two independent basic barriers. For high-voltage inverters, EV traction systems and grid-connected equipment exposed to users or service personnel, reinforced isolation is usually preferred for high-side ADC and modulator channels. Basic isolation can be considered inside secondary or already isolated domains where additional barriers are present elsewhere in the system.

Data. Datasheets typically specify working voltage, test voltage and surge ratings separately for basic and reinforced versions of similar devices. Working voltages may range from a few hundred volts to more than 1 kV RMS, while surge test voltages can exceed several kV depending on the isolation category. Lifetime curves often correlate permissible working voltage with service life (for example 10–20 years).

Use-case. High-side sensing directly referenced to an inverter DC bus or grid phase usually selects reinforced isolation. Secondary measurements inside low-voltage domains, or inside a separately isolated power supply, may use basic isolation if the overall system safety concept still meets the applicable standards.

Answer. The latency of an isolated delta-sigma channel is dominated by the group delay of the digital filter at the chosen oversampling ratio. For control applications, this delay is often on the order of one to a few output sample periods. As long as the delay is stable and included in the control design, high-performance current and voltage loops can still be achieved.

Data. As an example, a delta-sigma modulator running at 20 MHz with a SINC3 filter and OSR of 64 yields an output data rate of approximately 312.5 kSPS and a group delay on the order of one output sample, corresponding to a few microseconds. Lower OSR values reduce delay but increase noise, while higher OSR values improve noise at the cost of longer delay. For many motor control loops with PWM frequencies in the 10–20 kHz range, total measurement delay kept within roughly one to two PWM periods is often acceptable.

Use-case. High-bandwidth field-oriented control, active power-factor correction and fast DC/DC regulation typically rely on delta-sigma channels configured for OSR and filter types that balance noise and latency to match the control bandwidth and phase-margin requirements.

Answer. Sharing a single MCLK across multiple isolated delta-sigma modulators is not only possible but often recommended for phase-aligned measurements. A common clock keeps bitstream sampling instants coherent across channels and simplifies synchronisation of decimation filters and control loops.

Data. Typical MCLK frequencies for isolated modulators range from about 10 to 25 MHz. Skew between clock traces of a few hundred picoseconds is usually acceptable for control applications, but excessive skew or jitter directly degrades effective resolution at higher signal frequencies. Common-clock architectures also simplify the use of a global SYNC or FRAME pulse to align decimation filter phases across three-phase current and voltage channels.

Use-case. Motor drives, multi-level inverters and multi-channel measurement systems commonly share one high-quality clock source between several isolated modulators to ensure that phase currents, DC-link voltage and line voltages are sampled with consistent timing.

Answer. The shunt and RC filter in front of an isolated delta-sigma modulator must limit the input voltage to the modulator range, provide sufficient bandwidth for the current signal and attenuate high-frequency switching noise. The RC corner frequency is usually placed above the control bandwidth but well below the switching and ringing frequencies of the power stage, so that the modulator sees a clean representation of the fundamental and relevant harmonics without excessive overshoot during transients.

Data. For many motor drive applications, phase current bandwidths of 5–20 kHz are sufficient, while PWM frequencies may range from 5–20 kHz or higher. RC corner frequencies are often chosen in the tens of kilohertz range to pass the control-relevant content while attenuating switching spikes in the hundreds of kilohertz or megahertz region. Shunt values are selected to achieve tens to a few hundred millivolts at full-scale current, matched to the modulator input range and power dissipation budget.

Use-case. Three-phase inverters for motors, pumps and compressors typically use a carefully chosen shunt and RC network to balance measurement linearity, power loss and noise, while grid-tied and PFC stages may optimise the RC values differently to suit line current measurement requirements.

Answer. Random-looking toggling of the delta-sigma bitstream during fast dv/dt events is usually a sign of common-mode disturbance rather than a fault in the modulator. High dv/dt switching edges couple through parasitic capacitances into the isolation structure and input front-end, and if the disturbance approaches or exceeds the CMTI limit, temporary bit errors or bursts can appear at the output.

Data. In systems where inverter dv/dt reaches tens of kV/µs and layout places the isolator close to high dv/dt loops, short bursts of incorrect bitstream behaviour may coincide with each switching edge. Improving CMTI margin, moving the isolator away from switching nodes, tightening high dv/dt current loops and refining RC filtering often reduce or eliminate the issue.

Use-case. Debugging unexplained over-current trips or noisy current readings in SiC-based drives frequently involves correlating bitstream disturbances with dv/dt, then applying CMTI, layout and filtering improvements to stabilise the measurement.

Answer. Isolation integrity is normally verified through a combination of type testing, routine production tests and PCB layout controls. Type tests and qualification verify that the device and layout meet the required working voltage, test voltage and surge levels. In production, manufacturers often perform hipot or insulation tests on a sample basis, while ensuring that creepage, clearance and pollution assumptions are enforced through design rules and inspection.

Data. Lifetime curves in datasheets typically show permissible working voltage versus service life, for example allowing hundreds of volts RMS for 20 years under specific conditions. Production hipot tests may apply several kilovolts for a few seconds to verify insulation strength on a sampling plan. Board-level creepage and clearance are checked against the relevant standard and often automated by PCB design rule checks and visual inspection criteria.

Use-case. High-volume motor drives, solar inverters and EV chargers rely on this combination of qualification, sampling tests and layout control to ensure that isolated ADC and modulator channels maintain adequate insulation performance over the intended product lifetime.

Answer. Synchronisation is achieved by using a common time reference for all isolated channels and aligning their output samples to the control cycle. For delta-sigma modulators this typically means sharing an MCLK and a SYNC signal that resets or aligns decimation filters, while for isolated ADCs it means using a shared conversion trigger aligned to the PWM center or another defined phase point.

Data. In many motor drives, a single PWM carrier at 10–20 kHz defines the control cycle. A common sampling trigger is asserted at the PWM midpoint, causing all isolated channels (phase currents and DC-link voltage) to sample nearly simultaneously. Delta-sigma channels then decimate to one or more filtered samples per PWM cycle, which are read at consistent instants by the control algorithm.

Use-case. Field-oriented control and active front-end rectifiers depend on synchronised phase current and DC-link measurements to reconstruct flux, torque and power accurately, making robust synchronisation of isolated channels a key design requirement.

Answer. An integrated isolated ADC with SPI or LVDS often simplifies layout, timing and safety analysis because the converter and isolation barrier are co-designed and specified together. A discrete ADC plus digital isolator offers more flexibility in combining different devices, but shifts the responsibility for timing, CMTI and insulation budgeting to the system designer.

Data. Integrated isolated ADCs commonly specify CMTI, working voltage, test voltage and timing parameters as a single device, with guaranteed channel-to-channel timing alignment in multi-channel versions. Discrete ADC plus isolator solutions can match or exceed some specifications but may require additional analysis of propagation delay, jitter and isolation margins. BOM cost and board area can favour either approach depending on channel count and package options.

Use-case. High-performance motor drives and compact inverter designs frequently adopt isolated ADCs with integrated isolation to minimise complexity, whereas mixed-signal control boards or platforms shared across isolated and non-isolated designs may choose a discrete ADC plus digital isolator for maximum reuse.

Answer. Meeting creepage and clearance in dense layouts requires combining suitable packages with PCB techniques that preserve insulation paths. Wide-body packages with larger pin-to-pin distances help, while PCB slots, solder mask-defined keep-out regions and careful copper shaping prevent unintended shortcuts along the surface or through the board.

Data. Depending on the standard and pollution degree, creepage requirements for hundreds of volts can reach several millimetres or more. Routing rules often enforce minimum distances between high-voltage and low-voltage nets, and milled slots beneath the isolation barrier effectively lengthen the creepage path. Conformal coating, if used, must be compatible with the assumed creepage and pollution degree in the applied standard.

Use-case. Compact motor drives, servo amplifiers and EV inverters regularly face tight board area constraints, and rely on a combination of wide-body isolators, board slots and carefully managed keep-out zones to pass creepage and clearance audits while still fitting into small enclosures.

Answer. Common pitfalls include noisy or loosely routed isolated supplies, poorly defined high-side ground references, insufficient decoupling and misunderstanding of start-up and fail-safe behaviour. These issues can produce excessive offset, noise bursts, mis-triggered protection and unpredictable outputs during power transients.

Data. High-side isolated DC/DC converters should form tight local loops with the ADC or modulator, often within a few centimetres of trace length, and include low-ESR decoupling close to the device pins. Supply ripple should be kept within the limits given in the datasheet to avoid degrading accuracy. UVLO thresholds and fail-safe output states must be checked so that during start-up or brown-out the isolated channel moves to a known safe behaviour rather than producing arbitrary codes.

Use-case. High-side current and voltage sensing in inverters, DC/DC converters and on-board chargers often exposes the isolated ADC or modulator to fast power ramps and load changes, so robust high-side supply design and awareness of device start-up characteristics are essential to avoid intermittent and difficult-to-diagnose faults.