MIPI Switch & Mux for Multi-Camera (CSI/DSI)
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What a MIPI Switch/Mux is (and when you need it)
A MIPI switch/mux is a high-speed lane router that selects a physical path between multiple endpoints (CSI/DSI sources and receivers) while keeping the data stream electrically transparent and within signal-integrity margin.
Why switch/mux: Route a chosen camera lane-set to the SoC without re-cabling.
First risk: Path asymmetry (loss/skew/crosstalk) makes one camera “always worse.”
Pass criteria: No frame drop over Y minutes; eye/BER margin ≥ X.
Why switch/mux: Select a healthier route after EMI/thermal events or harness changes.
First risk: Switch event causes transient glitches if toggled during unstable link state.
Pass criteria: Glitch-free switching within T ms after entering safe idle window.
Why switch/mux: Keep the same source while swapping only the physical path (A/B).
First risk: Measurement fixtures add loading and mislead root-cause.
Pass criteria: A/B delta stays within X% across temperature sweep.
Why switch/mux: Keep sensitive lanes inside a controlled-return region; route around noisy blocks.
First risk: Reference-plane splits and discontinuous return raise common-mode radiation.
Pass criteria: Radiated/conducted margins ≥ X dB with stable video stream.
- Path routing, lane-group selection, and physical transparency requirements for switch/mux blocks.
- Routed equalization (when needed, how it changes margin, and typical failure modes).
- EMI-aware layout implications of adding a routing point and multiple paths.
- CSI/DSI protocol details (packet/timing specifics) — keep in the CSI/DSI pages.
- Protocol conversion or long-reach SerDes (FPD-Link/GMSL, HDMI/DP/LVDS bridges) — keep in Bridges/Extenders.
- Deep TVS/ESD component selection — keep in Port Protection (only placement rules belong here).
Topologies & Taxonomy (1:1, N:1, 1:N, Crossbar, Broadcast)
Topology defines who can talk to whom, how many paths exist, and how easy it is to prove root-cause. A “correct” topology balances four constraints: SI margin, control complexity, fault isolation, and debuggability.
- Many cameras, one receiver: start at N→1 mux (then add bypass for debug).
- Need any-to-any routing: crossbar (expect higher SI & control burden).
- Need one stream to multiple sinks: 1→N demux/broadcast (verify path symmetry).
- Bring-up is risky or field debug is required: reserve a bypass/loopback path.
Control complexity: low (single select signal or I²C register).
SI risk: one camera path becomes “longer/heavier” → insertion loss and skew mismatch.
Debuggability: good if a bypass/test header is reserved.
When it fails: one camera stable, another shows intermittent drops or temperature sensitivity.
Control complexity: low to medium (sink select + safe switch sequencing).
SI risk: output stubs and imbalance between branches increase reflections and crosstalk.
Debuggability: strong for A/B comparisons if branch symmetry is controlled.
When it fails: one sink works, the other fails at higher rate or longer harness.
Control complexity: high (routing matrix + sequencing + validation coverage).
SI risk: the worst-case route defines system margin; routed EQ often becomes mandatory.
Debuggability: excellent if logging and deterministic routing are enforced.
When it fails: only “certain routes” fail → points to path budget and mapping rules.
Control complexity: medium (synchronization and branch constraints dominate).
SI risk: branch symmetry and return-path consistency; common-mode radiation may increase.
Debuggability: medium (failures can appear only in one sink due to imbalance).
When it fails: “works at low rate, fails at high rate” → insertion loss/return discontinuities.
Control complexity: low (explicit “direct path” mode).
SI risk: lowest if implemented as a true direct route (minimal stubs).
Debuggability: highest (isolates path vs endpoint issues).
When it fails: if bypass passes but routed path fails → SI/layout/EQ issue is highly likely.
Key Electrical Constraints (D-PHY/C-PHY behavior relevant to switching)
This section lists physical-layer constraints that become critical once a routing point is added. It treats D-PHY/C-PHY as boundary conditions the switch must satisfy: path transparency, lane-group integrity, symmetry, and stable margins across selectable routes.
- In scope: transparency, common-mode/return, skew, polarity/mapping, termination visibility, settle margin (as constraints).
- Out of scope: protocol-level packet/timing details and deep training/state-machine explanations.
A routing design is robust only when these constraints hold on the worst selectable path, not just on the shortest route.
Why routing makes it harder: A switch may have separate internal paths; mismatched routing creates intermittent “works once” behavior.
Field symptom: Intermittent link bring-up after switching; resume/re-init becomes fragile; one camera works only when “first selected.”
Quick check: Keep camera fixed and toggle only the route; compare “single switch” vs “N repeated switches” stability.
Pass criteria: Switching succeeds for N cycles with no frame drop; recovery time ≤ T ms.
Why routing makes it harder: Fan-out, vias, and reference changes around the switch amplify imbalance and common-mode radiation.
Field symptom: EMI failures only on certain routes; stability changes with harness position, chassis bonding, or nearby switching loads.
Quick check: Compare EMI margin and error rate on “quiet-zone route” vs “noisy-zone route” while keeping endpoints constant.
Pass criteria: Radiated margin ≥ X dB; route-to-route error rate delta ≤ Y%.
Why routing makes it harder: Different routes add different via counts, layer transitions, and length deltas that expand skew.
Field symptom: Low-rate operation passes, higher rate fails; only certain route combinations are unstable.
Quick check: Lock mapping and test the worst-route first; verify that failures follow the route (not the endpoint).
Pass criteria: Lane skew ≤ X; worst-route margin ≥ Y.
Why routing makes it harder: Crossbar-style routing multiplies mapping combinations; undocumented rules create non-repeatable failures.
Field symptom: A firmware update changes route behavior; the same hardware behaves differently by selection order.
Quick check: Freeze mapping + route tables and validate per route; forbid implicit “auto guessing.”
Pass criteria: 100% mapping coverage on required routes; route success rate ≥ X%.
Why routing makes it harder: Demux/broadcast structures can leave branch segments that behave like reflective stubs.
Field symptom: Certain routes show strong sensitivity to cable length, temperature, or connector variance.
Quick check: Compare demux/broadcast routes vs direct bypass; if bypass passes but routed fails, suspect stub/reflection.
Pass criteria: Return-loss target ≥ X; route-to-route stability maintained over Y minutes.
Why routing makes it harder: The worst path is often the least tested combination; selection diversity hides margin debt.
Field symptom: Sporadic “cannot enter stable mode” events; failures cluster after thermal or power events.
Quick check: Make the worst-route the default in validation; do not qualify only the shortest route.
Pass criteria: Worst-route pass rate ≥ X%; stable-entry time ≤ T ms.
Routed Equalization — What it fixes and what it can break
Routed equalization applies an EQ profile per selected path to compensate channel loss and improve eye margin. The goal is to make the worst selectable route behave close to the best route, without creating new instability from noise, crosstalk, or thermal drift.
EQ effect: Restores high-frequency content to reopen the eye.
Quick check: If short route passes and long route fails, EQ is a strong lever.
Pass criteria: Worst-route margin ≥ X.
EQ effect: Compensates spectral tilt to stabilize the sampling window.
Quick check: Route-to-route failures track via count and reference changes.
Pass criteria: Route delta margin ≤ Y.
EQ effect: Makes the worst path behave closer to the nominal path.
Quick check: Qualify EQ on the worst route first; avoid “best-route only” validation.
Pass criteria: Worst-route success rate ≥ X%.
EQ effect: Allows a controlled profile per route/variant.
Quick check: Margin changes follow the mechanical variant more than the endpoint.
Pass criteria: Margin remains ≥ X over temperature.
Quick check: Reduce peaking one step; if errors drop, the channel is noise-limited not loss-limited.
Fix: Cap maximum peaking; prioritize return-path and crosstalk reduction before more EQ.
Pass criteria: Stable error rate within X per Y minutes across temperature.
Quick check: Force a unified baseline EQ profile and compare route spread.
Fix: Define an EQ table per route and qualify with a fixed validation plan (worst-route first).
Pass criteria: Route-to-route margin delta ≤ X.
Quick check: Repeat the same route under a temperature sweep and compare required EQ steps.
Fix: Add thermal headroom; validate EQ repeatability and keep margin reserve.
Pass criteria: Same EQ profile passes across temperature range with margin ≥ X.
Quick check: Compare results with and without measurement fixtures; prefer built-in counters/margining when available.
Fix: Standardize measurement points and keep fixtures consistent across validation.
Pass criteria: Lab vs field delta stays within X% across N units.
Lane Mapping & Path Rules (swap, polarity, aggregation, unused lanes)
In multi-camera systems, bring-up failures are frequently caused by lane mapping drift, polarity mistakes, and route-dependent weak lanes. This section defines engineering rules so each selectable path is enumerable, reproducible, and testable.
- Lane map table: Lane0..3 → Out0..3, including allowed swap and polarity rules.
- Aggregation rules: 2-lane vs 4-lane constraints and safe switching windows.
- Unused lanes policy: consistent handling that avoids route-dependent EMI and crosstalk.
Why: Crossbar-style routing multiplies combinations; undocumented behavior creates route-order-dependent failures.
Failure symptom: Some routes never stabilize; stability depends on selection order or firmware revisions.
Quick check: Freeze the route and mapping tables; validate each required route with identical conditions.
Pass criteria: Required-route coverage 100%; per-route success rate ≥ X% over N switches.
Why: Lane count changes the coupling environment and effective path symmetry; routing points magnify the delta.
Failure symptom: 2-lane passes but 4-lane fails (or vice versa); one lane is consistently the weakest.
Quick check: Hold the physical route constant and toggle only the lane-count; identify the weakest lane by exclusion.
Pass criteria: Both modes stable for Y minutes; mode-switch success ≥ X% across temperature.
Pass criteria: EMI margin ≥ X dB; route spread (errors/margin) ≤ Y; stable for T minutes.
Control Plane & Switching Sequences (glitch-free switching, state awareness)
Switching is not a purely logical operation; it changes the channel seen by the receiver. Reliable switching requires a safe window, state awareness, and glitch control.
Rule: Enforce hold/guard time before and after switching to prevent spurious receiver triggers.
Quick check: Loop switching for N cycles; if failures scale with cycle count, glitch control is insufficient.
Pass criteria: Switch time ≤ T ms; no drop/timeout over N switches; error count ≤ X.
Layout & Routing for Switch/Mux (return continuity, via strategy, reference planes)
Switch/Mux performance is dominated by return-path continuity, fanout-zone parasitics, and route-to-route consistency. This section provides layout rules that reduce route spread and improve EMI robustness in multi-camera builds.
- Fanout-zone definition: a controlled keep-out region around the switch.
- Return-path rules: avoid reference breaks; add stitching where unavoidable.
- Via strategy: minimize and equalize layer changes across lanes and routes.
- Isolation strategy: corridor routing + stitching/via-fence for multi-camera parallelism.
Why: A broken return path forces current to detour, enlarging loop area and increasing common-mode radiation.
Bad pattern: Differential pairs crossing a plane split or a void; necked-down return copper under the switch.
Quick check: Draw the return corridor under each route; verify no splits/voids; add nearby stitching if crossing is unavoidable.
Pass criteria: EMI margin ≥ X dB; worst-route stability ≥ T minutes; route spread ≤ Y.
Rule: Control layer changes; keep via count and via types consistent lane-to-lane.
Why: Local discontinuities and unequal via stacks create lane-specific weakness and enlarge route-to-route variation.
Bad pattern: One lane detours or changes layers more often; sharp geometry transitions near the switch.
Quick check: Build a per-lane audit: via count, layer transitions, proximity to aggressors, and plane crossings.
Pass criteria: Lane-to-lane margin delta ≤ X; weakest lane meets margin ≥ Y.
Rule: Use GND stitching and (where appropriate) via-fence along fanout boundaries to constrain fields and shorten return paths.
Why: Fanout is where parasitics concentrate; isolating and stitching this region reduces EMI leakage and route spread.
Quick check: Draw a fanout boundary box; confirm continuous reference under all exits; check stitching density is not sparse at exits.
Pass criteria: Switch-loop (N route changes) adds ≤ X new errors; EMI spread across routes ≤ Y.
Pass criteria: Error rate increase (parallel vs single) ≤ X; recovery time ≤ T s; EMI margin ≥ Y dB.
EMI/ESD Integration (what belongs near the switch vs near the connector)
Protection placement is not a habit; it controls where ESD/EMI currents flow. The baseline is connector-side first. Exceptions exist, but they introduce costs: added parasitics, symmetry loss, and increased route spread.
Why: Allowing surge/ESD energy to traverse the board increases coupling into switch fanout and increases radiation loop area.
Failure symptom: Routes become “more fragile” after ESD/EMI tests; route spread increases after protection changes.
Quick check: Trace the discharge path: connector → protection → chassis/return. The path must be short and avoid sensitive fanout zones.
Pass criteria: No route-dependent regressions; post-ESD stability ≥ T; EMI margin ≥ Y dB.
- Long internal runs leave the switch exposed to injected noise.
- Aggregation points near the switch require local field control.
- Mechanical constraints reduce connector-side chassis/return quality.
- Added parasitics degrade margin and increase route spread.
- Asymmetry increases common-mode and radiated emissions.
- Validation burden grows: more routes become “special cases”.
Pass criteria: Worst-route margin does not drop more than X; EMI margin ≥ Y dB across all required routes.
Pass criteria: Parallel activity error increase ≤ X; EMI margin ≥ Y dB; recovery ≤ T s.
Power, Thermal, and Reliability (hot spots, derating, sleep behavior)
In multi-camera systems, Switch/Mux devices are often treated as “transparent plumbing”. In practice, they can become a hot spot, a leakage contributor, and a route-spread amplifier when multiple lanes run concurrently and equalization is active. This section defines measurable power models, actionable thermal design steps, and reliability pass criteria.
- Power decomposition: P_total = P_static + N_lanes·P_lane + P_EQ(mode, setting) + P_ctrl
- Worst-case definition: concurrent routes + fastest mode + EQ enabled + high temp + supply corners
- Thermal actions: copper pour + thermal vias + airflow direction aligned to the hot zone
- Reliability gates: derating matrix + long-run soak + repeated sleep/switch recovery
Why: EQ and concurrent activity can dominate dynamic power and shift thermal margins.
Failure symptom: “Runs fine for minutes, then fails” due to slow heating; or power exceeds budget only when multiple routes run.
Quick check: Use a fixed time window (Y seconds) and compare ΔP across states; avoid changing multiple knobs at once.
Pass criteria: Multi-route ΔP increase ≤ X% vs budget; EQ-on ΔP ≤ Y mW; no new errors over T minutes.
Why: Average temperature is misleading; the weakest lane/route usually aligns with the hottest operating mode.
Quick check: Record temperature and error counters together; look for monotonic degradation with temperature rise.
Pass criteria: Hot spot temperature ≤ X °C (or ΔT ≤ Y °C); error growth slope ≤ K; stable ≥ T minutes.
Why: Reliability issues often appear only in combined corners, not in single-knob tests.
Quick check: Run repeated switching cycles (N loops) and a soak run (Y hours) while logging error counters.
Pass criteria: Error increase after N switches ≤ X; soak run shows no unrecoverable failures; recovery time p95 ≤ T.
- False wake events increase during noise/temperature changes.
- Wake completes, but the stream does not return (stuck in an intermediate state).
- Switch + sleep interaction creates probabilistic “won’t recover” behavior.
Bring-up & Debug Workflow (from “no video” to stable stream)
“No video” is not a single failure. The fastest path is a layered workflow: Physical → Route selection → HS entry → Stability → Thermal/EMI correlation. Each layer includes a minimal check set and pass criteria placeholders.
- Window: Y seconds per measurement.
- Loops: N switch/recovery cycles for probabilistic issues.
- Worst route: define once (longest loss / most parallel / noisiest adjacency).
- Fields: route ID, lane-map profile, EQ setting, temperature point, concurrency, error counters, recovery time.
- Verify rails and reset release are repeatable across N cycles.
- Verify control-plane writes read back correctly (no intermittent bus failures).
- Verify camera/source and sink are powered and stable before switching.
- Force a single route; disable auto-rotation during bring-up.
- Validate lane-map profile matches the intended path (no silent swap/polarity mismatch).
- Repeat switching N times; identify probabilistic “won’t latch” behavior.
- Switch only from a known idle state; add a settle window before resuming.
- Check success rate across N loops (avoid single-shot conclusions).
- If entry is intermittent, compare longest vs shortest routes first.
- Use fixed windows (Y seconds) for error counters; compare worst route to best route.
- Change one knob: reduce concurrency OR reduce EQ; observe counter slope.
- Run a long hold (T minutes) to catch thermal-triggered drift.
- Apply controlled thermal change (airflow/heat) and watch error counters.
- Change EMI condition (shield/open) and compare route spread.
- Verify the fix removes correlation, not just improves average behavior.
Validation & Test Hooks (eye/BER, PRBS, logging, A/B path comparison)
This chapter turns “looks OK” into measurable acceptance criteria. The focus is on consistent eye/margining setups, BER/PRBS-style stress, A/B path comparison (same source, different path), and a logging template that avoids protocol deep-dives.
Setup: Fix trigger/clocking assumptions; fix observation window to Y seconds; always include the worst route.
Quick check: Compare EQ disabled vs enabled; compare 1-route vs max concurrency.
Pass criteria: Eye opening ≥ X (units TBD); margin ≥ Y; results consistent over ≥ 3 repeats.
Setup: Use a repeatable stress mode (PRBS/pattern-style traffic) and a fixed time base (Y seconds) for counters.
Quick check: Run worst route + highest concurrency + high temperature corner; then drop one knob (concurrency OR EQ).
Pass criteria: Error events ≤ N per Y seconds; long hold ≥ T minutes without unrecoverable failures.
- Keep source unchanged and receiver unchanged.
- Route the same stream through Path A and Path B into the same receiver.
- Compare eye/margin and error counters over the same window (Y seconds).
A and B both unstable is more consistent with control-sequence, power/reset, or system-wide constraints.
- Route ID, lane-map profile, EQ setting, concurrency
- Observation window (Y seconds), loop count (N switches)
- Error counters (rate + slope), recovery time (p50/p95), temperature point
- Temperature sensor: TI TMP117 (board hot-spot correlation)
- Current/rail monitor: TI INA226 (per-rail power delta logging)
- I²C GPIO expander: TI TCA9535 / NXP PCA9555 (route control + status sampling)
- Non-volatile config: Microchip 24LC02 (store lane-map profile / board ID)
Use the same camera source and the same receiver. Change only the routed path. Compare EYE, BER, and LOG counters using the same window (Y).
Engineering Checklist + Applications & IC Selection
- Define topology (N:1 / 1:N / crossbar) and route coverage.
- Freeze lane-map rules (swap/polarity/aggregation constraints).
- Define safe switching windows and repeat count (N loops).
- Budget worst-route insertion loss and concurrency corners.
- Keep return paths continuous through the switch fanout zone.
- Control via strategy; fence/stitch ground to reduce coupling.
- Physically isolate parallel camera routes to reduce NEXT/FEXT.
- Place thermal copper + vias without breaking reference continuity.
- Use layered debug: Physical → Route → HS entry → Stability → Correlation.
- Use A/B path comparison before changing hardware.
- Keep identical denominators: window Y seconds, loops N.
- Run derating matrix: temperature × concurrency × EQ × worst route.
- Soak run for Y hours; validate recovery p95 ≤ X ms.
- Freeze logging fields for regression comparability.
- Why: camera selection, redundancy path, debug bypass, EMI zoning.
- Constraints: worst-route loss, concurrency, safe switching window, thermal hot spots.
- Why: source selection and serviceability (A/B routing during bring-up).
- Constraints: path symmetry, EMI coupling near connectors, stable re-entry after sleep.
- Lane rate class + worst-route loss + concurrency
- Topology (2:1 / 4:1 / crossbar / broadcast) + route coverage
- EQ needed? (none / fixed / adaptive) + path-to-path consistency
- Control (I²C/GPIO) + safe switching sequence requirements
- Power/thermal budget + enclosure airflow reality
- onsemi FSA646A (MIPI D-PHY / C-PHY switch)
- Diodes PI3WVR648 (2:1 MIPI 4-data-lane + clock switch)
- Diodes PI3WVR628 (2:1 MIPI switch for CSI/DSI modules)
- TI TS3DV642-Q1 (passive differential mux/demux; supports MIPI D-PHY/C-PHY use cases)
- TI SN65DPHY440SS (MIPI D-PHY retimer class)
- Diodes PI2MEQX2503A (2-lane + clock D-PHY ReDriver)
- Diodes PI2MEQX2505 (4-lane + clock D-PHY ReDriver)
Keep the flowchart conceptual: focus on rate/loss/topology/EQ/control/power. Avoid parameter tables to prevent scope expansion.
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FAQs (field troubleshooting & acceptance criteria)
Q1 · Only one camera fails after switching—lane map mismatch or EQ over-peaking?
Quick check: Lock to the failing route; disable EQ; run A/B path compare over Y seconds and record error counters.
Fix: Standardize lane-map profile per camera; align polarity rules; cap peaking (reduce by X dB-equivalent step) or use a per-route EQ table.
Pass criteria: Error events ≤ N per Y sec on both routes; A/B margin delta ≤ X; ≥ N switches without a single failure.
Q2 · Works on short FPC, fails on harness—first check insertion loss budget or return discontinuity?
Quick check: Compare the same route with short cable vs harness; log error-rate slope over Y seconds; note whether failures scale with length.
Fix: Reduce discontinuities (restore reference continuity, shorten stubs), or add appropriate re-drive/retime; re-balance routing to reduce via/connector count by N elements.
Pass criteria: Worst-route error events ≤ N per Y sec; stable stream ≥ Y minutes; margin ≥ X (units TBD) at the harness length limit.
Q3 · HS enters, but frames drop randomly—crosstalk/NEXT or marginal settle?
Quick check: Reduce concurrency (run 1 stream) and compare error-rate over Y seconds; then re-enable concurrency and observe delta.
Fix: Increase physical isolation (spacing/guard/ground stitching), align route symmetry, and adjust settle/EQ within a bounded step of X (no over-tuning).
Pass criteria: Error events ≤ N per Y sec at max concurrency; drop rate improvement ≥ X% after mitigation; repeatable across N runs.
Q4 · Stable when cold, fails when hot—EQ drift or thermal throttling?
Quick check: Correlate failures to temperature sensor logs; compare error slope at ΔT = X°C increments over Y seconds per point.
Fix: Reduce power (lower peaking by X steps, reduce concurrency), improve heat spreading (copper/vias/airflow), and define derating thresholds.
Pass criteria: No unrecoverable failures across T-range; error events ≤ N per Y sec at worst case; recovery p95 ≤ Y ms after a thermal transition.
Q5 · Switching causes a “black frame” glitch—missing LP idle window?
Quick check: Enforce a controlled sequence: idle/LP for Y ms → switch → resume; compare black-frame count over N switches.
Fix: Add a guaranteed idle window; gate switching to a known safe boundary; debounce control lines for Y µs to prevent glitches.
Pass criteria: Black frames = 0 across N consecutive switches; recovery time ≤ Y ms; no counter spikes above N per Y sec post-switch.
Q6 · One path is always worse—via count/plane split or asymmetrical routing?
Quick check: Run A/B compare with the same source; record margin and error slope over Y seconds; count via/connector deltas (Δ = N).
Fix: Equalize routes (reduce Δ vias/connectors by N), restore continuous reference across transitions, and enforce symmetric fanout rules.
Pass criteria: Path-to-path margin delta ≤ X; error events ≤ N per Y sec on both routes; stable ≥ Y minutes under max concurrency.
Q7 · EMI fails only in one mode—shield bond/return path change during switch?
Quick check: Repeat the EMI-failing mode with fixed routing; log mode transitions and emissions spikes; correlate spikes within Y ms of switching.
Fix: Improve 360° shield bonding continuity, add/relocate ground stitching (increase count by N near transitions), and avoid reference splits in the fanout zone.
Pass criteria: EMI margin ≥ X dB across modes; no emissions spikes exceeding limit in N transitions; stable counters ≤ N per Y sec.
Q8 · Adding TVS fixed ESD but worsened image—Cdiff mismatch near lanes?
Quick check: Compare with/without TVS footprint populated; run A/B compare over Y seconds; look for route-specific degradation only when TVS is installed.
Fix: Enforce differential symmetry (match parasitics within X), optimize placement to minimize stubs, and validate with a controlled windowed counter test.
Pass criteria: Margin loss with protection ≤ X; error events ≤ N per Y sec at worst route; ESD pass maintained with zero post-event functional degradation across N hits.
Q9 · Multi-cam simultaneous capture fails—bandwidth/aggregation mismatch vs switch topology?
Quick check: Reduce to 1 stream; then add streams one-by-one; record failure threshold at N concurrent streams over Y seconds each step.
Fix: Align topology to concurrency (crossbar/broadcast where needed), standardize aggregation mode, and avoid mixing profiles that cause per-route mismatch.
Pass criteria: Max intended concurrency sustained for ≥ Y minutes; error events ≤ N per Y sec; no route-specific failures across N repetitions.
Q10 · After sleep/resume, camera doesn’t recover—state machine not reset or LP/ULPS exit order?
Quick check: Force a deterministic resume: reset control plane → idle for Y ms → switch route → start; log recovery time and counters for N cycles.
Fix: Add explicit state reset and timing guards; ensure switching happens only after a verified idle window; debounce control changes for Y µs.
Pass criteria: Recovery success rate = 100% over N sleep/resume cycles; recovery p95 ≤ Y ms; post-resume error events ≤ N per Y sec.
Q11 · A/B path test disagrees with scope—measurement point/loading artifact?
Quick check: Validate with counters first (window Y seconds) and keep identical observation conditions; repeat N times to test repeatability.
Fix: Standardize measurement points, minimize loading, and rely on A/B counter deltas before making EQ or layout conclusions.
Pass criteria: Counter-based conclusion stable across ≥ N repeats; measurement-induced delta ≤ X; error events ≤ N per Y sec after instrumentation is standardized.
Q12 · Passes lab, fails in vehicle—grounding strategy/CM noise injection?
Quick check: Correlate failures with vehicle events (load switching) and ground reference changes; log error spikes within Y ms windows around those events.
Fix: Improve grounding/return continuity, increase stitching near transitions by N, and reduce susceptibility via bounded EQ/route isolation adjustments (≤ X steps).
Pass criteria: No unrecoverable failures during vehicle event script of Y minutes; error events ≤ N per Y sec; stable across ≥ N repeated drives/loops.