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E-Reader Hardware Guide: E-Ink Drivers, PMIC, Wi-Fi, ALS

E-Reader Hardware Guide: E-Ink Drivers, PMIC, Wi-Fi, ALS

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Consumer Electronics Peripherals & Gaming E-Reader Single-column • WP-friendly

An e-reader succeeds when three hardware realities are controlled: stable EPD HV/VCOM rails (to prevent ghosting and flicker), disciplined refresh/LUT decisions (especially across temperature and battery limits), and low-power power-path scheduling (so Wi-Fi/charging/frontlight spikes never collapse VSYS). This guide turns common field symptoms into a repeatable evidence chain—event markers → rail waveforms → display signatures → A/B isolation—so design, validation, and sourcing decisions converge quickly.

H2-1｜Engineering Boundary and the Problem This Page Solves

An E-Reader lives at the intersection of three hard constraints: EPD image quality (high-voltage rails, waveform/LUT selection, temperature compensation, ghosting control), real ultra-low power (sleep/wake domains, rail gating, wireless bursts), and reliable daily experience (charging behavior, frontlight stability, ALS-driven brightness control). The purpose here is to convert common symptoms—ghosting, flicker, slow cold refresh, random reboots, “breathing” brightness—into measurable evidence and selectable IC requirements.

Boundary rule: content platform, app ecosystem, and cloud architecture are out of scope. USB-C PD/PPS fast-charge topology is not expanded—only device-side charger/PMIC behavior relevant to E-Reader stability is covered.

What this page must deliver (evidence-first, not opinions)

Measurement points that close the loop Battery node, main rails, EPD HV rails, VCOM, frontlight current path, Wi-Fi burst supply point, ALS supply + I²C integrity.
Symptom → evidence → root-cause mapping Examples: “gets dirtier with partial refresh” ↔ LUT/temperature path/VCOM drift; “page-turn reboots” ↔ burst current droop/UVLO margin.
Pass/fail criteria and stress matrices Cold/room/hot ranges, battery voltage corners, refresh modes, Wi-Fi bursts, charging concurrency, and frontlight low-level dimming checks.
IC selection logic that procurement can verify Why EPD driver specs must include ripple + sequencing tolerance + VCOM stability; why PMIC must support domain gating + ship mode; why Wi-Fi stability depends on rail transient behavior.
E-Reader scope map: three constraints and strict boundaries A three-pillar diagram showing EPD image quality, ultra-low power, and reliable daily experience. Includes an allowed evidence loop and banned out-of-scope areas. E-Reader Hardware Scope Convert symptoms into measurable rails, timing windows, and selection requirements EPD Image Quality HV rails + VCOM Waveform / LUT Temp compensation Outputs: ripple, drift, sequencing evidence Ultra-Low Power Sleep / wake domains Rail gating + IQ Wi-Fi burst control Outputs: current waveform “power ledger” Daily Reliability Charging behavior Frontlight stability ALS smooth control Outputs: concurrency stress test matrix Evidence Loop (must be measurable) Symptoms Rails / Waveforms / Timing Root Cause IC Selection Out of Scope (link out; do not expand here) OS/app optimization • cloud/content architecture • DRM business logic USB-C PD/PPS topology deep dive • router/NAS • ESL systems
Figure H2-1. The page scope is defined by three hard constraints. Every later section must map symptoms to measurable rails/waveforms/timing windows and end in verifiable selection requirements.

H2-2｜System Decomposition: Functional Blocks, Power Tree, and Signal Chain

A reliable E-Reader design starts with a single, shared map that ties together: functional blocks (what exists), power tree (what feeds what), and signal chain (what triggers events). This section splits the system into six blocks so each later chapter can stay narrow, deep, and evidence-driven—without drifting into sibling product pages.

The six-block map (what matters + what to measure)

1) EPD display chain SoC/EPD controller → E-ink driver (HV rails) → panel (VCOM, gate/source). Measure HV ripple, VCOM drift, and sequencing windows during refresh.
2) Frontlight chain LED strings → LED driver (constant current/PWM) → optical diffuser. Measure low-level flicker, current stability, and coupling into ALS/rails.
3) Main compute & storage Low-power application processor, RAM/flash, RTC and wake domain. Measure deep-sleep current and wake spikes; verify domain gating actually shuts rails.
4) Wireless (Wi-Fi) Scan/associate/Tx events create burst current and RF noise. Measure supply droop and burst envelope; confirm no refresh-time instability.
5) Battery & power management Battery → charger → PMIC rails → fuel gauge. Stress with concurrency: charging + refresh + Wi-Fi bursts; check UVLO margin and rail recovery.
6) Sensing inputs (ALS + temperature) ALS drives brightness behavior; temperature drives waveform/LUT selection. Validate sensor input quality (noise, bias, location) before blaming “algorithms”.

How to use the system map (practical reading order)

  • Start from power: confirm battery → charger → PMIC rails integrity under bursts and refresh events.
  • Then lock EPD stability: HV rails and VCOM must remain within ripple/drift limits during waveform execution.
  • Finally tune experience loops: frontlight low-level dimming and ALS input quality must not fight each other.
E-Reader block diagram: power tree and signal chain Block diagram showing battery, charger, fuel gauge, PMIC rails feeding SoC, Wi-Fi, frontlight driver, sensors, and EPD driver with HV rails and VCOM to the panel. Includes labeled measurement points. E-Reader Functional Blocks + Power Tree Measure points (①–⑤) tie symptoms to rails, timing windows, and selection constraints Battery & Charging ① Battery node Charger Fuel Gauge PMIC Rails ② Main rails, sequencing, UVLO margin SoC rails Wi-Fi rail Frontlight / sensors Low-Power SoC Sleep/wake domain + refresh trigger Refresh event + mode Wi-Fi ③ Burst current Frontlight ④ Low-level dim ALS + Temperature ⑤ Input quality (noise/bias) drives control E-Ink Driver + EPD Panel HV rails + VCOM stability during waveform execution E-Ink Driver IC HV booster • VCOM • timing HV+ HV− VCOM EPD Panel Gate / Source electrodes signal: refresh trigger
Figure H2-2. One shared map connects the power tree (battery → charger/gauge → PMIC rails) and the signal chain (SoC refresh event → E-ink driver → panel). The numbered points (①–⑤) define where evidence is collected on real hardware.

H2-3｜Why EPD Needs High Voltage and Waveforms: From Physics to Engineering Metrics

An EPD (e-paper) panel does not behave like an emissive display. The image is formed by controlled transitions that require high-voltage rails and a multi-phase waveform. Most real-world complaints—ghosting, slow refresh, cold slowdown, local flicker, and “washed” contrast—are best treated as an engineering problem: the waveform execution must happen inside a stable rail-and-timing window, and the correct waveform/LUT must be selected for temperature.

Observable phenomena (what users report) → what engineering must prove

Ghosting / afterimage accumulation Often worsens with repeated partial refresh; depends on waveform/LUT selection, VCOM drift, and incomplete transitions under low margin.
Slow refresh and cold slowdown Refresh time can rise sharply at low temperature; the control input (temperature) must be accurate to select a safe waveform profile.
Local flicker or “patchy” updates Common around mode switching (full↔partial) or concurrency events; rail ripple and timing window violations are high-probability causes.
Low contrast / gray-level inconsistency Frequently linked to baseline stability (VCOM) and repeatability of the waveform execution across voltage and temperature corners.

Engineering metrics (define pass/fail; avoid subjective debates)

Mode trade-off: Full vs Partial refresh Measure refresh time and a ghosting score in both modes. Define a rule for when partial refresh must trigger a periodic full refresh.
Corner coverage: Temperature × Battery voltage Validate cold/room/hot and low/nominal battery corners. Track refresh time growth and ghosting threshold shifts at each corner.
Ghosting score (A/B criterion) Use a fixed test pattern (grayscale steps + checker). Compare baseline vs candidate under identical corners and declare a score threshold.
Conclusion anchor: the phenomena above map back to four measurable levers: Waveform/LUT, VCOM stability, HV rail ripple + timing window, and temperature input quality.
Waveform / LUT VCOM stability HV ripple + timing Temperature input
EPD phenomena → metrics → measurable levers A block-flow diagram. Left: observed symptoms. Middle: engineering metrics and corner matrix. Right: measurable levers (waveform/LUT, VCOM, HV ripple/timing, temperature input). EPD: From Symptoms to Engineering Metrics Waveform execution must stay inside a stable rail-and-timing window Observed Phenomena Engineering Metrics Measurable Levers Ghosting Accumulation after partial cycles Slow Refresh Refresh time grows at corners Cold Slowdown Temperature selects safe waveform Local Flicker Mode switch + rail ripple risk Mode Metrics Full vs Partial Refresh time • Ghosting score Define periodic full-refresh rule Corner Matrix Temperature × Battery T: cold/room/hot Vbatt: low/nominal Mode: full/partial Waveform / LUT Select profile per temperature VCOM Stability Baseline drift drives gray errors HV Ripple + Timing Waveform needs stable window Temperature Input Sensor accuracy and placement Engineering rule: validate corners first, then enforce a “stable window” for waveform execution
Figure H2-3. Symptoms become engineering metrics only when validated across temperature and battery corners. Results must map back to measurable levers: waveform/LUT, VCOM, HV ripple/timing window, and temperature input quality.

H2-4｜E-Ink Driver IC Architecture: HV Booster, VCOM, Gate/Source Must-Have Checklist

The E-Ink driver IC is the execution engine between the SoC refresh event and the EPD panel electrodes. It must generate and regulate high-voltage rails, maintain a stable VCOM baseline, and deliver gate/source drive with controlled edges. Selection is not “can it drive the panel”; it is whether the device can keep rails stable during refresh transients, tolerate sequencing corners, and avoid half-refresh behavior under undervoltage.

Architecture blocks (structure → what can fail)

HV generation: boost + inverting Creates HV+ and HV− rails. If ripple or droop rises during refresh, local flicker and ghosting risk increases.
VCOM generation + drift control Sets the baseline for gray-level behavior. Drift versus temperature, load, or mode switching commonly shows up as inconsistent contrast and ghosting.
Gate/source output stage + edge shaping Delivers the waveform to electrodes. Insufficient drive or uncontrolled edges can amplify flicker and reduce repeatability at cold corners.
Protection + sequencing (soft-start, current limit, UVLO) Prevents unsafe refresh when rails are not ready. Undervoltage half-refresh is a high-impact failure mode that can “dirty” the panel state.

Typical rails (relative relationships + stability requirements)

HV+ / HV− (refresh-window stability) Both rails must remain stable throughout the waveform execution window. The relevant requirement is dynamic behavior (droop/recovery), not a static number.
VCOM (baseline stability across corners) VCOM must resist drift across temperature, battery voltage, and mode switching. Small baseline changes can become visible as ghosting and gray inconsistency.
Gate/source related supplies (output repeatability) Output stage supplies must support repeated transitions without collapsing. Repeatability matters most during fast partial refresh and cold corners.

Must-measure validation points (fixed SOP)

1) HV rail ripple during refresh transients Capture HV+ and HV− at the driver pins across refresh start and mode switching. Evaluate droop, ripple peak-to-peak, and recovery time.
2) VCOM drift across temperature, battery corners, and mode switching Measure VCOM at cold/room/hot and low/nominal battery. Pay attention to drift magnitude and drift rate during full↔partial transitions.
3) Power-up sequencing and the “stable window” rule Ensure refresh triggers only after HV rails and VCOM reach a stable-ready state. Under UVLO or brownout, refresh must be inhibited to avoid half-refresh.
E-Ink driver IC: internal blocks and must-measure points A block diagram of an E-Ink driver IC: HV booster, VCOM regulator, gate/source output stage, and protection/sequencing. Shows inputs from PMIC rails and SoC refresh trigger, outputs to HV+/HV-/VCOM and panel electrodes, and measurement points. E-Ink Driver IC Architecture Structure → selection gates → fixed validation points (①–④) Inputs From PMIC rails Refresh trigger E-Ink Driver IC HV generation • VCOM control • output stage • protections HV Booster boost + invert soft-start VCOM Reg baseline stability drift control Gate / Source Output Stage drive capability • edge shaping repeatability at cold corners Protection + Sequencing current limit • UVLO • inhibit refresh ① HV ripple ② VCOM drift ③ sequencing ④ output edges Outputs HV+ HV− VCOM Gate / Source to EPD panel EPD Panel Stable Window Rule Refresh must start only after HV rails and VCOM are stable-ready; inhibit on UVLO to avoid half-refresh.
Figure H2-4. A driver IC should be evaluated by dynamic stability and sequencing behavior, not just static “can it drive” claims. The fixed validation points (①–④) target HV ripple, VCOM drift, output edge repeatability, and sequencing/UVLO robustness.

H2-5｜Refresh Policy and Image Quality: Partial Refresh, Ghosting Control, Temperature-Compensated LUT

A reliable EPD experience comes from a policy that is deterministic under corners. The refresh strategy must decide when partial refresh is allowed, when a full refresh is mandatory, and which waveform/LUT profile is safe for the current temperature. Policy correctness also depends on a hard constraint: waveform execution must happen inside a stable rail-and-timing window—otherwise ghosting can accumulate even with a “correct” decision.

Decision gates (write as enforceable rules)

Gate A — Mandatory full refresh Trigger full refresh when ghosting budget is exceeded (consecutive partial count, accumulated updated area, or gray-heavy content), when gray-level error becomes visible, or when temperature/voltage corners reduce margin.
Gate B — Temperature-driven LUT selection Select waveform/LUT using a temperature input that correlates with panel temperature. Add hysteresis and filtering so LUT does not chatter near thresholds.
Gate C — Low-voltage / low-temperature constraints Under low battery voltage or cold corners, restrict partial refresh or force a conservative LUT. If UVLO/brownout is possible, inhibit refresh to avoid half-refresh.
Gate D — Mode switching discipline Do not switch LUT or mode inside a refresh window. If a switch is required, schedule it in a safe gap and (when needed) insert a full refresh for state clean-up.

Common pitfalls → evidence → fix direction

Pitfall: LUT switch at the wrong moment → flicker or local gray patches Evidence: flicker occurs near mode/temperature thresholds; logs show LUT changed during an active refresh window. Fix: lock switching to safe gaps, add hysteresis, and stabilize temperature input before LUT decisions.
Pitfall: forcing partial refresh at low voltage → “dirtier with each update” Evidence: ghosting score worsens rapidly as battery voltage drops; ripple/droop grows during refresh. Fix: ban partial under low-voltage corners or choose conservative LUT; enforce inhibit-on-UVLO to prevent half-refresh.
Pitfall: policy looks correct, but quality remains unstable Evidence: HV rails/VCOM are not stable during the waveform window; repeatability breaks. Fix: return to rail stability and sequencing validation points, then re-evaluate policy thresholds.
Verification template: use fixed test patterns (grayscale steps + checker + text edges) and run a corner matrix (temperature × battery voltage × mode × content type). Define A/B criteria using a ghosting score, refresh time, flicker events, and refresh energy (current-integral per update).
Ghosting budget LUT hysteresis Corner matrix Stable window Inhibit on UVLO
Refresh policy decision tree and stable window constraint A decision-tree style block diagram. Inputs feed decision gates: mandatory full refresh, temperature LUT selection, corner constraints, and mode switching rules. Outputs choose full/partial/inhibit and LUT profile. A bottom bar shows stable window constraint for waveform execution. Refresh Policy Decision Tree Inputs → enforceable gates → output actions (full / partial / inhibit) + LUT profile Inputs Temperature (panel-correlated) Battery voltage corner Mode history / counters Content type / area Decision Gates A) Mandatory Full ghosting budget • gray error B) LUT Selection filter + hysteresis C) Corner Constraints low T / low Vbatt D) Switch Discipline Outputs Action: FULL Action: PARTIAL Action: INHIBIT LUT Profile ID chosen by temperature Hard Constraint: Stable Window for Waveform Execution HV+/HV− + VCOM stable-ready → allow refresh; UVLO/brownout → inhibit refresh stable window safe gap LUT hysteresis
Figure H2-5. A refresh policy becomes reliable only when it is defined as enforceable gates and constrained by a stable waveform window. The output must specify both an action (full/partial/inhibit) and a temperature-driven LUT profile.

H2-6｜Frontlight System: LED Driver, Dimming (PWM/Analog), and Perceived Consistency

E-reader frontlight is a tightly constrained subsystem: LED strings, a compact driver, and an optical diffuser must deliver low-brightness stability, smooth linear control, and repeatable appearance across battery and temperature corners. The design must also prevent coupling paths where LED switching noise degrades EPD refresh stability, touch sensing, or ALS accuracy.

Driver selection gates (choose by user-visible outcomes)

Channel count and string topology Match the light guide and uniformity needs. Multi-channel control helps reduce edge-to-center variation and supports segmented diffusion constraints.
Dimming method: PWM vs analog vs hybrid Decide based on low-brightness flicker risk and linearity. Hybrid dimming is often used to keep PWM frequency high while preserving low-level control.
Low-brightness linearity and current accuracy Very small current errors become visible as banding or unevenness at night-mode brightness. Prioritize repeatability over nominal maximum output.
Efficiency and thermal behavior Thermal rise changes LED efficacy and driver losses, causing brightness drift. A stable thermal design prevents slow “appearance creep” after warm-up.

Perception KPIs → what to measure

Flicker Validate at the lowest brightness steps. Check PWM frequency and modulation depth using scope/photodiode or camera rolling-shutter artifacts.
Linearity Build a brightness curve across user steps. Ensure monotonic response and consistent step-to-step perception.
Uniformity Sample multiple positions (grid points) after thermal stabilization. Track edge dimming and any channel-to-channel mismatch.
Thermal drift Compare cold start vs steady-state brightness. Drift indicates LED thermal rise, driver losses, or insufficient compensation.

Noise coupling paths (keep EPD and sensors stable)

Supply-path coupling LED switching current can create PMIC rail ripple that disrupts the EPD stable window during refresh events.
Ground return coupling Shared return paths inject noise into ALS or touch sensing references, causing jitter in auto-brightness and sensor readings.
EMI coupling High dv/dt nodes radiate into flex cables and panel routing, increasing susceptibility during refresh and sensor sampling.
Validation focus: verify low-brightness flicker (camera + scope), measure PWM waveform and frequency, and compare brightness drift between cold start and thermal steady state. For coupling risks, correlate PWM activity with EPD refresh anomalies and sensor noise.
Frontlight system: blocks, control loop, coupling paths, and measurement points A block diagram showing PMIC rail feeding an LED driver that drives LED strings and an optical diffuser. ALS feedback controls brightness steps. Coupling paths (supply, ground, EMI) are shown and measurement points are labeled. E-Reader Frontlight System LED driver + dimming + ALS loop, with coupling paths and measurement points (①–④) PMIC Rail supply source LED Driver PWM / analog / hybrid dimming PWM Ctrl Current Reg Thermal / Protection LED Strings channels / topology Light Guide / Diffuser uniformity control ALS auto-brightness input Brightness Steps ① PWM ② I_LED ③ rail ripple ④ ALS Supply coupling Ground return EMI coupling Validation Focus Low-brightness flicker • PWM waveform • thermal drift • correlate coupling with EPD refresh and sensor noise
Figure H2-6. Frontlight design must meet perception KPIs (flicker/linearity/uniformity) while controlling coupling paths that can disturb EPD refresh stability and sensor accuracy.

H2-7｜Low-Power Application Processor + PMIC: Power Domains That Deliver Real Battery Life

“Real” battery savings come from domain accountability. A low-power SoC can still drain the battery if an always-on rail is oversized, if a peripheral never fully powers down, or if wake events create frequent bursts. A practical design uses a power ledger: each domain is defined by who powers it, when it is allowed to turn on, and how it is guaranteed to turn off.

Power ledger — audit each domain with the same fields

Always-on (AON) domain Supplies: RTC and minimal wake logic. On condition: always. Off condition: never. Risk: hidden consumers via GPIO pull-ups, level shifters, or leakage paths.
Sleep / standby domain Supplies: SoC retention, minimal RAM, input wake. On: standby states. Off: deep sleep. Risk: partial shutdown leaves “zombie rails” that keep IO alive.
Refresh domain Supplies: EPD control blocks needed for a refresh transaction. On: only during refresh window. Off: immediately after. Risk: leaving the domain on breaks sleep plateau.
Wireless domain Supplies: Wi-Fi module and its regulator. On: scan/association/Tx windows. Off: default. Risk: “event wakes” create frequent bursts that dominate daily energy.
Sensors (ALS / temperature) domain Supplies: low-duty sensors for user experience and compensation. On: periodic sampling. Off: between samples. Risk: continuous sampling keeps rails awake.

State mapping (what must be ON vs OFF)

Deep sleep AON only. No refresh domain, no wireless domain. Wake sources must be limited and predictable.
Standby AON + retention domain. Keep only what is required for fast resume. Prevent background wireless events.
Active refresh Temporarily enable refresh domain, then return to standby. Do not keep refresh rails on after completion.
Wi-Fi Tx burst Enable wireless domain only for scheduled windows. Ensure PMIC rails stay stable under peak current.

Wake sources — choose to minimize AON footprint

Preferred wake sources Button, RTC alarm, charger insertion. These allow a small, stable always-on domain.
Conditional wake sources Touch or Hall (if present). Verify whether they require continuous power or can be duty-cycled without missing user intent.
Avoid-by-default wake sources Wi-Fi events. They expand the always-on footprint and generate frequent bursts that dominate daily energy.

PMIC implementation gates (design for “fully off” and clean sequencing)

Multi-rail sequencing Define explicit enable order for core/IO/retention and peripheral rails. Prevent half-on states that cause unpredictable current or resets.
Low-IQ LDO vs buck Select by load profile and noise tolerance. Low-IQ LDO helps ultra-light loads; buck improves efficiency when loads are sustained or bursty.
Load switches and discharge For domains that must be truly off, use a switch with controlled discharge so residual charge does not keep IO biased.
Brownout / UVLO guard When rails are unstable, inhibit domain entry that could leave the system in a partial wake or partial refresh state.
Validation method: capture system current and key rails, then segment the waveform into a sleep plateau and event spikes (refresh spike, wireless spike, charger insertion). Each segment must map back to a domain in the ledger. Battery-life anomalies become actionable when the plateau and spikes can be assigned to specific rails and wake causes.
Power ledger Domain accountability Sleep plateau Sequencing Brownout guard
Power ledger: states → domains → PMIC rails, plus waveform segments A block diagram showing domains (AON, Sleep/Retention, Refresh, Wireless, Sensors) connected to PMIC rails. Low-power states map to required domains. Bottom shows current waveform segmentation: sleep plateau and spikes. Power Ledger Mapping States → domains → PMIC rails, with a sleep plateau and event spikes Domains Always-on (AON) Sleep / Retention Refresh Wireless Sensors (ALS/T) PMIC rails • sequencing • switches • UVLO guard Rail_AON (RTC / wake) Rail_RET (retention) Rail_CPU (core/IO) Rail_EPD (refresh) Rail_WIFI (burst) States Deep sleep Standby Active refresh Wi-Fi burst Charger insert AON only AON + retention refresh window burst window Current Waveform Segmentation Sleep plateau + event spikes must map back to domains and rails Sleep plateau Refresh spike Wi-Fi spike Charge event
Figure H2-7. A power ledger ties low-power states to domains and PMIC rails. Validation relies on waveform segmentation: the sleep plateau and each spike must be attributable to a specific domain and rail enable path.

H2-8｜Wi-Fi Power and Stability: Scan/Association/Tx Bursts and the Power-Noise Reality

Wi-Fi behavior becomes a hardware problem when burst current creates rail droop, resets, or display artifacts. The goal is not protocol detail, but a repeatable evidence chain: Wi-Fi event → peak current → rail response → system symptom. Stable operation typically requires a supply architecture that tolerates burst peaks and a scheduling rule that avoids overlapping Wi-Fi bursts with EPD refresh windows.

Burst events as power-impact categories

Scan burst High activity over a short window. Risk: repeated bursts increase daily energy and can disturb rails during low-battery corners.
Association burst Often a longer transaction. Risk: combined CPU + Wi-Fi load can exceed margin when the battery voltage is low.
Tx burst Largest peak current. Risk: rail droop, brownout, reboot, or EPD refresh interference if the burst overlaps sensitive windows.
Background keep-alive Small but frequent. Risk: a “death by a thousand cuts” pattern that destroys standby energy targets.

Supply architecture gates: LDO vs buck (choose for stability, not only efficiency)

LDO rail for Wi-Fi Cleaner noise profile but check peak current margin and thermal loss. If the LDO saturates during a burst, droop can trigger resets.
Buck rail for Wi-Fi Better efficiency and burst capability, but switching noise must be contained. Layout and return paths must avoid coupling into EPD and ALS.
Isolation and coupling control Prevent burst noise from entering EPD and sensors through supply ripple, shared ground return, or EMI paths.

Mutual exclusion windows (scheduling rules, not firmware code)

Rule 1 During an EPD refresh window, defer high-peak Wi-Fi Tx bursts whenever possible.
Rule 2 During a Wi-Fi burst window, do not start an EPD refresh or mode/LUT switching.
Rule 3 For exception cases (reconnect/recovery), enter a conservative mode: stabilize rails, then refresh after the burst completes.
Validation evidence chain: capture Wi-Fi burst current, the Wi-Fi rail, the PMIC main rail, and an EPD refresh marker. Time-align the bursts with refresh activity. The result should explain whether artifacts/resets are caused by rail droop, coupling, or window overlap.
Tx burst peak Rail droop Coupling paths Mutual exclusion Evidence chain
Wi-Fi burst: power path, coupling paths, outcomes, and mutual exclusion windows A block diagram: Wi-Fi events lead to burst current. Power path from PMIC to Wi-Fi regulator (LDO/buck) to Wi-Fi module. Coupling paths affect EPD refresh and ALS. Outcomes include reboot and display artifacts. Bottom timeline shows refresh vs burst mutual exclusion. Wi-Fi Bursts and Power-Stability Reality Event → peak current → rail response → symptom, with mutual exclusion windows Wi-Fi Events Scan burst Assoc burst Tx burst Peak Current di/dt • droop risk Power Path PMIC rail Wi-Fi Reg LDO / buck Wi-Fi module Outcomes Rail droop Reboot EPD artifact Sensitive Windows EPD refresh • ALS sampling Supply coupling Ground return EMI Mutual Exclusion Windows Avoid overlapping Wi-Fi bursts with EPD refresh windows whenever possible EPD refresh window Wi-Fi burst window mutual exclusion
Figure H2-8. Treat Wi-Fi scan/association/Tx as burst power events. Stability requires a robust power path and coupling control, plus a mutual-exclusion rule between Wi-Fi bursts and EPD refresh windows.

H2-9｜Battery, Charging, and Fuel Gauge: Trustworthy Runtime and Reliable Charging

An e-reader’s battery experience depends on three outcomes happening together: runtime reporting must be believable, charging must remain stable under real system load, and factory/transport modes must minimize self-discharge while keeping recovery predictable. The focus here is the device-side chain: charger + power-path + fuel gauge + protection. Adapter topology and fast-charge ecosystems are intentionally out of scope.

Charger gates (expressed as thresholds → symptoms → evidence)

Input current limit (DPM / input regulation) When input limiting engages, system load competes with charge current. Symptoms include “slow charge,” “status bouncing,” and rail droop under concurrent activity. Evidence: VBUS/IBUS + battery current + key rails captured together.
Thermal regulation As temperature rises, charge current reduces to protect the device. Symptoms include charge speed that varies with heat and enclosure conditions. Evidence: NTC/IC temperature correlated with charge current transitions.
Termination and recharge behavior Termination/recharge thresholds that are too tight can cause frequent state toggles near full. Evidence: charger state flags aligned to VBAT and charge current around the end-of-charge region.
Power-path coupling to system load Refresh spikes and Wi-Fi bursts can transiently pull energy away from charging, making “charging but not gaining” complaints. Evidence: system load spike aligned to a charge-current dip.

Fuel gauge: SOC drift explained with measurement-visible evidence

Sense accuracy and drift SOC credibility requires stable current sensing across temperature and load. Watch for sense resistor tolerance, thermal gradients, and layout-induced offset. Evidence: repeated load-step tests showing consistent ΔI and consistent SOC movement.
OCV windows and low-temperature error At low temperature, OCV-based estimation and available capacity diverge. Evidence: controlled “rest windows” at fixed temperature points, comparing OCV trend to delivered energy during a known load profile.
Load pulse misinterpretation Short high-current bursts cause VBAT droop that can look like sudden capacity loss if the window is not treated correctly. Evidence: VBAT droop amplitude vs load pulse current, aligned to any SOC step changes.

Protection and connector transients (minimum closed loop)

Plug-in transient Connector insertion can create VBUS steps and ringing. The design should avoid rail instability that can trigger resets or partial display actions.
UVLO / brownout Under low battery, concurrent activity must not force rails into a “half-on” zone. The system should inhibit risky operations when margin is insufficient.
OCP / short Fault behavior must be observable (status flag + rail behavior) so field failures can be attributed and verified after fixes.
Concurrency stress test (most failure-prone scenario): run charging while forcing EPD refresh and Wi-Fi bursts. Capture VBUS/IBUS, VBAT/IBAT, key rails (EPD rail, Wi-Fi rail, PMIC main rail), and charger state/fault flags. Passing criteria: charge state is explainable, rails stay within stable margins, refresh remains clean, and SOC movement remains consistent with delivered energy trends.
Input limit Thermal regulation Power-path SOC credibility Concurrency stress
Device-side charging path with observation points and concurrency stress USB connector feeds charger and power-path to battery and system loads. Fuel gauge senses current and estimates SOC. Protection and plug transients are shown. Numbered observation points mark where to probe VBUS/IBUS, VBAT/IBAT, rails, and state flags. Charging + Fuel Gauge (Device Side) Observation points for the concurrency stress test USB / Connector VBUS / IBUS Plug transient Charger + Power-Path input limit • thermal • termination • path control Input limit (DPM) Thermal regulation Termination / recharge Battery VBAT / IBAT Fuel Gauge sense • OCV window • temperature Sense R SOC estimate Low-temp error / OCV rest System Loads concurrency risk EPD refresh Wi-Fi burst SoC activity Protection: UVLO / OCP / short sense + OCV window 1 Probe VBUS/IBUS 2 Charger state / faults 3 Probe VBAT/IBAT 4 Probe EPD/Wi-Fi rails Concurrency stress: Charging EPD refresh Wi-Fi burst
Figure H2-9. Device-side charging depends on input limiting, thermal regulation, termination behavior, and power-path coupling. The concurrency stress test (charging + refresh + Wi-Fi burst) should be instrumented at VBUS/IBUS, VBAT/IBAT, key rails, and charger state/fault flags.

H2-10｜Ambient Light Sensor (ALS) and Calibration: Why Auto Brightness “Pumps”

Auto brightness instability is rarely a single-cause software issue. In an e-reader, ALS input quality is shaped by optics (window, placement, leakage), electrical integrity (I²C reliability, supply ripple), and the minimum control requirements (filtering and hysteresis) needed to prevent hunting. The goal is a closed loop that can be validated: light path → ALS reading → control input, with repeatable tests and tolerances.

Optics and placement (observable causes)

Occlusion and user grip Hand placement, cases, and bezels can systematically block the ALS aperture, biasing readings low and driving the frontlight too high. Validate with multiple holding positions under fixed lux.
Frontlight leakage and bias Frontlight emission can leak into the ALS window, shifting the baseline when the light is ON and creating feedback loops. Validate by toggling frontlight at constant ambient lux.
Cover transmittance variation Lens/window transmittance and stack-up variation can cause device-to-device differences. Validate across units at fixed lux points with the same geometry.

Electrical integrity: I²C noise and supply ripple that make readings jump

I²C integrity Glitches, ground bounce, or EMI can create corrupted reads or intermittent spikes. Evidence: reading timestamps correlated with I²C error counters or scope captures at the same moments.
ALS supply ripple coupling LED PWM activity or Wi-Fi bursts can modulate sensor supply/ground, producing noisy measurements. Evidence: ALS rail ripple aligned to reading variance.
Cross-domain timing Scheduling sensor reads away from high-noise windows reduces variance. Evidence: lower reading spread when sampled in quiet windows (without discussing firmware implementation).

Control requirements (algorithm boundary)

Filtering Readings require smoothing so short transients do not translate into visible brightness steps.
Hysteresis Thresholds must include hysteresis to prevent repeated toggling near boundary lux levels.
Input quality Calibration is only meaningful when optics and electrical integrity keep readings stable and repeatable.
Validation plan: use a dark box or controlled lighting with fixed lux points (dark / mid / bright), test multiple device positions, and compare ALS readings with frontlight OFF vs ON to quantify leakage bias. Capture ALS rail ripple and I²C integrity indicators during the same runs. Define acceptance by the reading spread at each lux point and the bias shift when frontlight toggles.
Occlusion Leakage bias I²C integrity Supply ripple Hysteresis
ALS closed-loop: optical path, leakage bias, electrical coupling, and validation Environment light goes through cover/window to ALS. Frontlight can leak into ALS, creating bias. I2C integrity and ALS supply ripple can create jumps. Output is brightness control and perceived hunting. Bottom shows dark-box fixed lux tests, positions, and frontlight ON/OFF bias measurement. ALS Input Quality for Stable Auto Brightness Optics + electrical integrity + minimum control requirements Optical Path Ambient lux Cover / window ALS aperture + sensor Occlusion Transmittance Frontlight leakage → ALS bias LED strings LED driver Electrical Integrity I²C bus integrity glitch • EMI • retries ALS rail ripple supply / ground Coupling sources: PWM activity • Wi-Fi bursts Filtering smoothing required Hysteresis prevent hunting User-visible symptom Brightness “pumping” / “hunting” leakage / bias 1 ALS reading 2 ALS rail ripple 3 I²C integrity Validation: Controlled Lux Tests dark box • fixed lux points • positions • frontlight ON/OFF bias Fixed lux points Positions Frontlight ON/OFF Spread + bias tolerance
Figure H2-10. ALS stability is governed by optics (occlusion, leakage bias, cover transmittance) and electrical integrity (I²C noise, supply ripple). Validation uses fixed-lux tests and frontlight ON/OFF bias measurement without requiring software implementation details.

H2-11｜Validation Plan & Field Debug Playbook: The Two Evidence Classes That Close Issues Fast

Field failures are rarely solved by guessing. The fastest closure comes from collecting the right evidence in the right order: Priority #1 Power Evidence first, then Priority #2 Display Evidence. This playbook standardizes what to probe, when to probe, and what signatures confirm a root-cause bucket.

Power first Time-aligned markers Minimal reproduction ladder Symptom → Bucket → Fast check

Priority #1 — Power Evidence (must-capture probe set)

  • VBAT (battery terminal) Confirms battery sag, internal resistance effects, and low-temperature margin. Capture droop depth, recovery time, and whether events correlate to resets or display artifacts.
  • VSYS / main PMIC rail (system supply) Confirms whether the platform enters an unstable window during load spikes (refresh / Wi-Fi bursts / charging transitions). Track min voltage, ripple, and any UVLO/brownout behavior.
  • EPD HV rails (positive/negative high-voltage supplies) Confirms refresh transient ripple and droop. Correlate rail disturbance with ghosting and local flicker symptoms.
  • VCOM (EPD reference) Confirms baseline drift or disturbance that directly impacts grayscale stability and ghosting. Watch for drift across temperature, battery level, and mode changes.
  • Event markers (timestamped) Mark at least: refresh start (full/partial), LUT switch, Wi-Fi Tx burst, charger state change, and frontlight PWM change. Evidence is only “actionable” when symptoms share the same time window.
Concurrency stress (high failure probability): Run charging + EPD refresh + Wi-Fi burst together and capture VBAT, VSYS, HV rails, VCOM, plus event markers. A “true” power root cause typically shows a repeatable rail signature aligned to the symptom time window.

Priority #2 — Display Evidence (turn “looks bad” into measurable proof)

  • Ghosting curve vs temperature / voltage / refresh mode Use a fixed test pattern and capture A/B images at controlled temperature points and battery states. Compare full vs partial and record the exact mode + conditions.
  • Local flicker correlated to LUT switch / timing window Record the flicker time window and align it with the LUT switch marker and VCOM/HV rail behavior. A consistent alignment converts a “random flicker” complaint into a deterministic signature.

Minimal Reproduction Ladder (reduce variables, then add back one by one)

  1. Step 0 (clean baseline): Wi-Fi OFF, charging OFF, fixed frontlight level, fixed temperature point, fixed refresh mode.
  2. Step 1 (refresh only): switch full ↔ partial and (if applicable) trigger LUT changes while capturing HV rails + VCOM.
  3. Step 2 (Wi-Fi only): enable short Tx bursts while capturing VBAT/VSYS; check for droop coincident with page turns.
  4. Step 3 (charging only): test charge phases (pre/fast/CV/recharge boundary) while capturing VBAT/VSYS and state flags.
  5. Step 4 (concurrency): combine charging + refresh + Wi-Fi bursts; this is the best “field-like” reproduction for resets and display artifacts.

Symptom → Root-Cause Bucket → Fast Check (field-closure quick table)

1) “Gets dirtier with more refresh” (ghosting accumulates)

Likely bucket

Partial strategy at low-voltage/low-temp boundary; HV/VCOM instability during partial cycles.

Fast check

A/B: full vs partial at the same temperature + VBAT band. Capture HV rails + VCOM aligned to refresh markers.

Expected signature

Ghosting worsens when HV ripple/droop increases or VCOM baseline shifts during partial refresh.

2) “Very slow refresh in cold”

Likely bucket

Temperature input selection/quality issue; LUT selection mismatched to real panel temperature.

Fast check

Hold a fixed cold point and log temperature source + refresh time. Validate temperature read stability; correlate with mode switches.

Expected signature

Refresh time changes step-like with temperature source changes, not with content complexity.

3) “Reboots when turning pages”

Likely bucket

VBAT/VSYS droop from refresh spike + Wi-Fi burst concurrency; charger state transitions can worsen margin.

Fast check

Capture VBAT + VSYS with event markers (page turn + Wi-Fi burst). Repeat with Wi-Fi OFF to isolate.

Expected signature

A repeatable VSYS dip aligned to the page-turn window; disappears or reduces when Wi-Fi is disabled.

4) “Auto brightness hunts / pumps”

Likely bucket

ALS optical bias (frontlight leakage / occlusion) and/or electrical noise (I²C integrity, ALS rail ripple).

Fast check

Fixed lux test: frontlight OFF vs ON; capture ALS reading spread + ALS rail ripple; verify I²C stability indicators.

Expected signature

ALS baseline shifts when frontlight toggles, or reading variance increases during PWM/Wi-Fi activity windows.

5) “Local flicker at mode switch”

Likely bucket

LUT switch timing window or VCOM disturbance during mode transition.

Fast check

Mark LUT switch timing; capture VCOM + HV rails around the transition and record the flicker time window.

Expected signature

Flicker appears only when a specific transition produces a VCOM/HV transient.

6) “Worse ghosting only while charging”

Likely bucket

Charge switching noise coupling into HV/VCOM; margin reduced by input limiting/thermal throttling.

Fast check

A/B: charging OFF vs ON at the same VBAT band; capture HV rails + VCOM ripple under identical refresh pattern.

Expected signature

HV/VCOM ripple increases with charging, and ghosting correlates with that increase.

7) “Only certain brightness levels flicker”

Likely bucket

Frontlight PWM window couples into sensor/rails; low-duty operation reveals ripple sensitivity.

Fast check

Sweep frontlight levels under fixed ambient; capture ALS rail + VSYS noise while keeping refresh constant.

Expected signature

Noise spikes increase at specific duty windows and align with visible flicker or ALS instability.

8) “Good at high battery, bad at low battery”

Likely bucket

Low-voltage boundary for PMIC/HV generation; insufficient headroom during refresh spikes.

Fast check

Repeat the same refresh pattern across VBAT bands; capture VSYS min and HV droop depth.

Expected signature

Failures appear when VSYS/HV droop crosses a repeatable threshold.

9) “Improves a lot with Wi-Fi OFF”

Likely bucket

Wi-Fi burst peak current causes droop or injects noise into sensitive rails (EPD/ALS).

Fast check

Capture Wi-Fi rail + VSYS + event markers; verify whether bursts overlap refresh windows.

Expected signature

Rail disturbance aligns to Wi-Fi bursts; reducing overlap reduces symptoms.

10) “Device-to-device auto brightness mismatch”

Likely bucket

Optical stack transmittance tolerance and ALS placement variation; frontlight leakage bias varies by build.

Fast check

Fixed lux points across units; compare reading distribution and ON/OFF bias shift with the same geometry.

Expected signature

Consistent per-unit offset under controlled lux, amplified when frontlight is ON.

Example MPNs (reference parts to anchor selection and debug evidence)

The list below provides concrete material numbers commonly used in e-reader device-side designs. These are examples to anchor BOM discussions and test expectations; final selection must match panel requirements, rails, package constraints, and availability.

EPD HV PMIC / E-Ink driver power (HV rails + VCOM)
  • Texas Instruments TPS65185 — E-Ink power (HV generation + VCOM)
  • Texas Instruments TPS65186 — E-Ink power (variant family)
  • Texas Instruments TPS65180 — E-Ink power management (family example)
  • Analog Devices/Maxim MAX17135 — ePaper PMIC (HV + VCOM class)
Debug tie-in: HV rail ripple/droop and VCOM stability are the fastest discriminators for ghosting/flicker buckets.
Battery charger / power-path (device side)
  • Texas Instruments BQ25895 — single-cell switch-mode charger with power-path class
  • Texas Instruments BQ24195 — 1-cell charger with power-path class
  • Texas Instruments BQ24074 — linear charger class (simpler thermal behavior)
  • Analog Devices/Maxim MAX77818 — charger/power-path class (example)
Debug tie-in: input limiting, thermal regulation, and state transitions often align with “charging-only” display degradation.
Fuel gauge / coulomb counting (SOC credibility)
  • Texas Instruments BQ27441-G1 — single-cell fuel gauge class
  • Texas Instruments BQ28Z610 — impedance track fuel gauge class
  • Analog Devices/Maxim MAX17055 — ModelGauge fuel gauge class
  • Analog Devices/Maxim MAX17201 — fuel gauge class
Debug tie-in: SOC drift must be justified by VBAT/IBAT evidence and controlled OCV/rest windows, especially at low temperature.
Low-IQ rails for always-on / Wi-Fi supply stability
  • Texas Instruments TPS62840 — high-efficiency buck (low quiescent current class)
  • Texas Instruments TPS62841 — buck variant class
  • Texas Instruments TPS7A02 — low-IQ LDO class
  • Analog Devices LTC3335 — nano-power buck-boost class (always-on domain example)
Debug tie-in: Wi-Fi bursts stress rail headroom; the fastest evidence is VSYS + Wi-Fi rail droop aligned to event markers.
ALS (ambient light sensor) — common digital ALS options
  • Vishay VEML7700 — ALS sensor class
  • ams-OSRAM TSL2591 — ALS sensor class
  • Broadcom APDS-9306 — ALS sensor class
  • Lite-On LTR-329ALS — ALS sensor class
Debug tie-in: hunting often traces to optical bias (frontlight leakage/occlusion) or rail/I²C integrity; validate with fixed-lux ON/OFF bias tests.
Frontlight LED driver (constant-current dimming)
  • Texas Instruments TPS61165 — white LED driver class
  • Texas Instruments TPS61169 — white LED driver class
  • Analog Devices LT3477 — LED driver class
  • Analog Devices/Maxim MAX8649 — regulator class sometimes used near lighting rails (example)
Debug tie-in: PWM windows can couple into ALS or sensitive rails; verify reading variance and rail ripple vs brightness levels.
Measurement helpers (to make evidence capture easy)
  • Texas Instruments INA219 — current/voltage monitor (I²C) for power profiling fixtures
  • Texas Instruments INA226 — current/voltage monitor (I²C) higher-precision class
  • Texas Instruments INA180 — current-sense amplifier class (inline shunt)
  • Vishay WSL series — low-ohm shunt resistor family (example for IBAT/ISYS sensing)
Debug tie-in: capturing “where the current goes” with time-aligned markers often closes reboot/instability tickets faster than software logging.
Evidence-first debug map (Power → Display → Fast checks → Minimal repro) Diagram shows evidence priority funnel. Power probes VBAT, VSYS, HV rails, VCOM with event markers. Display evidence includes ghosting curve and flicker correlation. Bottom shows minimal reproduction ladder steps. Validation & Field Debug — Evidence Priority Power evidence first, then display evidence; close with fast checks and minimal reproduction Priority #1: Power Evidence Battery (VBAT) PMIC (VSYS) EPD HV rails VCOM Event markers: refresh • LUT • Wi-Fi Tx • charge • PWM 1 VBAT 2 VSYS 3 HV rails 4 VCOM Priority #2: Display Evidence Ghosting curve vs T / VBAT / mode fixed test pattern • A/B photos Local flicker aligned to LUT switch timestamp • VCOM/HV correlation Close loop: symptom ↔ signature ↔ bucket Fast Checks (Symptom → Bucket → Probe) Reboot on page turn Concurrency droop Probe VBAT + VSYS + markers Minimal Reproduction Ladder Reduce variables → add back one by one → reproduce with evidence Step 0: baseline Step 1: refresh Step 2: Wi-Fi Step 3: charge Step 4: concurrency
Figure H2-11. A field-closure workflow that starts with power evidence (VBAT/VSYS/HV/VCOM + event markers), then adds display evidence (ghosting curve and flicker correlation), and finishes with fast checks and a minimal reproduction ladder.

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H2-12｜FAQs (Evidence-Driven Answers)

Each answer closes back to the on-board evidence chain: time-aligned event markers → power rails → display signatures → A/B isolation. MPNs are reference anchors for BOM discussions, not prescriptive picks.

1 Why does the device reboot on a page turn even when the battery “looks OK”? Which two rails should be captured first?

Page turns can align EPD refresh spikes with Wi-Fi bursts or charger state changes, creating a brief VSYS collapse that a battery gauge may not reflect. Capture VBAT and VSYS with page-turn and Wi-Fi burst markers. A repeatable VSYS dip 10–50 ms before reset confirms a power-margin bucket (often seen with power-path chargers like BQ25895).

Evidence checklist: VBAT + VSYS • refresh marker • Wi-Fi/charge marker
2 In cold conditions, is strong ghosting caused by the wrong LUT selection or VCOM drift? What evidence separates them?

Wrong LUT selection usually tracks temperature input quality: ghosting and refresh time change step-like with temperature readings. VCOM drift shows as a stable grayscale bias that correlates to the VCOM baseline or short glitches during mode changes. Capture VCOM plus the temperature input (panel/NTC source) under the same pattern, then A/B full vs partial. VCOM-linked signatures point to the EPD power chain (e.g., TPS65185 class).

Evidence checklist: VCOM • temperature input log • full vs partial A/B
3 Partial refresh gets “dirtier” over time. When should full refresh be forced?

Force a full refresh when any boundary is crossed: (1) ghosting score exceeds a defined threshold, (2) low-temperature region where pigment mobility slows, or (3) low-battery headroom where HV/VCOM margin shrinks. Use a fixed test pattern and track ghosting A/B versus VBAT and temperature. If ghosting accumulation accelerates at low VBAT or cold, full refresh becomes a deterministic hygiene step, not a preference.

Evidence checklist: fixed pattern A/B • VBAT banding • temperature points
4 HV rail ripple is small but the screen still flickers. Is it timing or insufficient driver drive strength?

Small steady-state ripple can hide short timing-window disturbances. If flicker clusters around mode transitions or LUT switches, timing is the primary suspect. Capture VCOM and an HV rail with a clear LUT-switch marker. If flicker aligns with a repeatable VCOM glitch or a brief HV droop at the transition, it is a timing/sequence bucket; if only specific loads trigger it, output drive margin is likely constrained (TPS6518x-class signatures help confirm).

Evidence checklist: VCOM + HV • LUT switch marker • flicker time window
5 Auto brightness hunts up and down. Is it ALS reading jitter or frontlight leakage bias?

Leakage bias appears as a stable ALS baseline shift when frontlight toggles; reading jitter appears as high variance under fixed lux and often correlates to PWM or Wi-Fi activity windows. Run a fixed-lux test and A/B frontlight OFF vs ON, logging raw ALS samples. A consistent offset indicates optical leakage/placement; variance spikes indicate electrical noise or bus integrity. ALS parts like VEML7700 are easy to validate with repeatable fixed-lux fixtures.

Evidence checklist: ALS time series • frontlight OFF/ON A/B • fixed lux
6 Low brightness looks fine to the eye, but phone video shows banding. Is it PWM frequency or dimming strategy?

Phone banding is a rolling-shutter amplifier of PWM behavior. Distinguish frequency from strategy by measuring PWM waveform and changing camera shutter/frame rate. Capture PWM frequency/duty and compare banding under identical brightness steps. If banding shifts with shutter, frequency dominates; if low-duty operation becomes sparse or discontinuous, dimming strategy/min-on-time is the driver. White-LED drivers like TPS61165 can reveal this clearly at low duty windows.

Evidence checklist: PWM waveform • camera A/B at different shutter • low-duty behavior
7 Refresh becomes unstable while charging. Is it thermal regulation sag or ground-bounce noise?

Thermal regulation sag is a slow change: VSYS or charge current reduces as temperature rises, shrinking margin during refresh. Ground-bounce/noise is impulsive: disturbances appear in tight refresh windows and track switching events. Capture VSYS trend over minutes plus VCOM/HV around refresh. If failures cluster at charge-limit/thermal-regulation phases (common in BQ24195 class behavior), sag dominates; if failures align to short windows, coupling/layout is the likely bucket.

Evidence checklist: VSYS trend • VCOM/HV around refresh • charge state marker
8 During Wi-Fi scanning, the display occasionally glitches. Is it supply peak current or noise coupling into the EPD driver?

Supply peak current shows as a repeatable droop on VSYS (or the Wi-Fi rail) aligned to scan bursts; noise coupling can occur even without a large droop if sensitive references are disturbed. Capture VSYS (or Wi-Fi rail) and VCOM with a Wi-Fi burst marker. If VSYS dips and the glitch disappears with Wi-Fi OFF, it is a power bucket; if VSYS is stable but VCOM shows brief perturbations, coupling into the EPD chain is more likely.

Evidence checklist: VSYS/Wi-Fi rail • VCOM • Wi-Fi burst marker
9 What visible image-quality symptoms come from VCOM calibration error or drift?

VCOM drift typically appears as a “dirty background,” reduced contrast, grayscale non-uniformity, and higher ghosting sensitivity—especially after mode changes. Local flicker can also become easier to trigger when VCOM has short disturbances. Confirm by logging VCOM baseline across temperature and VBAT bands while capturing a fixed test pattern A/B. A stable per-condition VCOM offset that tracks the visual bias points to the EPD power/reference chain (e.g., TPS65185 class VCOM behavior).

Evidence checklist: VCOM baseline vs T/VBAT • fixed pattern A/B • mode switch marker
10 Battery life is half of expectation. How can a current waveform “expense ledger” reveal what is stealing power?

Split the day into states: deep sleep, standby, refresh bursts, Wi-Fi bursts, and frontlight. Record current with event markers and compute “time × current” for each segment. The biggest steals are usually (a) always-on domains not truly off, (b) periodic Wi-Fi scanning bursts, or (c) ALS/frontlight hunting that causes frequent updates. A fixture using a monitor like INA226 makes segment-level attribution repeatable and comparable across builds.

Evidence checklist: current waveform + markers • state dwell time • segment attribution
11 Power-on sometimes shows a black screen while the frontlight is normal. Check HV rails first or driver power-on sequencing?

A normal frontlight suggests the main system is alive; the most likely failure is that the EPD HV/VCOM chain did not start correctly or started out of order, leaving the panel in a half-initialized state. Capture HV rails and VCOM from cold start with a clear “enable/boot” marker. If rails are missing, delayed, or out of sequence during the black-screen event, sequencing is the primary suspect; stable rails shift focus back to display evidence signatures.

Evidence checklist: HV + VCOM during boot • enable marker • compare good vs bad boots
12 Same production batch, only a few units show heavier ghosting. Is it the temperature path, VCOM spread, or panel variation—and how to A/B verify?

Use an A/B plan that makes variables swappable. Under the same VBAT band, temperature point, and refresh mode, compare ghosting scores using one fixed test pattern. Then compare (1) temperature input stability/offset across units and (2) VCOM baseline distribution. If outliers track temperature readings, LUT selection is implicated; if outliers track VCOM offsets, the EPD reference chain is implicated. If both are consistent yet ghosting differs, panel variation is the likely bucket.

Evidence checklist: fixed pattern A/B • temp input distribution • VCOM baseline distribution
FAQ evidence loop (Markers → Power rails → Display signatures → A/B isolation) Block diagram showing how each FAQ answer should start with time markers, then capture power rails (VBAT, VSYS, HV, VCOM), then capture display signatures (ghosting curve, flicker window), and conclude with A/B isolation to select a root-cause bucket. FAQ Answer Template — Evidence Loop Every answer closes back to rails + signatures + A/B isolation 1) Mark events 2) Capture rails 3) Capture display signatures 4) A/B isolate Event markers Refresh start LUT switch Wi-Fi burst Charge state PWM change Power rails A VBAT B VSYS C HV rails D VCOM Time-align with markers Display signatures Ghosting curve vs T / VBAT / mode Flicker window align to LUT switch Baseline bias contrast / gray shifts Confirm with fixed pattern A/B A/B Wi-Fi OFF/ON Charge OFF/ON Mode Full/Part Pick bucket fast check Outcome A short, shareable evidence pack: rails + markers + A/B photos/video + one-line conclusion
Figure H2-12. A consistent FAQ evidence loop: mark events → capture rails (VBAT/VSYS/HV/VCOM) → capture display signatures → isolate by A/B → select a root-cause bucket with a fast check.
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